Commit graph

70585 commits

Author SHA1 Message Date
Ilia Mirkin
df03be196a nv50,nvc0: add PIPE_BIND_LINEAR support to is_format_supported
vdpau has recently come to rely on this, so make sure to check it
properly.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-03-31 21:53:11 -04:00
Ilia Mirkin
e0e1683087 mesa: add GL_OES/EXT_draw_buffers_indexed support
This is the same ext as ARB_draw_buffers_blend (plus some core
functionality that already exists). Add the alias entrypoints.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 21:12:49 -04:00
Kenneth Graunke
a57320a9ba i965: Use brw->urb.min_vs_urb_entries instead of 32 for BLORP.
Haswell GT2 and GT3 have a minimum of 64 entries.  Hardcoding 32
is not legal.

v2: Delete stale comment (caught by Alejandro).

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-03-31 16:45:07 -07:00
Kenneth Graunke
58d4751fa0 i965: Fix textureSize() depth value for 1 layer surfaces on Gen4-6.
According to the Sandybridge PRM's description of the resinfo message,
the .z value returned will be Depth == 0 ? 0 : Depth + 1.  The earlier
PRMs have the same table.

This means we return 0 for array textures with a single slice, when
we ought to return 1.  Just override it to max(depth, 1).

Fixes 10 dEQP-GLES3.functional tests on Sandybridge:
shaders.texture_functions.texturesize.sampler2darray_fixed_vertex
shaders.texture_functions.texturesize.sampler2darray_fixed_fragment
shaders.texture_functions.texturesize.sampler2darray_float_vertex
shaders.texture_functions.texturesize.sampler2darray_float_fragment
shaders.texture_functions.texturesize.isampler2darray_vertex
shaders.texture_functions.texturesize.isampler2darray_fragment
shaders.texture_functions.texturesize.usampler2darray_vertex
shaders.texture_functions.texturesize.usampler2darray_fragment
shaders.texture_functions.texturesize.sampler2darrayshadow_vertex
shaders.texture_functions.texturesize.sampler2darrayshadow_fragment

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-03-31 15:23:49 -07:00
Ian Romanick
08ff5f4d1f nir: Simplify a bcsel to logical-or
Oddly, this did not affect the shader where I first noticed the pattern.
That particular shader doesn't get its if-statement converted to a bcsel
because there are two assignments in the else-statement.  This led to me
submitting https://bugs.freedesktop.org/show_bug.cgi?id=94747.

shader-db results:

Sandy Bridge
total instructions in shared programs: 8467384 -> 8467069 (-0.00%)
instructions in affected programs: 36594 -> 36279 (-0.86%)
helped: 46
HURT: 0

total cycles in shared programs: 117573448 -> 117568518 (-0.00%)
cycles in affected programs: 339114 -> 334184 (-1.45%)
helped: 46
HURT: 0

Ivy Bridge / Haswell / Broadwell / Skylake:
total instructions in shared programs: 7774258 -> 7773999 (-0.00%)
instructions in affected programs: 30874 -> 30615 (-0.84%)
helped: 46
HURT: 0

total cycles in shared programs: 65739190 -> 65734530 (-0.01%)
cycles in affected programs: 180380 -> 175720 (-2.58%)
helped: 45
HURT: 1

No change on G45 or Ironlake.

I also tried these expressions, but none of them affected any shaders in
shader-db:

   (('bcsel', a, 'a@bool', 'b@bool'), ('ior', a, b)),
   (('bcsel', a, 'b@bool', False),    ('iand', a, b)),
   (('bcsel', a, 'b@bool', 'a@bool'), ('iand', a, b)),

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-03-31 14:59:36 -07:00
Ian Romanick
cdea12bf03 ptn: Fix all users of ptn_swizzle
None of the callers actually wanted what it did.  In ptn_xpd, you only
ever want a vec3 swizzle.  In ptn_tex, you want a swizzle that matches
the number of required texture coordinates.

shader-db results:

G45:
total instructions in shared programs: 4011240 -> 4010911 (-0.01%)
instructions in affected programs: 59232 -> 58903 (-0.56%)
helped: 114
HURT: 0

total cycles in shared programs: 84314194 -> 84313220 (-0.00%)
cycles in affected programs: 779150 -> 778176 (-0.13%)
helped: 110
HURT: 13

Ironlake:
total instructions in shared programs: 6397262 -> 6396605 (-0.01%)
instructions in affected programs: 117402 -> 116745 (-0.56%)
helped: 227
HURT: 0

total cycles in shared programs: 128889798 -> 128888524 (-0.00%)
cycles in affected programs: 1214644 -> 1213370 (-0.10%)
helped: 179
HURT: 44

Sandy Bridge:
total instructions in shared programs: 8467391 -> 8467384 (-0.00%)
instructions in affected programs: 3107 -> 3100 (-0.23%)
helped: 10
HURT: 6

total cycles in shared programs: 117580120 -> 117573448 (-0.01%)
cycles in affected programs: 103158 -> 96486 (-6.47%)
helped: 84
HURT: 11

Ivy Bridge:
total instructions in shared programs: 7774255 -> 7774258 (0.00%)
instructions in affected programs: 1677 -> 1680 (0.18%)
helped: 8
HURT: 6

total cycles in shared programs: 65743828 -> 65739190 (-0.01%)
cycles in affected programs: 89312 -> 84674 (-5.19%)
helped: 78
HURT: 23

Haswell:
total instructions in shared programs: 7107172 -> 7107150 (-0.00%)
instructions in affected programs: 2048 -> 2026 (-1.07%)
helped: 16
HURT: 0

total cycles in shared programs: 64653636 -> 64647486 (-0.01%)
cycles in affected programs: 86836 -> 80686 (-7.08%)
helped: 85
HURT: 17

Broadwell and Skylake:
total instructions in shared programs: 8447529 -> 8447507 (-0.00%)
instructions in affected programs: 2038 -> 2016 (-1.08%)
helped: 16
HURT: 0

total cycles in shared programs: 66418670 -> 66413416 (-0.01%)
cycles in affected programs: 90110 -> 84856 (-5.83%)
helped: 83
HURT: 20

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-03-31 14:59:36 -07:00
Ian Romanick
8bb9c6ff7f ptn: Silence unused parameter warning
The KIL instruction doesn't have a destination, so ptn_kil never uses
dest.

program/prog_to_nir.c: In function ‘ptn_kil’:
program/prog_to_nir.c:547:38: warning: unused parameter ‘dest’ [-Wunused-parameter]
 ptn_kil(nir_builder *b, nir_alu_dest dest, nir_ssa_def **src)
                                      ^

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-03-31 14:59:36 -07:00
Samuel Pitoiset
d22eca5f90 tgsi: silence compiler warning in fetch_sampler_unit()
The unit variable can be used uninitialized.

Fixes: 24e77cb09 ("tgsi: handle indirect sampler arrays. (v2)")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-04-01 07:16:24 +10:00
Samuel Pitoiset
05902a6686 tgsi: fix out of bounds access in exec_atomop()
The number of channels must be 4 for all RGBA components.

Fixes: 22d129601 ("tgsi: add support for image operations to tgsi_exec. (v2.1)")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-04-01 07:15:16 +10:00
Brian Paul
9076e04934 tgsi: split tgsi_util_get_texture_coord_dim() function into two
It was kind of overloaded, returning two different things.  Now get
the index of the shadow reference src register with a new
tgsi_util_get_shadow_ref_src_index() function.

To verify the new code, I added some temp/debug code which looped
over all TGSI_TEXTURE_x values, calling the old function and new and
checking that the returned indexes matched.

Also tested piglit "shadow" tests with softpipe/llvmpipe.
No testing of ilo and radeonsi changes.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 09:48:00 -06:00
Brian Paul
9d7cd43988 tgsi: skip texture query opcodes when examining texture targets
Should fix the assertion in piglit
spec@arb_gpu_shader5@texturegather@fs-r-none-shadow-2d when the
TXQ instruction specifies a 2D target but the sampler view was
declared as SHADOW2D.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2016-03-31 09:47:40 -06:00
Pierre Moreau
f96a403bc3 nv50/ir: Check for valid insn instead of def size
This fixes a null pointer dereference during the register allocation pass,
if a function had arguments.

Functions arguments get a definition from the function itself, a definition
which is therefore not linked to any instruction. If a value ends up having
a definition but no linked instruction, the register allocation pass doesn't
need to consider whether that value is generated by an instruction that
can only handle "short" registers (on nv50).

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
2016-03-31 10:30:29 -04:00
Ilia Mirkin
a94d8d51d7 mesa: add GL_EXT_copy_image support
The extension is identical to GL_OES_copy_image. But dEQP has tests that
want the EXT variant.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-30 22:57:17 -04:00
Ilia Mirkin
ebdb534548 mesa: add GL_OES_copy_image support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-30 22:57:17 -04:00
Ilia Mirkin
571f538a62 mesa: remove duplicate MAX_GEOMETRY_SHADER_INVOCATIONS entry
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-30 22:57:17 -04:00
Ilia Mirkin
2c7f5fe296 st/mesa: add ES sample-shading support
We require the full ARB_gpu_shader5 for now, but in the future some
other CAP could get exposed to indicate that only the multisample-related
behavior of ARB_gpu_shader5 is available.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-30 22:57:17 -04:00
Ilia Mirkin
3002296cb6 mesa: add GL_OES_shader_multisample_interpolation support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-03-30 22:57:17 -04:00
Ilia Mirkin
411a88accc mesa: add GL_OES_sample_shading support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-03-30 22:57:17 -04:00
Ilia Mirkin
5283e81015 glsl: add GL_OES_sample_variables support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-03-30 22:57:17 -04:00
Ilia Mirkin
6a8ca859f9 mesa: add OES_sample_variables to extension table, add enable bit
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-03-30 22:57:17 -04:00
Ilia Mirkin
903640c2ac glsl: add gl_MaxSamples, new in GL 4.5 / GL ES 3.2
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-03-30 22:57:17 -04:00
Matt Turner
4fea98991c i965: Don't add barrier deps for FB write messages.
Ken did this earlier, and this is just me reimplementing his patch a
little differently.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-03-30 19:54:30 -07:00
Matt Turner
3495265158 i965: Add and use is_scheduling_barrier() function. 2016-03-30 19:54:30 -07:00
Matt Turner
b4e223cfbf i965: Remove NOP insertion kludge in scheduler.
Instead of removing every instruction in add_insts_from_block(), just
move the instruction to its scheduled location. This is a step towards
doing both bottom-up and top-down scheduling without conflicts.

Note that this patch changes cycle counts for programs because it begins
including control flow instructions in the estimates.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-03-30 19:54:30 -07:00
Matt Turner
a607f4aa57 i965: Assert that an instruction is not inserted around itself.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-03-30 19:54:30 -07:00
Matt Turner
7b208a7312 i965: Relax restriction on scheduling last instruction.
I think when this code was written, basic blocks were always ended by a
control flow instruction or an end-of-thread message. That's no longer
the case, and removing this restriction actually helps things:

   instructions in affected programs: 7267 -> 7244 (-0.32%)
   helped: 4

   total cycles in shared programs: 66559580 -> 66431900 (-0.19%)
   cycles in affected programs: 28310152 -> 28182472 (-0.45%)
   helped: 9577
   HURT: 879

   GAINED: 2

The addition of the is_control_flow() checks is not a functional change,
since the add_insts_from_block() does not put them in the list of
instructions to schedule. I plan to change this in a later patch.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-03-30 19:54:30 -07:00
Matt Turner
f60750968c i965/vec4/tcs: Set conditional mod on TCS_OPCODE_SRC0_010_IS_ZERO.
Missing this causes an assertion failure in the scheduler with the next
patch.

Additionally, this gives cmod propagation enough information to optimize
code better.

total instructions in shared programs: 7112991 -> 7112852 (-0.00%)
instructions in affected programs: 25704 -> 25565 (-0.54%)
helped: 139

total cycles in shared programs: 64812898 -> 64810674 (-0.00%)
cycles in affected programs: 127224 -> 125000 (-1.75%)
helped: 139

Acked-by: Francisco Jerez <currojerez@riseup.net>
2016-03-30 19:54:30 -07:00
Matt Turner
436bdd7403 Revert "i965: Don't add barrier deps for FB write messages."
This reverts commit d0e1d6b7e2.

The change in the vec4 code is a mistake -- there's never an
FS_OPCODE_FB_WRITE in vec4 code.

The change in the fs code had the (harmless) effect of not recognizing
an FB_WRITE as a scheduling barrier even if it was marked EOT --
harmless because the scheduler marked the last instruction of a block as
a barrier, something I'm changing in the following patches.

This will be reimplemented later in the series.
2016-03-30 19:54:30 -07:00
Matt Turner
0d253ce34a i965: Simplify full scheduling-barrier conditions.
All of these were simply code for "architecture register file" (and in
the case of destinations, "not the null register").

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-03-30 19:54:30 -07:00
Matt Turner
65bc94022b i965: Remove incorrect cycle estimates.
These printed the cycle count the last basic block (sched.time is set
per basic block!). We have accurate, full program, data printed
elsewhere.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-03-30 19:54:29 -07:00
Dave Airlie
10b189f985 st/mesa: fix fallout from xfb changes.
Failed to update state tracker with new buffer interface.

Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:36:55 +10:00
Matt Turner
05ee6627d6 nir: Fix typo from commit 6702f1acde. 2016-03-30 19:18:35 -07:00
Timothy Arceri
c5704bb350 mesa: add query support for GL_TRANSFORM_FEEDBACK_BUFFER interface
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:53:02 +11:00
Timothy Arceri
7234be0338 glsl: add transform feedback buffers to resource list
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:52:57 +11:00
Timothy Arceri
9e317271d7 mesa: add support to query GL_TRANSFORM_FEEDBACK_BUFFER_INDEX
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:52:47 +11:00
Timothy Arceri
51142e7705 mesa: add support to query GL_OFFSET for GL_TRANSFORM_FEEDBACK_VARYING
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:52:43 +11:00
Timothy Arceri
047139e8a0 mesa: rename tranform feeback varying macro XFB to XFV
A latter patch will use XFB for buffers.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:52:39 +11:00
Timothy Arceri
b77c909878 glsl: always enable transform feedback mode when xfb_stride defined
This enables in shader defined transform feedback mode even if the
only place xfb_stride is defined is on the global out.

We don't worry about xfb_buffer since Issue 22 c) in the spec says:

   "If the shader has an "xfb_buffer" qualifier identifying a buffer,
    but doesn't declare "xfb_offset" on anything associated with it,
    what happens?

    ...

    variables not qualified with "xfb_offset" are not captured, which
    makes the associated "xfb_buffer" qualifier irrelevant."

Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:52:34 +11:00
Timothy Arceri
c95e92b14d glsl: handle varyings that are not written to but have an xfb_offset
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:52:29 +11:00
Timothy Arceri
d5c09d40b9 glsl: when lowering named interface set assigned flag
This will be used when checking if xfb should attempt to capture
a varying.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:52:22 +11:00
Timothy Arceri
a2fbc5ed44 glsl: reset current stream tracker
When we move to the next buffer we need to reset the stream
so that we don't generate an error message about streams not
matching.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:52:17 +11:00
Timothy Arceri
f2a3c87a00 glsl: generate link error when implicit stride is to large
This moves the check until after we have done the stride
calculation and applies it to the xfb_* qualifiers.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:52:11 +11:00
Timothy Arceri
2fab85aaea glsl: add xfb_stride link time validation
From the ARB_enhanced_layous spec:

   "It is a compile-time or link-time error to have any *xfb_offset*
    that overflows *xfb_stride*, whether stated on declarations before
    or after the *xfb_stride*, or in different compilation units.

    ...

    When no *xfb_stride* is specified for a buffer, the stride of a
    buffer will be the smallest needed to hold the variable placed at
    the highest offset, including any required padding."

Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:52:05 +11:00
Timothy Arceri
8120e869b1 glsl: validate global out xfb_stride qualifiers and set stride on empty buffers
Here we use the built-in validation in
ast_layout_expression::process_qualifier_constant() to check for mismatching
global out strides on buffers in a single shader.

From the ARB_enhanced_layouts spec:

   "While *xfb_stride* can be declared multiple times for the same buffer,
   it is a compile-time or link-time error to have different values
   specified for the stride for the same buffer."

For intrastage validation a new helper link_xfb_stride_layout_qualifiers()
is created. We also take this opportunity to make sure stride is at least
a multiple of 4, we will validate doubles at a later stage.

From the ARB_enhanced_layouts spec:

   "If the buffer is capturing any double-typed outputs, the stride must
   be a multiple of 8, otherwise it must be a multiple of 4, or a
   compile-time or link-time error results."

Finally we update store_tfeedback_info() to apply the strides to
LinkedTransformFeedback and update the buffers bitmask to mark any global
buffers with a stride as active. For example a shader with:

layout (xfb_buffer = 0, xfb_offset = 0)  out vec4 gs_fs;
layout (xfb_buffer = 1, xfb_stride = 64) out;

Is expected to have a buffer bound to both 0 and 1.

From the ARB_enhanced_layouts spec:

   "A binding point requires a bound buffer object if and only if its
   associated stride in the program object used for transform feedback
   primitive capture is non-zero."

Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:52:00 +11:00
Timothy Arceri
cf039a309a mesa: split transform feedback buffer into its own struct
This will be used in a following patch to implement interface
query support for TRANSFORM_FEEDBACK_BUFFER.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:51:52 +11:00
Timothy Arceri
258299d87a glsl: use bitmask of active xfb buffer indices
This allows us to print the correct binding point when not all
buffers declared in the shader are bound.

For example if we use a single buffer:

layout(xfb_buffer=2, offset=0) out vec4 v;

We now print '2' when the buffer is not bound rather than '0'.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:51:47 +11:00
Timothy Arceri
99cb5151ed glsl: sort xfb varyings in offset/buffer order
The existing transform feedback code expects to receive the list
of varyings in increasing buffer order.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:51:38 +11:00
Timothy Arceri
0c66460fc6 glsl: basic linking support for xfb qualifiers
This adds the initial infrastructure for enabling transform feedback
mode via in shader qualifiers and adds initial buffer support.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:51:33 +11:00
Timothy Arceri
4305a60173 glsl: add xfb helpers and fields to the tfeedback_decl class
We also apply any array/struct offsets.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:51:27 +11:00
Timothy Arceri
0822517936 glsl: add helper to process xfb qualifiers during linking
This function checks for any xfb_* qualifiers which will enable
transform feedback mode and cause any API defined xfb varyings
to be ignored.

It also counts the number of varyings that have a xfb_offset
qualifier and finally it calls the create_xfb_varying_names()
helper to generate the names of varyings to be caputured.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-03-31 12:51:21 +11:00