Commit graph

76520 commits

Author SHA1 Message Date
Jason Ekstrand
dba28da075 anv/buffer_view: Store a bo + offset instead of buffer pointer
This is what image_view does.  Also, we really need to do this so that we
can properly handle the combined offsets from the buffer and from
pCreateInfo.

This fixes some of the nonzero offset buffer view CTS tests.
2015-12-14 14:10:40 -08:00
Chad Versace
ee57062e1e anv: Remove anv_image::surface_type
When building RENDER_SURFACE_STATE, the driver set
SurfaceType = anv_image::surface_type, which was calculated during
anv_image_init(). This was bad because the value of
anv_image::surface_type was taken from a gen-specific header,
gen8_pack.h, even though the anv_image structure is used for all gens.

Replace anv_image::surface_type with a gen-specific lookup function,
anv_surftype(), defined in gen${x}_state.c.

The lookup function contains some useful asserts that caught some nasty
bugs in anv meta, which were fixed in the previous commit.
2015-12-14 10:46:27 -08:00
Chad Versace
f0d11d5a81 anv/meta: Fix VkImageViewType
Meta unconditionally used VK_IMAGE_VIEW_TYPE_2D in the functions below.
This caused some out-of-bound memory accesses.
  anv_CmdCopyImage
  anv_CmdBlitImage
  anv_CmdCopyBufferToImage
  anv_CmdClearColorImage

Fix it by adding a new function, anv_meta_get_view_type().
2015-12-14 09:03:58 -08:00
Chad Versace
0bebaeacd7 isl: Rename s/lod_align/image_align/ for consistency
Regarding the subimages within a surface, sometimes isl called them
"images" and sometimes "LODs". This patch make isl consistently refer to
them as "images".  I choose the term "image" over "LOD" because LOD is
an misnomer when applied to 3D surfaces. The alignment applies to each
individual 2D subimage, not to the LOD as a whole.

This patch changes no behavior. It's just a manually performed,
case-insensitive, replacement s/lod/image/ that maintains correct
indentation.  any behavior.
2015-12-14 09:01:51 -08:00
Chad Versace
85a6384014 anv/tests: gitignore block_pool_no_free 2015-12-14 09:00:28 -08:00
Chad Versace
0da776b733 anv: Fix build for unit tests
Clearly no one has been running `make check`, because the unittestbuild
has been broken for a long time. After this buildfix, all tests now
pass.
2015-12-14 09:00:28 -08:00
Jason Ekstrand
c56186026f anv: Add initial support for texel buffers 2015-12-12 16:11:23 -08:00
Jason Ekstrand
fd944197f2 i965/nir: Provide a default LOD for buffer textures
Our hardware requires an LOD for all texelFetch commands even if they are
on buffer textures.  GLSL IR gives us an LOD of 0 in that case, but the LOD
is really rather meaningless.  This commit allows other NIR producers to be
more lazy and not provide one at all.
2015-12-12 16:09:54 -08:00
Jason Ekstrand
1c605c8dfa Merge remote-tracking branch 'mesa-public/master' into vulkan
This pulls in a shared local memory fix.
2015-12-11 14:29:13 -08:00
Jason Ekstrand
b8425bb1e8 i965/fs: Use the correct source for local memory load offsets
The offset for loads is in src[0].  This was a copy+paste error in the
nir_intrinsic_load/store refactoring.  This commit fixes a segfault in
ES31-CTS.compute_shader.work-group-size.  I have no idea how piglit failed
to catch this...

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93348
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-11 13:56:34 -08:00
Jason Ekstrand
d12ea21dd5 gen8/pipeline: Support vec4 vertex shaders
In order to actually get them, you need INTEL_DEBUG=vec4.
2015-12-11 13:25:17 -08:00
Kenneth Graunke
fadf378497 i965: Add Gen8+ tessellation control shader state (3DSTATE_HS).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-12-11 13:11:15 -08:00
Kenneth Graunke
b3c32f5f34 i965: Add Gen7+ tessellation engine state (3DSTATE_TE).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-12-11 13:11:15 -08:00
Kenneth Graunke
37b0b11cef i965: Add Gen8+ tessellation evaluation shader state (3DSTATE_DS).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-12-11 13:11:15 -08:00
Kenneth Graunke
86a6eda9bc i965: Add tessellation shader push constant support.
Based on a patch by Chris Forbes.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-12-11 13:11:15 -08:00
Kenneth Graunke
c59d1b1fd1 i965: Add tessellation shader sampler support.
Based on code by Chris Forbes and Fabian Bieler.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-12-11 13:11:15 -08:00
Kenneth Graunke
f34c04fda6 i965: Add tessellation shader surface support.
This is brw_gs_surface_state.c copy and pasted twice with search and
replace.

brw_binding_table.c code is similarly copy and pasted.

v2: Drop dword_pitch related fields.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-12-11 13:11:15 -08:00
Kenneth Graunke
82455e5396 i965: Make fs_visitor::emit_urb_writes set EOT for TES as well.
Tessellation evaluation shaders work almost identically to vertex
shaders - we have a set of URB writes at the end of the program, and the
last one should terminate it.

Geometry shaders really are the special case, where multiple
EmitVertex() calls trigger URB writes in the middle of the program.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-11 13:11:15 -08:00
Kenneth Graunke
7e0c22d461 i965: Don't hardcode g1 for URB handles in fs_visitor::emit_urb_writes().
Tessellation evaluation shaders will use g4 instead.  For now, make an
fs_reg called urb_handle and use that in place of hardcoding g1.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-11 13:11:15 -08:00
Kenneth Graunke
77b338d63b i965: Make brw_set_message_descriptor() non-static.
I want to use this directly from brw_vec4_generator.cpp.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-11 13:11:15 -08:00
Kristian Høgsberg Kristensen
e803276148 Revert "i965/HACK: Build brw_cs into libcompiler"
This reverts commit 6df7963531.
2015-12-11 13:09:42 -08:00
Kristian Høgsberg Kristensen
21d5e52da8 Merge ../mesa into vulkan 2015-12-11 13:09:06 -08:00
Kristian Høgsberg Kristensen
c51f133197 i965: Move brw_cs_fill_local_id_payload() to libi965_compiler
This is a helper function for setting up the local invocation ID
payload according to the cs_prog_data generated by the compiler. It's
intended to be available to users of libi965_compiler so move it there.
2015-12-11 13:07:25 -08:00
Eric Anholt
076551116e vc4: Add quick algebraic optimization for clamping of unpacked values.
GL likes to saturate your incoming color, but if that color's coming from
unpacking from unorms, there's no point.  Ideally we'd have a range
propagation pass that cleans these up in NIR, but that doesn't seem to be
going to land soon.  It seems like we could do a one-off optimization in
nir_opt_algebraic, except that doesn't want to operate on expressions
involving unpack_unorm_4x8, since it's sized.

total instructions in shared programs: 87879 -> 87761 (-0.13%)
instructions in affected programs:     6044 -> 5926 (-1.95%)
total estimated cycles in shared programs: 349457 -> 349252 (-0.06%)
estimated cycles in affected programs:     6172 -> 5967 (-3.32%)

No SSPD on openarena (which had the biggest gains, in its VS/CSes), n=15.
2015-12-11 12:36:16 -08:00
Eric Anholt
e3efc4b023 vc4: When doing algebraic optimization into a MOV, use the right MOV.
If there were src unpacks, changing to the integer MOV instead of float
(for example) would change the unpack operation.
2015-12-11 12:21:22 -08:00
Eric Anholt
2591beef89 vc4: Fix handling of src packs on in qir_follow_movs().
The caller isn't going to expect it from a return, so it would probably
get misinterpreted.  If the caller had an unpack in its reg, that's fine,
but don't lose track of it.
2015-12-11 12:21:22 -08:00
Eric Anholt
b70a2f4d81 vc4: Add missing progress note in opt_algebraic. 2015-12-11 12:21:22 -08:00
Eric Anholt
5989ef2b0f vc4: Add debugging of the estimated time to run the shader to shader-db. 2015-12-11 12:21:22 -08:00
Eric Anholt
53b2523c6e vc4: Fix handling of sample_mask output.
I apparently broke this in a late refactor, in such a way that I decided
its tests were some of those interminable ones that I should just
blacklist from my testing.  As a result, the refactors related to it were
totally wrong.
2015-12-11 12:21:22 -08:00
Edward O'Callaghan
53609de762 softpipe: enable GL_ARB_viewport_array support, update GL3.txt doc
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-12-11 20:09:21 +01:00
Edward O'Callaghan
00f97ad5de softpipe: implement some support for multiple viewports
Mostly related to making sure the rasterizer can correctly
pick out the correct scissor box for the current viewport.

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-12-11 20:09:21 +01:00
Roland Scheidegger
6c2c1e0ffe draw: don't assume fixed offset for data in struct vertex_info
Otherwise, if struct vertex_info is changed, you're in for some surprises...

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-12-11 20:09:21 +01:00
Neil Roberts
583a5778f4 i965/gen9: Don't do fast clears when GL_FRAMEBUFFER_SRGB is enabled
When GL_FRAMEBUFFER_SRGB is enabled any single-sampled renderbuffers
are resolved in intel_update_state because the hardware can't cope
with fast clears on SRGB buffers. In that case it's pointless to do a
fast clear because it will just be immediately resolved.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-12-11 18:05:56 +00:00
Neil Roberts
0033c81344 i965/gen9: Allow fast clears for non-MSRT SRGB buffers
SRGB buffers are not marked as losslessly compressible so previously
they would not be used for fast clears. However in practice the
hardware will never actually see that we are using SRGB buffers for
fast clears if we use the linear equivalent format when clearing and
make sure to resolve the buffer as a linear format before sampling
from it.

This is an important use case because by default the window system
framebuffers are created as SRGB so without this fast clears won't be
used there.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-12-11 18:05:56 +00:00
Neil Roberts
82d459a423 i965/gen9: Resolve SRGB color buffers when GL_FRAMEBUFFER_SRGB enabled
SKL can't cope with the CCS buffer for SRGB buffers. Normally the
hardware won't see the SRGB formats because when GL_FRAMEBUFFER_SRGB
is disabled these get mapped to their linear equivalents. In order to
avoid relying on the CCS buffer when it is enabled this patch now
makes it flush the renderbuffers.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-12-11 18:05:56 +00:00
Neil Roberts
eb291d7013 i965/gen8+: Don't upload the MCS buffer for single-sampled textures
For single-sampled textures the MCS buffer is only used to implement
fast clears. However the surface always needs to be resolved before
being used as a texture anyway so the the MCS buffer doesn't actually
achieve anything. This is important for Gen9 because in that case SRGB
surfaces are not supported for fast clears and we don't want the
hardware to see the MCS buffer in that case.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-12-11 18:05:56 +00:00
Neil Roberts
44902ed1fa i965/meta-fast-clear: Disable GL_FRAMEBUFFER_SRGB during clear
Adds MESA_META_FRAMEBUFFER_SRGB to the meta save state so that
GL_FRAMEBUFFER_SRGB will be disabled when performing the fast clear.
That way the render surface state will be programmed with the linear
equivalent format during the clear. This is important for Gen9 because
the SRGB formats are not marked as losslessly compressible so in
theory they aren't support for fast clears. It shouldn't make any
difference whether GL_FRAMEBUFFER_SRGB is enabled for the fast clear
operation because the color is not actually written to the framebuffer
so there is no chance for the hardware to apply the SRGB conversion on
it anyway.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-12-11 18:05:56 +00:00
Marek Olšák
369afdb7b6 winsys/amdgpu: clear the buffer cache on mmap failure and try again
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-12-11 15:25:13 +01:00
Marek Olšák
84a38bfc29 winsys/radeon: clear the buffer cache on mmap failure and try again
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-12-11 15:25:13 +01:00
Marek Olšák
eb1e1af676 winsys/amdgpu: clear the buffer cache on allocation failure and try again
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-12-11 15:25:13 +01:00
Marek Olšák
f9d6fe8001 winsys/radeon: clear the buffer cache on allocation failure and try again
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-12-11 15:25:13 +01:00
Marek Olšák
cf811faeff gallium/radeon: remove radeon_winsys_cs_handle
"radeon_winsys_cs_handle *cs_buf" is now equivalent to "pb_buffer *buf".

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-12-11 15:25:13 +01:00
Marek Olšák
cf422d20ff winsys/radeon: use pb_cache instead of pb_cache_manager
This is a prerequisite for the removal of radeon_winsys_cs_handle.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-12-11 15:25:13 +01:00
Marek Olšák
ebc9497fcb winsys/radeon: use radeon_bomgr less
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-12-11 15:25:13 +01:00
Marek Olšák
a450f96ba9 winsys/radeon: rename radeon_bomgr_init_functions
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-12-11 15:25:13 +01:00
Marek Olšák
38ac20f7dd winsys/radeon: move variables from radeon_bomgr to radeon_drm_winsys
radeon_bomgr is going away.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-12-11 15:25:13 +01:00
Marek Olšák
3d090223ef winsys/radeon: remove redundant radeon_bomgr::va
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-12-11 15:25:12 +01:00
Marek Olšák
1e05812fcd winsys/amdgpu: don't use the "rws" abbreviation for amdgpu_winsys
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-12-11 15:25:12 +01:00
Marek Olšák
6f4e74d165 winsys/amdgpu: use pb_cache instead of pb_cache_manager
This is a prerequisite for the removal of radeon_winsys_cs_handle.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-12-11 15:25:12 +01:00
Marek Olšák
3fbf250dfa gallium/pb_bufmgr_cache: use the new pb_cache module
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
2015-12-11 15:25:12 +01:00