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vc4: Add debugging of the estimated time to run the shader to shader-db.
This commit is contained in:
Eric Anholt
parent
53b2523c6e
commit
5989ef2b0f
3 changed files with 50 additions and 17 deletions
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@ -502,7 +502,7 @@ nir_ssa_def *vc4_nir_get_swizzled_channel(struct nir_builder *b,
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void vc4_nir_lower_txf_ms(struct vc4_compile *c);
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void qir_lower_uniforms(struct vc4_compile *c);
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void qpu_schedule_instructions(struct vc4_compile *c);
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uint32_t qpu_schedule_instructions(struct vc4_compile *c);
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void qir_SF(struct vc4_compile *c, struct qreg src);
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@ -513,7 +513,8 @@ vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c)
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}
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}
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qpu_schedule_instructions(c);
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uint32_t cycles = qpu_schedule_instructions(c);
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uint32_t inst_count_at_schedule_time = c->qpu_inst_count;
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/* thread end can't have VPM write or read */
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if (QPU_GET_FIELD(c->qpu_insts[c->qpu_inst_count - 1],
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@ -556,6 +557,15 @@ vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c)
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break;
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}
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cycles += c->qpu_inst_count - inst_count_at_schedule_time;
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if (vc4_debug & VC4_DEBUG_SHADERDB) {
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fprintf(stderr, "SHADER-DB: %s prog %d/%d: %d estimated cycles\n",
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qir_get_stage_name(c->stage),
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c->program_id, c->variant_id,
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cycles);
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}
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if (vc4_debug & VC4_DEBUG_QPU)
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vc4_dump_program(c);
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@ -50,6 +50,9 @@ struct schedule_node {
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uint32_t child_array_size;
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uint32_t parent_count;
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/* Longest cycles + n->latency of any parent of this node. */
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uint32_t unblocked_time;
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/**
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* Minimum number of cycles from scheduling this instruction until the
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* end of the program, based on the slowest dependency chain through
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@ -90,6 +93,8 @@ struct schedule_state {
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struct schedule_node *last_tlb;
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struct schedule_node *last_vpm;
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enum direction dir;
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/* Estimated cycle when the current instruction would start. */
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uint32_t time;
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};
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static void
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@ -599,10 +604,8 @@ update_scoreboard_for_chosen(struct choose_scoreboard *scoreboard,
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static void
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dump_state(struct list_head *schedule_list)
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{
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uint32_t i = 0;
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list_for_each_entry(struct schedule_node, n, schedule_list, link) {
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fprintf(stderr, "%3d: ", i++);
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fprintf(stderr, " t=%4d: ", n->unblocked_time);
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vc4_qpu_disasm(&n->inst->inst, 1);
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fprintf(stderr, "\n");
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@ -611,7 +614,7 @@ dump_state(struct list_head *schedule_list)
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if (!child)
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continue;
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fprintf(stderr, " - ");
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fprintf(stderr, " - ");
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vc4_qpu_disasm(&child->inst->inst, 1);
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fprintf(stderr, " (%d parents, %c)\n",
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child->parent_count,
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@ -638,6 +641,7 @@ compute_delay(struct schedule_node *n)
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static void
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mark_instruction_scheduled(struct list_head *schedule_list,
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uint32_t time,
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struct schedule_node *node,
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bool war_only)
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{
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@ -654,6 +658,14 @@ mark_instruction_scheduled(struct list_head *schedule_list,
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if (war_only && !node->children[i].write_after_read)
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continue;
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/* If the requirement is only that the node not appear before
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* the last read of its destination, then it can be scheduled
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* immediately after (or paired with!) the thing reading the
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* destination.
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*/
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int latency_from_previous = war_only ? 0 : node->latency;
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child->unblocked_time = MAX2(child->unblocked_time,
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time + latency_from_previous);
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child->parent_count--;
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if (child->parent_count == 0)
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list_add(&child->link, schedule_list);
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@ -662,10 +674,11 @@ mark_instruction_scheduled(struct list_head *schedule_list,
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}
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}
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static void
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static uint32_t
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schedule_instructions(struct vc4_compile *c, struct list_head *schedule_list)
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{
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struct choose_scoreboard scoreboard;
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uint32_t time = 0;
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/* We reorder the uniforms as we schedule instructions, so save the
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* old data off and replace it.
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@ -708,9 +721,10 @@ schedule_instructions(struct vc4_compile *c, struct list_head *schedule_list)
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uint64_t inst = chosen ? chosen->inst->inst : qpu_NOP();
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if (debug) {
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fprintf(stderr, "current list:\n");
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fprintf(stderr, "t=%4d: current list:\n",
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time);
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dump_state(schedule_list);
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fprintf(stderr, "chose: ");
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fprintf(stderr, "t=%4d: chose: ", time);
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vc4_qpu_disasm(&inst, 1);
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fprintf(stderr, "\n");
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}
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@ -719,8 +733,10 @@ schedule_instructions(struct vc4_compile *c, struct list_head *schedule_list)
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* find an instruction to pair with it.
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*/
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if (chosen) {
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time = MAX2(chosen->unblocked_time, time);
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list_del(&chosen->link);
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mark_instruction_scheduled(schedule_list, chosen, true);
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mark_instruction_scheduled(schedule_list, time,
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chosen, true);
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if (chosen->uniform != -1) {
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c->uniform_data[next_uniform] =
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uniform_data[chosen->uniform];
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@ -733,6 +749,7 @@ schedule_instructions(struct vc4_compile *c, struct list_head *schedule_list)
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schedule_list,
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chosen);
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if (merge) {
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time = MAX2(merge->unblocked_time, time);
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list_del(&merge->link);
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inst = qpu_merge_inst(inst, merge->inst->inst);
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assert(inst != 0);
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@ -745,10 +762,11 @@ schedule_instructions(struct vc4_compile *c, struct list_head *schedule_list)
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}
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if (debug) {
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fprintf(stderr, "merging: ");
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fprintf(stderr, "t=%4d: merging: ",
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time);
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vc4_qpu_disasm(&merge->inst->inst, 1);
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fprintf(stderr, "\n");
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fprintf(stderr, "resulting in: ");
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fprintf(stderr, " resulting in: ");
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vc4_qpu_disasm(&inst, 1);
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fprintf(stderr, "\n");
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}
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@ -768,13 +786,16 @@ schedule_instructions(struct vc4_compile *c, struct list_head *schedule_list)
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* be scheduled. Update the children's unblocked time for this
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* DAG edge as we do so.
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*/
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mark_instruction_scheduled(schedule_list, chosen, false);
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mark_instruction_scheduled(schedule_list, merge, false);
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mark_instruction_scheduled(schedule_list, time, chosen, false);
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mark_instruction_scheduled(schedule_list, time, merge, false);
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scoreboard.tick++;
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time++;
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}
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assert(next_uniform == c->num_uniforms);
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return time;
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}
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static uint32_t waddr_latency(uint32_t waddr)
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@ -784,7 +805,7 @@ static uint32_t waddr_latency(uint32_t waddr)
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/* Some huge number, really. */
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if (waddr >= QPU_W_TMU0_S && waddr <= QPU_W_TMU1_B)
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return 10;
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return 100;
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switch(waddr) {
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case QPU_W_SFU_RECIP:
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@ -804,7 +825,7 @@ instruction_latency(uint64_t inst)
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waddr_latency(QPU_GET_FIELD(inst, QPU_WADDR_MUL)));
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}
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void
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uint32_t
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qpu_schedule_instructions(struct vc4_compile *c)
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{
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void *mem_ctx = ralloc_context(NULL);
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@ -849,7 +870,7 @@ qpu_schedule_instructions(struct vc4_compile *c)
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compute_delay(n);
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}
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schedule_instructions(c, &schedule_list);
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uint32_t cycles = schedule_instructions(c, &schedule_list);
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if (debug) {
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fprintf(stderr, "Post-schedule instructions\n");
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@ -858,4 +879,6 @@ qpu_schedule_instructions(struct vc4_compile *c)
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}
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ralloc_free(mem_ctx);
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return cycles;
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}
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