Commit graph

55 commits

Author SHA1 Message Date
Rafael Antognolli
872ffb2221 genxml: Add alias for MOCS.
Use an alias, so we can set the same value as the #define's.

v3:
   - Call it "SO Buffer MOCS" to follow the most common naming scheme.
   - Add alias for gen7 and gen75 too (Ken).

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-05-03 16:41:02 -07:00
Rafael Antognolli
9670124e31 genxml: Make BLEND_STATE command support variable length array.
We need to emit BLEND_STATE, which size is 1 + 2 * nr_draw_buffers
dwords (on gen8+), but the BLEND_STATE struct length is always 17. By
marking it size 1, which is actually the size of the struct minus the
BLEND_STATE_ENTRY's, we can emit a BLEND_STATE of variable number of
entries.

For gen6 and gen7 we set length to 0, since it only contains
BLEND_STATE_ENTRY's, and no other data.

With this change, we also change the code for blorp and anv to emit only
the needed BLEND_STATE_ENTRY's, instead of always emitting 16 dwords on
gen6-7 and 17 dwords on gen8+.

v2:
   - Use designated initializers on blorp and remove 0 from
   initialization (Jason)
   - Default entries to disabled on Vulkan (Jason)
   - Rebase code.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-04-24 15:14:10 -07:00
Jason Ekstrand
e23129ac0c genxml: Add better support for MI_MATH
This breaks the guts of MI_MATH (the instruction part) out into its own
structure with proper named values.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed by: Iago Toral Quiroga <itoral@igalia.com>
2017-04-20 15:24:06 -07:00
Lionel Landwerlin
567d77885e intel: genxml: add RING_BUFFER_CTL registers
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2017-04-04 21:22:26 +01:00
Lionel Landwerlin
6f260ff049 intel: genxml: add FAULT_REG register
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2017-04-04 21:22:26 +01:00
Lionel Landwerlin
84613bf6d5 intel: genxml: add ACTHD registers
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2017-04-04 21:22:26 +01:00
Lionel Landwerlin
0f195f22aa intel: genxml: add GFX_ARB_ERROR_RPT register
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2017-04-04 21:22:26 +01:00
Lionel Landwerlin
d1a7a54d77 intel: genxml: add INSTDONE registers
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2017-04-04 21:22:26 +01:00
Jason Ekstrand
e6621746dc genxml: Whitespace fixes
Some field names had extra spaces and some had places where we should
have had a space but didn't.

Reviewed-by: Chad Versace <chadversary@chromium.org>
2017-03-24 15:00:37 -07:00
Jason Ekstrand
ec27402a8f genxml/gen8: Remove BLACK_LEVEL_CORRECTION_STATE
We've never used it, it only exists on gen8, and the name of the struct
contains piles of bad characters.

Reviewed-by: Chad Versace <chadversary@chromium.org>
2017-03-24 15:00:37 -07:00
Jason Ekstrand
1d5f4f46da genxml: Make MI_STORE_DATA_IMM have a single 64-bit data field
This is way more convenient than having two separate dword fields.

Reviewed-By: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-03-17 15:31:19 -07:00
Jason Ekstrand
2a616242cd genxml: s/Clipper Statistics Enable/Statistics Enable/
It's in 3DSTATE_CLIP, so it doesn't really need the extra detail.  This
matches what we do for VS, FS, etc.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-03-17 12:12:50 -07:00
Jason Ekstrand
7de73f0c94 genxml: Add pipeline statistics registers on gen7+
Reviewed-By: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-03-17 12:12:50 -07:00
Jason Ekstrand
9e60f59e62 genxml: Add XML version tags
There's not much point to having them or not having them but this
reduces some pointless diff from the version we can auto-generate

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-03-16 15:08:17 -07:00
Jason Ekstrand
62bba4ba2d genxml: Add the CACHE_MODE_1 register on gen8
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-02-14 14:18:55 -08:00
Kenneth Graunke
195bf8f027 genxml: Rename 3DSTATE_HS::Enable to "Function Enable".
"Function Enable" is what the other stages use.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-10 13:20:33 -08:00
Kenneth Graunke
e0c1ec3b09 genxml: Make Gen8 3DSTATE_DS SIMD8 enable work like Gen9+.
This will let us avoid ifdefs.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2016-12-14 14:59:06 -08:00
Kristian H. Kristensen
7fc659d8d5 intel/genxml: Fix ksp for INTERFACE_DESCRIPTOR_DATA
This one was split across two dwords as "Kernel Start Pointer" and
"Kernel Start Pointer High", which looks like it works when the driver
only accesses "Kernel Start Pointer". This breaks, of course, with BO
offsets > 4G.

Signed-off-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-11-29 22:02:49 -08:00
Kristian H. Kristensen
99e573b4e0 intel/genxml: Use enum 3D_Logic_Op_Function where applicable
Signed-off-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-11-29 22:02:49 -08:00
Kristian H. Kristensen
374d19ac00 intel/genxml: Use blend function and factor enums where applicable
Signed-off-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-11-29 22:02:49 -08:00
Kristian H. Kristensen
09fe8ad010 intel/genxml: Use enum 3D_Vertex_Component_Control where applicable
Signed-off-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-11-29 22:02:49 -08:00
Kristian H. Kristensen
54e71e5851 intel/genxml: Use enum 3D_Stencil_Operation where applicable
Signed-off-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-11-29 22:02:49 -08:00
Kristian H. Kristensen
193c1b72e0 intel/genxml: Use enum SURFACE_FORMAT where applicable
Signed-off-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-11-29 22:02:49 -08:00
Kristian H. Kristensen
0799022bf9 intel/genxml: Use enum 3D_Prim_Topo_Type where applicable
Signed-off-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-11-29 22:02:49 -08:00
Kristian H. Kristensen
993babc014 intel/genxml: Use 3D_Compare_Function for gen8+ test functions
When the state fields where shuffled around for gen8, the compare
function enums were downgraded to just uints. Change them to enum
3D_Compare_Function.

Signed-off-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-11-29 22:02:49 -08:00
Kristian H. Kristensen
be9c2ab23b intel/genxml: Move enums above structs
We'll need to define them before we can reference them in structs and
instructions. Enums have no dependencies, so move them first in the
file.

Signed-off-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-11-29 22:02:49 -08:00
Kristian H. Kristensen
ce26486115 genxml: Add values for Barycentric Interpolation Mode
Signed-off-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-11-29 22:02:49 -08:00
Jason Ekstrand
184bbfd69b intel/genxml: Add SO_WRITE_OFFSET registers for gen7-9
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-11-16 10:10:26 -08:00
Jason Ekstrand
1587ac1edc intel/genxml: Make 3DSTATE_WM more consistent across gens
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-11-16 10:09:03 -08:00
Jason Ekstrand
9da442b63a intel/genxml: Make some 3DSTATE_GS fields more consistent
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
2016-11-16 10:08:51 -08:00
Lionel Landwerlin
0ca134aa9f intel: genxml: add SAMPLER_BORDER_COLOR_STATE structures
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-18 22:43:41 +01:00
Jason Ekstrand
1f3e6468d2 anv/cmd_buffer: Unify flush_compute_state across gens
With one small genxml change, the two versions were basically identical.
The only differences were one #define for HSW+ and a field that is missing
on Haswell but exists everywhere else.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-10-17 17:41:35 -07:00
Jason Ekstrand
6ef5a44a43 intel/genxml: Make some PIPE_CONTROL fields booleans
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-10-15 12:20:50 -07:00
Jason Ekstrand
f34de3e8b0 intel/genxml: Make "Predication enable" a boolean
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-10-15 12:20:46 -07:00
Jason Ekstrand
468e1042cb intel/genxml; Make "Use Global GTT a boolean
We also remove the redundant zero defaults since everything without an
explicit default gets zeroed automatically.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-10-15 12:20:43 -07:00
Jason Ekstrand
fa0285eaac intel/genxml: Make "Stencil Buffer Enable" a boolean
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-10-15 12:20:30 -07:00
Jason Ekstrand
34826078f6 intel/genxml: Make a couple of STREAMOUT fields booleans
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-10-15 12:20:26 -07:00
Jason Ekstrand
6a064ad01d intel/genxml: Make "Include Vertex Handles" and "Include Primitive ID" booleans
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-10-15 12:20:23 -07:00
Jason Ekstrand
aee501c87e intel/genxml: Make "Single Program Flow" a boolean
We also get rid of the "(SPF)" a few places.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-10-15 12:20:14 -07:00
Jason Ekstrand
c1fcf1a957 intel/genxml: Add a uint MOCS field to 3DSTATE_STENCIL_BUFFER
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2016-10-14 15:39:41 -07:00
Jason Ekstrand
bfdff28d68 genxml: Add a uint MOCS field to VERTEX_BUFFER_STATE
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-08-19 03:11:29 -07:00
Jason Ekstrand
373613fa4b genxml: Make a couple of VERTEX_BUFFER_STATE fields boolean
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-08-19 03:11:29 -07:00
Jason Ekstrand
29f1f945a6 genxml: Make VERTEX_ELEMENT_STATE::Valid a bool
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-08-19 03:11:29 -07:00
Jason Ekstrand
2a84e40dae genxml: Add a uint MOCS field to DEPTH_BUFFER packets
This is easier than dealing with structs all the time

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-08-19 03:11:29 -07:00
Kenneth Graunke
87660579f5 genxml: Rename "API Rendering Disable" to "Rendering Disable".
Gen7/7.5 call it "Rendering Disable" while Gen8/9 prefix it with "API".

Pick one for consistency, and so we can share code between generations.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-20 10:59:44 -07:00
Kenneth Graunke
6b67270262 genxml: Add APIMODE_D3D missing enum values and improve consistency.
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-20 10:59:44 -07:00
Kenneth Graunke
c31cf532af genxml: Add CLIPMODE_* prefix to 3DSTATE_CLIP's "Clip Mode" enum values.
Gen6-7.5 use CLIPMODE_REJECT_ALL, while Gen8+ just used REJECT_ALL.
Being consistent will let me unify code, and I prefer having the prefix.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-20 10:59:44 -07:00
Jason Ekstrand
ba798ac6b1 genxml: Make X/Y Offset field of SURFACE_STATE a uint
THe offset type has special implications that it's intended to be some form
of aligned memory address.  These assumptions allow it to handle the case
where there is some alignment requirement on the offset and the bottom bits
are used for other things.  However, the offsets in the surface state field
are really just unsigned integers.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-15 15:53:48 -07:00
Jason Ekstrand
45c0f60999 genxml: Make ScratchSpaceBasePointer an address instead of an offset
While we're here, we also fixup MEDIA_VFE_STATE and rename the field in
3DSTATE_VS on gen6-7.5 to be consistent with the others.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-06-22 12:39:42 -07:00
Jason Ekstrand
de1d194856 genxml/gen8,9: Prefix the multisample format enum with MSFMT
This is what gen7 does and it's nice to have a prefix

Reviewed-by: Chad Versace <chad.versace@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-06-22 12:26:43 -07:00