Commit graph

473 commits

Author SHA1 Message Date
Bas Nieuwenhuizen
d8bd693d03 ac/nir: Add function creation for merged LS+HS.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-19 22:25:00 +02:00
Bas Nieuwenhuizen
0cdc8b26f8 ac/nir: Make scan_shader_output_decl less dependent on the context.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-19 22:24:56 +02:00
Bas Nieuwenhuizen
6078a3bd51 ac/nir: Allow ac_shader_variant_info to contain info about multiple stages.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-19 22:24:51 +02:00
Bas Nieuwenhuizen
a996ed1f9b ac/nir: Change interface to allow multiple source shaders.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-19 22:24:47 +02:00
Bas Nieuwenhuizen
872b21487c ac/nir: Add HS calling convention.
Needed for GFX9 merged shaders.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-19 22:24:42 +02:00
Bas Nieuwenhuizen
163a4bf386 ac: Parse the new HS RSRC1 register.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-19 22:24:20 +02:00
Marek Olšák
854593b8eb ac: clean up ac_build_indexed_load function interfaces
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-17 22:03:03 +02:00
Marek Olšák
11adea4b24 ac: add radeon_info::has_sync_file
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-12 21:04:56 +02:00
Marek Olšák
5f2073be32 ac/surface: add ac_surface::is_displayable
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-12 19:03:33 +02:00
Marek Olšák
7b697c8b78 amd: move r600d_common.h into r600g
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-09 16:27:06 +02:00
Marek Olšák
76997e9133 radeonsi: shrink r600d_common.h and stop using it
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-09 16:27:05 +02:00
Marek Olšák
bcd3e761a3 ac: properly document a buffer.store LLVM workaround
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Marek Olšák
94d800bfa3 ac: silence a warning 2017-10-04 17:00:05 +02:00
Dave Airlie
4e93d6baae radv: emit fmuladd instead of fma to llvm.
For Vulkan SPIR-V the spec states
fma() Inherited from OpFMul followed by OpFAdd.

Matt says the backend will do the right thing depending on the
hardware being compiled for, if you use the fmuladd intrinsic.

Using the Mad Max pts test, on high settings at 4K:
CHP: 55->60
HGDD: 46->50
LM: 55->60
No change on Stronghold.

Thanks to Feral for spending the time to track this down.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-10-04 06:22:44 +01:00
Nicolai Hähnle
052b974fed amd/common: move ac_build_phi from radeonsi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-10-02 12:17:15 +02:00
Nicolai Hähnle
4c56e07029 radeonsi: clamp depth comparison value only for fixed point formats
The hardware usually does this automatically. However, we upgrade
depth to Z32_FLOAT to enable TC-compatible HTILE, which means the
hardware no longer clamps the comparison value for us.

The only way to tell in the shader whether a clamp is required
seems to be to communicate an additional bit in the descriptor
table. While VI has some unused bits in the resource descriptor,
those bits have unfortunately all been used in gfx9. So we use
an unused bit in the sampler state instead.

Fixes dEQP-GLES3.functional.texture.shadow.2d.linear.equal_depth_component32f
and many other tests in dEQP-GLES3.functional.texture.shadow.*

Fixes: d4d9ec55c5 ("radeonsi: implement TC-compatible HTILE")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-09-29 11:44:50 +02:00
Nicolai Hähnle
a6ea4c1b93 amd/common: save an instruction in the build_cube_select sequence
Avoid a v_cndmask: the absolute value is free due to input modifiers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-09-29 11:43:07 +02:00
Nicolai Hähnle
5be5c1e0fa amd/common: fix build_cube_select
Fix the custom cube coord selection sequence to be identical to
the hardware v_cubesc/tc and OpenGL spec. Affects texture sampling
with user-provided derivatives.

Fixes dEQP-GLES3.functional.shaders.texture_functions.texturegrad.*

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-09-29 11:43:04 +02:00
Nicolai Hähnle
9ddc6e16a9 amd/common: remove ac_shader_abi::chip_class
Redundant with the recently added ac_llvm_context::chip_class.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-09-29 11:37:03 +02:00
Dylan Baker
673dda8330 meson: build "radv" vulkan driver for radeon hardware
This builds, installs, and has been tested on a r290x (Hawaii) with the Vulkan
CTS. It dies horribly in a fire at the same point for the meson build as the
autotools build.

v2: - enable radv by default
    - add shader cache support and enforce that it's built for radv
v3: - Fix typo in meson_options (Nicholas)
    - strip trailing 'svn' from llvm version before setting the version
      preprocessor flag (Bas)
    - Check for LLVM module requirements

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-09-27 09:12:34 -07:00
Nicolai Hähnle
eb71394ff3 ac/surface: handle error when choosing preferred swizzle mode
CID: 1418140
Fixes: c4ac522511 ("ac/surface: handle S8 on gfx9")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-09-21 11:00:00 +02:00
Dave Airlie
c4ac522511 ac/surface: handle S8 on gfx9
If we don't have a depth piece, we don't get a correct
swizzle mode and we hit an assert in addrlib.

In case of no depth get the preferrred swizzle mode for
stencil alone.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-20 15:32:05 +10:00
Nicolai Hähnle
94736d31c3 amd/common: add workaround for cube map array layer clamping
Fixes dEQP-GLES31.functional.texture.filtering.cube_array.*

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-09-18 11:25:18 +02:00
Nicolai Hähnle
6772452e4c amd/common: remove has_ds_bpermute argument from ac_build_ddxy
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-09-18 11:25:18 +02:00
Nicolai Hähnle
3db86d86ed amd/common: add chip_class to ac_llvm_context
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-09-18 11:25:18 +02:00
Nicolai Hähnle
e0af3bed2c amd/common: round cube array slice in ac_prepare_cube_coords
The NIR-to-LLVM pass already does this; now the same fix covers
radeonsi as well.

Fixes various tests of
dEQP-GLES31.functional.texture.filtering.cube_array.combinations.*

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-09-18 11:25:18 +02:00
Bas Nieuwenhuizen
979978ee06 radv: Check for GFX9 for 1D arrays in image_size intrinsic.
Only on GFX9 we implement them as 2D images.

This fixes:
dEQP-VK.image.image_size.1d_array.readonly_12x34
dEQP-VK.image.image_size.1d_array.readonly_1x1
dEQP-VK.image.image_size.1d_array.readonly_32x32
dEQP-VK.image.image_size.1d_array.readonly_7x1
dEQP-VK.image.image_size.1d_array.readonly_writeonly_12x34
dEQP-VK.image.image_size.1d_array.readonly_writeonly_1x1
dEQP-VK.image.image_size.1d_array.readonly_writeonly_32x32
dEQP-VK.image.image_size.1d_array.readonly_writeonly_7x1
dEQP-VK.image.image_size.1d_array.writeonly_12x34
dEQP-VK.image.image_size.1d_array.writeonly_1x1
dEQP-VK.image.image_size.1d_array.writeonly_32x32
dEQP-VK.image.image_size.1d_array.writeonly_7x1

Fixes: 1bcb953e16 "radv: handle GFX9 1D textures"
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-09-15 22:06:56 +02:00
Samuel Pitoiset
f0d09d9012 radeonsi: move si_get_wave_info() to AMD common code
This will allow us to use it from radv.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-09-14 10:37:57 +02:00
Nicolai Hähnle
cffc0ae0d9 ac/surface: match Z and stencil tile config
Fixes various piglit tests on Stoney, see the comment.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-09-13 18:27:01 +02:00
Nicolai Hähnle
481df8032b ac/surface: sanity-check that we got a TC-compatible HTILE if requested
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-09-13 18:26:59 +02:00
Nicolai Hähnle
b8c6e88848 amd/common: get ME/PFP/CE firmware feature versions as well
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-09-13 18:25:06 +02:00
Dave Airlie
aba441be44 radv/ac: bump params array for image atomic comp swap
For the comp_swap case this was overflowing and crashing
sometimes.

Fixes:
dEQP-VK.image.atomic_operations.compare_exchange.*

Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-13 17:17:02 +10:00
Dave Airlie
1bcb953e16 radv: handle GFX9 1D textures
As GFX9 can't handle 1D depth textures, radeonsi and
apparantly pro just update all 1D textures to 2D,
and work around it.

This ports the workarounds from radeonsi.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-13 08:40:41 +10:00
Connor Abbott
b909d278d0 ac: remove bitcast_to_float()
ac_to_float() does a superset of what it does.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-08 04:24:56 +01:00
Connor Abbott
50967cd0b0 ac: move ac_to_integer() and ac_to_float() to ac_llvm_build.c
We'll need to use ac_to_integer() for other stuff in ac_llvm_build.c.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-09-08 04:24:02 +01:00
Connor Abbott
fafa299511 ac: fix ac_get_type_size() for doubles
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-09-08 04:19:47 +01:00
Dave Airlie
4cab214e76 radv/ac: use ac_get_type_size.
Just moved to newly shared code.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-08 04:15:50 +01:00
Connor Abbott
b8a51c8c4b radeonsi: move the guts of ARB_shader_group_vote emission to ac
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-08 04:12:49 +01:00
Connor Abbott
bd73b89792 radeonsi: move si_emit_ballot() to ac
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-08 04:12:42 +01:00
Connor Abbott
ac27fa7294 radeonsi: move emit_optimization_barrier() to ac
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-08 04:06:47 +01:00
Connor Abbott
c181d4f2b7 radeonsi: move llvm_get_type_size() to ac
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-08 04:04:16 +01:00
Marek Olšák
4bd2bdbb3c ac/surface: add radeon_surf::has_stencil for convenience
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-07 17:59:37 +02:00
Dave Airlie
e852ecd22b ac/surface: reduce gfx9_surface_layout size.
152->144.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-07 11:00:08 +10:00
Nicolai Hähnle
552aaa11ed ac/debug: take ASIC generation into account when printing registers
There were some overlapping changes in gfx9 especially in the CB/DB
blocks which made register dumps rather misleading.

The split is along the lines of the header files, so we'll print VI-only
fields on SI and CI, for example, but we won't print GFX9 fields on
SI/CI/VI, and we won't print SI/CI/VI fields on GFX9.

Acked-by: Marek Olšák <marek.olsak@amd.com>
2017-09-06 09:59:19 +02:00
Nicolai Hähnle
274f1dace7 amd/common: pass chip_class to ac_dump_reg
Acked-by: Marek Olšák <marek.olsak@amd.com>
2017-09-06 09:59:17 +02:00
Nicolai Hähnle
925ad7d2f6 ac/sid_tables: add FieldTable object
Automatically re-use table entries like StringTable and IntTable do.
This allows us to get rid of the "fields_owner" logic, and simplifies
the next change.

Acked-by: Marek Olšák <marek.olsak@amd.com>
2017-09-06 09:59:14 +02:00
Nicolai Hähnle
981335b704 ac/sid_tables: remove unused variable varname_values
Acked-by: Marek Olšák <marek.olsak@amd.com>
2017-09-06 09:59:07 +02:00
Dave Airlie
b880cd3b59 radv/gfx9: fix buffer size on gfx9.
The VI sizing only applies to VI.

This fixes:
dEQP-VK.image.image_size.buffer.*

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-06 03:05:44 +01:00
Dave Airlie
979be4f9c8 ac: reorg ac_shader_binary struct to take less space.
This reduces the size from 96 to 80 bytes but putting all the
32-bit sizes at the start.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-04 08:40:37 +10:00
Samuel Pitoiset
12cbd9a13f radeonsi: move si_vm_fault_occured() to AMD common code
For radv, in order to report VM faults when detected.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-09-01 09:46:32 +02:00