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Author SHA1 Message Date
Tapani Pälli
d8381415a6 anv: tighten condition for changing barrier layouts 
Assertion (or attempting the layout change) is causing crash when
launching Steel Rats. Tighten the condition for change so that it should
affect only when runtime has made changes.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12602
Fixes: eed788213b ("anv: ensure consistent layout transitions in render passes")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33523>
 2025-02-18 06:30:14 +00:00
José Roberto de Souza
7d4c91efef intel/dev: Call intel_device_info_update_after_hwconfig() from common code 
Avoid backends duplication.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33585>
 2025-02-17 20:52:31 +00:00
José Roberto de Souza
e170252d97 intel/dev: Improve max_cs_threads documentation 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33585>
 2025-02-17 20:52:31 +00:00
Valentine Burley
53c1b15f53 anv/ci: Don't start X11 for ANGLE 
This is no longer required.

Also document a flake seen recently.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33578>
 2025-02-17 11:31:01 +00:00
Valentine Burley
464c97b588 ci: Update expectations from latest nightly 
Update expectations from https://gitlab.freedesktop.org/mesa/mesa/-/pipelines/1364513.
Created with ci-collate.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33547>
 2025-02-17 06:56:30 +00:00
Matt Turner
49bc323866 intel: Fix typos 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33556>
 2025-02-15 17:43:44 +00:00
Lionel Landwerlin
d75849aaea anv: make compute state flush helper visible 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33550>
 2025-02-15 18:38:24 +02:00
Lionel Landwerlin
ed18353e2a anv: make gfx state flushing available externally 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33550>
 2025-02-15 18:38:21 +02:00
Lionel Landwerlin
9aef4ceb13 anv: hold a prepacked COMPUTE_WALKER instruction on CS pipelines 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33550>
 2025-02-15 18:38:18 +02:00
Lionel Landwerlin
82b6a6f0b9 anv: move reg_mask push constant field to gfx 
This is used only for gfx stages as those are the only ones that can
promote UBOs to push constants.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33550>
 2025-02-15 18:38:14 +02:00
Lionel Landwerlin
456d691310 anv: move RT stage bits to main header 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33550>
 2025-02-15 18:38:12 +02:00
Lionel Landwerlin
a9b6a54a8c brw: fix component packing starting index 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 6845dede59 ("brw: add support for no VF input slot compaction")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33553>
 2025-02-14 20:17:54 +00:00
Michael Cheng
9ad427c000 Revert "anv: Fix missing Perfetto trace for as build" 
When collecting Perfetto traces on ANV, we should always be
running with MESA_GPU_TRACES=perfetto, and not rely on dynamic
enablement via pps-producer.

This reverts commit 873ad6b6d5.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33530>
 2025-02-14 08:10:11 +00:00
Hyunjun Ko
9f9e95e9d5 anv: fix maxDpbSlots and maxActiveReferencePictures for AV1 decoding. 
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33535>
 2025-02-14 07:47:05 +00:00
Emma Anholt
98efca9207 ci/anv: Enable testing with Vulkan video encode/decode. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25384>
 2025-02-14 01:21:20 +00:00
Lionel Landwerlin
db53e53bf6 brw: add documentation about slot compaction & component packing 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Lionel Landwerlin
6845dede59 brw: add support for no VF input slot compaction 
Normally the driver & compiler work together to use as few
3DSTATE_VERTEX_ELEMENTS/VERTEX_BUFFER_ELEMENT data as possible.

The compiler ignores unused bits and driver avoids emitting the
corresponding elements in 3DSTATE_VERTEX_ELEMENTS.

For device generated commands, we want an 3DSTATE_VERTEX_ELEMENTS
programming that is independent from the shader so that we can
implement indirect pipeline binding without complicating the
generation shader as well as emitting fewer generated commands.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Lionel Landwerlin
f19c5f4fcc brw: use meaningful io locations for system values 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Lionel Landwerlin
6b99bf76ca anv: ensure Wa_16012775297 interacts correctly with Wa_18020335297 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: dddd765553 ("anv: implement VF_STATISTICS emit for Wa_16012775297")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Lionel Landwerlin
a85717f313 anv: enable vertex fetching component packing 
DG2 a/b testing:
   Borderlands3	 -0.55%
   Cyberpunk     +0.38%
   Superposition -0.67%

The shader stats mostly don't look like an improvement :

DG2 shader stats:

  Blackops 3:
  Totals from 265 (16.44% of 1612) affected shaders:
  Instrs: 109055 -> 109080 (+0.02%); split: -0.01%, +0.04%
  Cycle count: 6166549 -> 6021371 (-2.35%); split: -2.53%, +0.17%

  Cyberpunk 2077:
  Totals from 297 (23.50% of 1264) affected shaders:
  Instrs: 197305 -> 197297 (-0.00%); split: -0.03%, +0.02%
  Cycle count: 3374325 -> 3356562 (-0.53%); split: -1.23%, +0.70%

  Fortnite:
  Totals from 2090 (27.97% of 7471) affected shaders:
  Instrs: 1777944 -> 1781070 (+0.18%); split: -0.01%, +0.18%
  Cycle count: 25188758 -> 25162910 (-0.10%); split: -0.86%, +0.76%
  Spill count: 1439 -> 1729 (+20.15%); split: -0.69%, +20.85%
  Fill count: 1226 -> 1395 (+13.78%); split: -0.82%, +14.60%
  Scratch Memory Size: 122880 -> 138240 (+12.50%); split: -1.67%, +14.17%

  Hitman 3:
  Totals from 490 (9.09% of 5392) affected shaders:
  Instrs: 407489 -> 407486 (-0.00%); split: -0.00%, +0.00%
  Cycle count: 1831149 -> 1831890 (+0.04%); split: -0.33%, +0.38%

  Metro Exodus:
  Totals from 4169 (9.68% of 43076) affected shaders:
  Instrs: 817730 -> 817726 (-0.00%); split: -0.00%, +0.00%
  Cycle count: 4646954 -> 4641559 (-0.12%); split: -0.61%, +0.50%

Xe2 shader stats :

  Blackops 3:
  Totals from 283 (19.46% of 1454) affected shaders:
  Cycle count: 7662980 -> 7916316 (+3.31%); split: -0.38%, +3.69%

  Cyberpunk 2077:
  Totals from 329 (26.79% of 1228) affected shaders:
  Instrs: 203312 -> 203327 (+0.01%); split: -0.01%, +0.02%
  Cycle count: 4415812 -> 4434906 (+0.43%); split: -0.69%, +1.12%

  Fortnite:
  Totals from 1981 (30.18% of 6565) affected shaders:
  Instrs: 1709583 -> 1711379 (+0.11%); split: -0.00%, +0.11%
  Cycle count: 26882682 -> 26914014 (+0.12%); split: -0.66%, +0.78%
  Spill count: 863 -> 1020 (+18.19%)
  Fill count: 1195 -> 1271 (+6.36%)
  Scratch Memory Size: 116736 -> 122880 (+5.26%)

  Hitman 3:
  Totals from 540 (10.56% of 5115) affected shaders:
  Instrs: 478993 -> 478994 (+0.00%)
  Cycle count: 3198740 -> 3198416 (-0.01%); split: -0.27%, +0.26%

  Metro Exodus:
  Totals from 4554 (12.28% of 37071) affected shaders:
  Cycle count: 6460340 -> 6475666 (+0.24%); split: -0.38%, +0.62%

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Lionel Landwerlin
462d8e3fab anv: disable VF statistics for memcpy 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Lionel Landwerlin
ca66f22e90 blorp: emit 3DSTATE_VF 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Lionel Landwerlin
4f892ae4f7 brw: enable vertex fetching component packing 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Lionel Landwerlin
9b8d75c95c brw: add a max HW vertices attribute limit 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Lionel Landwerlin
fae8d325a7 brw: update vulkan max attribute limit 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Lionel Landwerlin
bae9344baf brw: port vs input to lower_64bit_to_32_new 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Lionel Landwerlin
e9e4aa0f29 brw: remove nr_attribute_slots from vs_prog_data 
It's not used outside of the compiler.

We add a new nr_attribute_regs which now seems useless but will be
useful in a later change.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Lionel Landwerlin
c00830083e brw: fix indentation 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Lionel Landwerlin
2a8dddb519 genxml: add convenience dwords for packing components 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Lionel Landwerlin
e40f47abd3 genxml: make component packing an array 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32418>
 2025-02-13 14:36:15 +00:00
Valentine Burley
2e48bcf064 ci/angle: Uprev ANGLE 
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33513>
 2025-02-13 13:21:10 +00:00
Valentine Burley
5eea8f6fe8 intel/ci: Fix manual rules for ANGLE jobs 
Disable auto-retry for .intel-manual-rules to prevent unnecessary reruns
and switch ANGLE jobs from this rule to .anv-manual-rules, as there’s no
point in running anv-on-angle jobs on iris changes.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33513>
 2025-02-13 13:21:09 +00:00
Daniel Schürmann
175c06e5cd intel: switch to nir_metadata_divergence 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30814>
 2025-02-13 10:08:43 +00:00
Timur Kristóf
94996d546c nir: Don't include the full nir.h when not necessary. 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33439>
 2025-02-12 22:33:07 +01:00
Sagar Ghuge
2e0d5ccd91 intel/compiler: Drop primitive leaf desc load code 
Looks like we are not using the primitive leaf desc loading code part at
all. Let's just drop it.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33497>
 2025-02-12 05:23:05 +00:00
Michael Cheng
873ad6b6d5 anv: Fix missing Perfetto trace for as build 
The as_build and related functions only appear when MESA_GPU_TRACES=
perfetto is set. By default, when running an RT workload for profiling,
these traces should be recorded alongside other trace points. This
commit ensures that acceleration structure build events are properly
captured when running an RT workload.

v2(Michael Cheng): Move this logic up to anv_device_init_accel_struct_build_state

v3(Michael Cheng): Set emit_markers = true and let the generated
functions handle the check for u_trace_enable and intel_gpu_tracepoint

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Casey Bowman <casey.g.bowman@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33461>
 2025-02-12 00:13:39 +00:00
Lionel Landwerlin
57efd752fb anv: support protected surfaces with display platform 
Because our buffer are flagged as protected at the GEM level, we can
just passed them to the display driver and it'll do the right thing.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: José Roberto de Souza <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26182>
 2025-02-11 22:03:09 +00:00
Caio Oliveira
ace5daabbd intel/compiler: Use -Werror=vla 
Acked-by: Dylan Baker <dylan.c.baker@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32965>
 2025-02-11 11:25:48 +00:00
liuqiang
c317778c67 intel/brw: Remove redundant condition in components_read() 
DATA1 will be handled by the case reached in the fallthrough.

Signed-off-by: liuqiang <liuqiang@kylinos.cn>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31782>
 2025-02-11 10:33:42 +00:00
Caio Oliveira
ff44f4d278 intel/brw: Update outdated comments 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32536>
 2025-02-11 09:13:28 +00:00
Caio Oliveira
5c55b29d1a intel/brw: Rename a few remaining functions to remove fs prefix 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32536>
 2025-02-11 09:13:28 +00:00
Caio Oliveira
c83ddaaa26 intel/brw: Rename fs_copy_prop_dataflow to brw_copy_prop_dataflow 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32536>
 2025-02-11 09:13:28 +00:00
Caio Oliveira
cf3bb77224 intel/brw: Rename fs_visitor to brw_shader 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32536>
 2025-02-11 09:13:28 +00:00
Caio Oliveira
352a63122f intel/brw: Rename files brw_fs.cpp/h to brw_shader.cpp/h 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32536>
 2025-02-11 09:13:28 +00:00
Caio Oliveira
6b471e4e26 intel/brw: Merge brw_fs_visitor.cpp into brw_fs.cpp 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32536>
 2025-02-11 09:13:28 +00:00
Caio Oliveira
f8a979466b intel/brw: Rename and move thread_payload types to own header 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32536>
 2025-02-11 09:13:28 +00:00
Ian Romanick
1d485cc84f brw/copy: Allow constant propagation of some 64-bit integers 
ADD, ASR, SHL, and SHR can mix D or UD sources with Q or UQ sources on
Gfx20. If the constant will fit in 32-bits, the type is changed so the
propagation can occur.

No shader-db changes on any Intel platform. No fossil-db changes on
any Intel platform other than Lunar Lake.

Lunar Lake
Totals:
Instrs: 210778940 -> 209472782 (-0.62%); split: -0.63%, +0.01%
Subgroup size: 14226752 -> 14227232 (+0.00%)
Cycle count: 30614834794 -> 30573250444 (-0.14%); split: -0.26%, +0.12%
Spill count: 507788 -> 504153 (-0.72%); split: -1.17%, +0.45%
Fill count: 622824 -> 613848 (-1.44%); split: -1.96%, +0.52%
Scratch Memory Size: 35826688 -> 35309568 (-1.44%); split: -1.67%, +0.23%
Max live registers: 65506213 -> 65434861 (-0.11%)

Totals from 126699 (17.93% of 706470) affected shaders:
Instrs: 63615321 -> 62309163 (-2.05%); split: -2.09%, +0.04%
Subgroup size: 2618160 -> 2618640 (+0.02%)
Cycle count: 3141888676 -> 3100304326 (-1.32%); split: -2.52%, +1.19%
Spill count: 454315 -> 450680 (-0.80%); split: -1.31%, +0.51%
Fill count: 533584 -> 524608 (-1.68%); split: -2.29%, +0.61%
Scratch Memory Size: 32182272 -> 31665152 (-1.61%); split: -1.86%, +0.26%
Max live registers: 14773917 -> 14702565 (-0.48%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33049>
 2025-02-11 08:44:33 +00:00
Ian Romanick
6d594196a6 brw/copy: Use extract_imm in try_constant_propagate_value 
This is just a small refactor.

Originally there was an extra commit on top of this. That commit didn't
help generated code quality, so it was dropped.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33049>
 2025-02-11 08:44:33 +00:00
Ian Romanick
ac4b93571c brw/copy: Fix handling of offset in extract_imm 
The offset is measured in bytes. Some of the code here acted as though
it were measured in src.type units. Also modify the assertion to check
that all extracted bits come from data in the immediate value.

Fixes: 580e1c592d ("intel/brw: Introduce a new SSA-based copy propagation pass")
Fixes: da395e6985 ("intel/brw: Fix extract_imm for subregion reads of 64-bit immediates")

Yes, I missed this error *twice* in code review.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33049>
 2025-02-11 08:44:33 +00:00
Tapani Pälli
c5cad407f8 anv: handle non-wsi images in anv_layout_to_aux_state 
Transition to VK_IMAGE_LAYOUT_PRESENT_SRC_KHR with non-wsi image was
seen with gfxrecon-replay case that ends up hitting weird assertions
later.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33027>
 2025-02-10 10:31:33 +00:00