Commit graph

29 commits

Author SHA1 Message Date
Georg Lehmann
486ea54184 nir/opt_algebraic: make bcsel(fcmp(b, a), b, a) -> fmin/fmax patterns exact
These patterns need is_only_used_as_float because fmin/fmax might change NaN
patterns, while bcsel is bit exact. For the same reason, the replacement
must not add undefined results, so make the replacement NaN/inf preserving.

It's impossible to make them signed zero correct (-0.0 == +0.0),
so it's also important that the user alu doesn't care.

Otherwise, the only thing that matters is is whether a is NaN.

Foz-DB Navi48:
Totals from 453 (0.55% of 82405) affected shaders:
MaxWaves: 8242 -> 8270 (+0.34%)
Instrs: 2382059 -> 2380094 (-0.08%); split: -0.09%, +0.00%
CodeSize: 13197208 -> 13179488 (-0.13%); split: -0.14%, +0.00%
VGPRs: 44688 -> 44604 (-0.19%)
Latency: 22839894 -> 22838985 (-0.00%); split: -0.01%, +0.00%
InvThroughput: 4873352 -> 4872924 (-0.01%)
VClause: 50862 -> 50883 (+0.04%); split: -0.02%, +0.06%
SClause: 54000 -> 53993 (-0.01%)
Copies: 250215 -> 250233 (+0.01%); split: -0.00%, +0.01%
PreVGPRs: 39694 -> 39620 (-0.19%)
VALU: 1116881 -> 1116073 (-0.07%); split: -0.07%, +0.00%
SALU: 492799 -> 492139 (-0.13%); split: -0.14%, +0.00%
VOPD: 85457 -> 85461 (+0.00%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39641>
2026-02-10 18:42:03 +00:00
Georg Lehmann
a706769a0b nir: move exact bit to nir_fp_math_control
Unifies nir per instruction float control.

In the future this can be split into contract/reassoc/transform
like SPIR-V.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (except SPIR-V)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39103>
2026-01-07 09:40:57 +00:00
Georg Lehmann
f3290219ab nir: use a seperate enum for per alu floating point math control
We don't need one bit per bitsize per instruction if only one actually
matters in the end.

First step towards moving NIR in the direction of full float_controls2
only.

Also rename this from fp_fast_math, because that name implied that 0 is
the no fast math mode, while the opposite was the case.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39026>
2025-12-29 10:57:05 +00:00
Job Noorman
6d59a3e3e7 nir/lower_alu: use Knuth's Algorithm M for [iu]mul_high
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
This significantly simplifies the handling of signed numbers as the same
code path can handle signed and unsigned numbers by simply using ishr
instead of ushr for some of the shifts. For both cases, the number of
additions and shifts are also reduced.

Note that LLVM uses the same algorithm.

fossil-db stats for Turnip:

Totals from 4849 (2.94% of 164705) affected shaders:
MaxWaves: 52318 -> 52332 (+0.03%); split: +0.04%, -0.02%
Instrs: 5262458 -> 5218922 (-0.83%); split: -0.87%, +0.05%
CodeSize: 10831900 -> 10655170 (-1.63%); split: -1.64%, +0.01%
NOPs: 829481 -> 836010 (+0.79%); split: -0.95%, +1.74%
MOVs: 176187 -> 173788 (-1.36%); split: -3.27%, +1.91%
COVs: 104096 -> 86543 (-16.86%); split: -16.87%, +0.01%
Full: 90434 -> 90158 (-0.31%); split: -0.33%, +0.03%
(ss): 131091 -> 130866 (-0.17%); split: -0.87%, +0.70%
(sy): 55550 -> 55769 (+0.39%); split: -0.92%, +1.32%
(ss)-stall: 406003 -> 407194 (+0.29%); split: -1.10%, +1.39%
(sy)-stall: 1668213 -> 1678082 (+0.59%); split: -1.31%, +1.90%
Preamble Instrs: 1105270 -> 1067290 (-3.44%); split: -3.50%, +0.06%
Constlen: 423776 -> 423560 (-0.05%)
Last helper: 1038202 -> 1035540 (-0.26%); split: -0.42%, +0.16%
Last baryf: 38908 -> 38632 (-0.71%)
Subgroup size: 336640 -> 336832 (+0.06%)
Cat0: 916209 -> 922848 (+0.72%); split: -0.87%, +1.59%
Cat1: 282813 -> 262845 (-7.06%); split: -7.49%, +0.43%
Cat2: 2198715 -> 2183012 (-0.71%); split: -0.72%, +0.01%
Cat3: 1390914 -> 1376421 (-1.04%)
Cat7: 123127 -> 123116 (-0.01%); split: -0.24%, +0.23%

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37793>
2025-10-10 05:31:17 +00:00
Alyssa Rosenzweig
fc95397957 nir/lower_alu: optimize min/max signed zeros
we don't usually need a multi-instruction lowering.

with the agx change in the next commit, honeykrisp results:

   Totals from 3589 (6.64% of 54019) affected shaders:
   MaxWaves: 3598144 -> 3598400 (+0.01%); split: +0.02%, -0.01%
   Instrs: 1445830 -> 1332394 (-7.85%)
   CodeSize: 10696356 -> 9742130 (-8.92%)
   Fills: 721 -> 723 (+0.28%); split: -0.14%, +0.42%
   Scratch: 3980 -> 3968 (-0.30%)
   ALU: 1156426 -> 1043198 (-9.79%)
   FSCIB: 1156426 -> 1043196 (-9.79%)
   IC: 267202 -> 267166 (-0.01%)
   GPRs: 208765 -> 208712 (-0.03%); split: -0.16%, +0.14%
   Uniforms: 683643 -> 683677 (+0.00%); split: -0.01%, +0.01%
   Preamble instrs: 1163325 -> 1159314 (-0.34%)

control results alone:

   Totals:
   Instrs: 110168 -> 107171 (-2.72%)

   Totals from 71 (22.26% of 319) affected shaders:
   Instrs: 48895 -> 45898 (-6.13%)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35989>
2025-07-08 17:09:16 +00:00
Alyssa Rosenzweig
c3fb0645d8 nir/lower_alu: compact bitcount lowering
while in the area.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35198>
2025-05-28 16:29:30 +00:00
Alyssa Rosenzweig
759dc70bde nir: generalize bitfield_reverse bit size
No reason we can't reverse other bit sizes, we just need to generalize the
constant folding & bit size lowering.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35198>
2025-05-28 16:29:30 +00:00
Alyssa Rosenzweig
91872c9c51 nir: clang-format
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33722>
2025-02-26 15:19:53 +00:00
Alyssa Rosenzweig
d2780d871b nir/lower_alu: use alu_pass
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30582>
2024-08-10 13:40:21 +00:00
Alyssa Rosenzweig
d238d766c6 nir: add lower_fminmax_signed_zero
This implements IEEE-754-2019 signed zero semantics for fmin/fmax, as now
required by NIR, for hardware that has busted signed zero behaviour for
fmin/fmax. Ian expressed interest in this for Intel.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30075>
2024-07-15 19:29:00 +00:00
Alyssa Rosenzweig
0e46f7b39a nir/lower_alu: remove dead #define
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30075>
2024-07-15 19:29:00 +00:00
Karol Herbst
535e617ccd nir/lower_alu: support 8 and 16 bit bit_count
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25362>
2024-06-26 10:04:02 +00:00
Alyssa Rosenzweig
da752ed7c1 treewide: use nir_def_replace sometimes
Two Coccinelle patches here. Didn't catch nearly as much as I would've liked but
it's a start.

Coccinelle patch:

    @@
    expression intr, repl;
    @@

    -nir_def_rewrite_uses(&intr->def, repl);
    -nir_instr_remove(&intr->instr);
    +nir_def_replace(&intr->def, repl);

Coccinelle patch:

    @@
    identifier intr;
    expression instr, repl;
    @@

    nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
    ...
    -nir_def_rewrite_uses(&intr->def, repl);
    -nir_instr_remove(instr);
    +nir_def_replace(&intr->def, repl);

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com> [broadcom]
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com> [lima]
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com> [etna]
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com> [r300]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29817>
2024-06-21 15:36:56 +00:00
Alyssa Rosenzweig
15257b65c6 treewide: use nir_metadata_control_flow
Via Coccinelle patch:

    @@
    @@

    -nir_metadata_block_index | nir_metadata_dominance
    +nir_metadata_control_flow

...plus some manual fixups for call sites missed by coccinelle.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Juan A. Suarez Romero <jasuarez@igalia.com> [broadcom]
Acked-by: Vasily Khoruzhick <anarsoul@gmail.com> [lima]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29745>
2024-06-17 16:28:14 -04:00
Iván Briano
666647acae nir: track some float controls bits per instruction
With float_controls2, shaders can decide on the behavior of
NaN/Inf/SignedZero preservation by decorating specific instructions, on
top of having a default for the whole program.
Add where to track these to nir_alu_instr and propagate them to new
instructions everywhere that exact is being done already.

v2: use less bits for fp_fast_math in nir_alu_instr (Alyssa)

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27281>
2024-04-25 12:13:41 +00:00
Vitaliy Triang3l Kuzmin
fd08d90d2a nir: Don't skip lower_alu if only bit_count needs lowering
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26048>
2023-11-07 08:52:52 +00:00
Faith Ekstrand
6c1d32581a nir: Drop nir_alu_dest
Instead, we replace it directly with nir_def.  We could replace it with
nir_dest but the next commit gets rid of that so this avoids unnecessary
churn.  Most of this commit was generated by sed:

   sed -i -e 's/dest.dest.ssa/def/g' src/**/*.h src/**/*.c src/**/*.cpp

There were a few manual fixups required in the nir_legacy.c and
nir_from_ssa.c as nir_legacy_reg and nir_parallel_copy_entry both have a
similar pattern.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24674>
2023-08-14 21:22:53 +00:00
Alyssa Rosenzweig
09d31922de nir: Drop "SSA" from NIR language
Everything is SSA now.

   sed -e 's/nir_ssa_def/nir_def/g' \
       -e 's/nir_ssa_undef/nir_undef/g' \
       -e 's/nir_ssa_scalar/nir_scalar/g' \
       -e 's/nir_src_rewrite_ssa/nir_src_rewrite/g' \
       -e 's/nir_gather_ssa_types/nir_gather_types/g' \
       -i $(git grep -l nir | grep -v relnotes)

   git mv src/compiler/nir/nir_gather_ssa_types.c \
          src/compiler/nir/nir_gather_types.c

   ninja -C build/ clang-format
   cd src/compiler/nir && find *.c *.h -type f -exec clang-format -i \{} \;

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24585>
2023-08-12 16:44:41 -04:00
Faith Ekstrand
777d336b1f nir: clang-format src/compiler/nir/*.[ch]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24382>
2023-08-12 19:27:28 +00:00
Alyssa Rosenzweig
5fead24365 treewide: Drop is_ssa asserts
We only see SSA now.

Via Coccinelle patch:

    @@
    expression x;
    @@

    -assert(x.is_ssa);

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:28 +00:00
Erik Faye-Lund
afa79cd9b8 nir: use imm-helpers
We have to use 1ull instead of 1u because MSVC is stupid...

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
2023-06-29 07:08:19 +00:00
Ian Romanick
ded3572947 nir: Use nir_type_convert instead of nir_type_conversion_op
In a future commit, nit_type_conversion_op won't be able to handle i2b
(and in a much later commit f2b), so switch many users to the fully
featured function.

No shader-db or fossil-db changes on any Intel platform.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15121>
2022-12-14 06:23:21 +00:00
Marcin Ślusarz
5beeb3c1db nir: use nir_shader_instructions_pass in nir_lower_alu
Changes:
- nir_metadata_preserve(..., nir_metadata_all) is called when pass doesn't
  make progress
- only metadata of the current function is invalidated (invalidation on
  one function was leaking to successive functions because "progress"
  was not reset)

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12282>
2022-09-26 11:13:03 +00:00
Iago Toral Quiroga
9d6770d20a nir/lower_alu: drop unnecessary iand on uadd_carry result
uadd_carry returns 1 or 0, so ANDing with 1 is unnecessary. Probably
this was implemented thinking that it was returning a boolean value.

shader-db results for V3D:

total instructions in shared programs: 12463571 -> 12462964 (<.01%)
instructions in affected programs: 28994 -> 28387 (-2.09%)
helped: 110
HURT: 1

total uniforms in shared programs: 3704591 -> 3704588 (<.01%)
uniforms in affected programs: 247 -> 244 (-1.21%)
helped: 3
HURT: 0

total max-temps in shared programs: 2148138 -> 2148117 (<.01%)
max-temps in affected programs: 729 -> 708 (-2.88%)
helped: 23
HURT: 2

total sfu-stalls in shared programs: 21230 -> 21232 (<.01%)
sfu-stalls in affected programs: 0 -> 2
helped: 0
HURT: 2

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17903>
2022-08-06 23:11:40 +00:00
Jason Ekstrand
117668b811 nir: Make nir_ssa_def_rewrite_uses take an SSA value
This commit replaces the new_src parameter of nir_ssa_def_rewrite_uses()
with an SSA def, removes nir_ssa_def_rewrite_uses_ssa(), and rewrites
all the users as needed.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9383>
2021-03-08 16:59:55 +00:00
Jesse Natalie
9232887c69 nir: Implement mul_high lowering for bit sizes other than 32
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
2020-08-27 16:57:42 +00:00
Eric Anholt
73953b0713 nir: Add lowering for nir_op_bit_count.
This is basically the same as the GLSL lowering path.

v2: Fix typo in the link

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2018-06-06 13:44:28 -07:00
Eric Anholt
7afa26d4e3 nir: Add lowering for nir_op_bitfield_reverse.
This is basically the same as the GLSL lowering path.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2018-06-06 13:44:28 -07:00
Eric Anholt
6e1597c2d9 nir: Add an ALU lowering pass for mul_high.
This is based on the glsl/lower_instructions.cpp implementation, but
should be much more readable.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2018-06-06 13:44:28 -07:00