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nir: clang-format src/compiler/nir/*.[ch]

Browse source 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24382>
This commit is contained in:
Faith Ekstrand 2023-08-08 12:00:35 -05:00 • committed by Marge Bot
parent 6fb63f369c
commit 777d336b1f
193 changed files with 3606 additions and 3229 deletions
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194
src/compiler/nir/nir.c
View file

@ -26,15 +26,15 @@
*/
#include "nir.h"
#include <assert.h>
#include <limits.h>
#include <math.h>
#include "util/half_float.h"
#include "util/u_math.h"
#include "util/u_qsort.h"
#include "nir_builder.h"
#include "nir_control_flow_private.h"
#include "nir_worklist.h"
#include "util/half_float.h"
#include <limits.h>
#include <assert.h>
#include <math.h>
#include "util/u_math.h"
#include "util/u_qsort.h"
#include "main/menums.h" /* BITFIELD64_MASK */
@ -496,7 +496,8 @@ src_copy(nir_src *dest, const nir_src *src, gc_ctx *ctx)
/* NOTE: if the instruction you are copying a src to is already added
* to the IR, use nir_instr_rewrite_src() instead.
*/
void nir_src_copy(nir_src *dest, const nir_src *src, nir_instr *instr)
void
nir_src_copy(nir_src *dest, const nir_src *src, nir_instr *instr)
{
src_copy(dest, src, instr ? gc_get_context(instr) : NULL);
}
@ -523,7 +524,6 @@ nir_alu_src_is_trivial_ssa(const nir_alu_instr *alu, unsigned srcn)
(memcmp(src->swizzle, trivial_swizzle, num_components) == 0);
}
static void
cf_init(nir_cf_node *node, nir_cf_node_type type)
{
@ -755,8 +755,7 @@ nir_call_instr_create(nir_shader *shader, nir_function *callee)
return instr;
}
static int8_t default_tg4_offsets[4][2] =
{
static int8_t default_tg4_offsets[4][2] = {
{ 0, 1 },
{ 1, 1 },
{ 1, 0 },
@ -812,8 +811,8 @@ nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx)
/* Now, move all of the other sources down */
for (unsigned i = src_idx + 1; i < tex->num_srcs; i++) {
tex->src[i-1].src_type = tex->src[i].src_type;
nir_instr_move_src(&tex->instr, &tex->src[i-1].src, &tex->src[i].src);
tex->src[i - 1].src_type = tex->src[i].src_type;
nir_instr_move_src(&tex->instr, &tex->src[i - 1].src, &tex->src[i].src);
}
tex->num_srcs--;
}
@ -1077,7 +1076,7 @@ nir_instr_insert(nir_cursor cursor, nir_instr *instr)
/* Inserting instructions after a jump is illegal. */
nir_instr *last = nir_block_last_instr(cursor.block);
assert(last == NULL || last->type != nir_instr_type_jump);
(void) last;
(void)last;
instr->block = cursor.block;
add_defs_uses(instr);
@ -1136,7 +1135,7 @@ src_is_valid(const nir_src *src)
static bool
remove_use_cb(nir_src *src, void *state)
{
(void) state;
(void)state;
if (src_is_valid(src))
list_del(&src->use_link);
@ -1150,7 +1149,8 @@ remove_defs_uses(nir_instr *instr)
nir_foreach_src(instr, remove_use_cb, instr);
}
void nir_instr_remove_v(nir_instr *instr)
void
nir_instr_remove_v(nir_instr *instr)
{
remove_defs_uses(instr);
exec_node_remove(&instr->node);
@ -1161,7 +1161,8 @@ void nir_instr_remove_v(nir_instr *instr)
}
}
void nir_instr_free(nir_instr *instr)
void
nir_instr_free(nir_instr *instr)
{
switch (instr->type) {
case nir_instr_type_tex:
@ -1192,7 +1193,8 @@ nir_instr_free_list(struct exec_list *list)
}
}
static bool nir_instr_free_and_dce_live_cb(nir_ssa_def *def, void *state)
static bool
nir_instr_free_and_dce_live_cb(nir_ssa_def *def, void *state)
{
bool *live = state;
@ -1204,7 +1206,8 @@ static bool nir_instr_free_and_dce_live_cb(nir_ssa_def *def, void *state)
}
}
static bool nir_instr_free_and_dce_is_live(nir_instr *instr)
static bool
nir_instr_free_and_dce_is_live(nir_instr *instr)
{
/* Note: don't have to worry about jumps because they don't have dests to
* become unused.
@ -1305,7 +1308,7 @@ nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
case nir_instr_type_intrinsic:
case nir_instr_type_phi:
case nir_instr_type_parallel_copy: {
struct foreach_ssa_def_state foreach_state = {cb, state};
struct foreach_ssa_def_state foreach_state = { cb, state };
return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
}
@ -1560,7 +1563,7 @@ nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
void
nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
unsigned num_components, unsigned bit_size)
unsigned num_components, unsigned bit_size)
{
nir_ssa_def_init(instr, &dest->ssa, num_components, bit_size);
}
@ -1798,7 +1801,8 @@ nir_block_cf_tree_prev(nir_block *block)
}
}
nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node)
nir_block *
nir_cf_node_cf_tree_first(nir_cf_node *node)
{
switch (node->type) {
case nir_cf_node_function: {
@ -1825,7 +1829,8 @@ nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node)
}
}
nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node)
nir_block *
nir_cf_node_cf_tree_last(nir_cf_node *node)
{
switch (node->type) {
case nir_cf_node_function: {
@ -1855,7 +1860,8 @@ nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node)
}
}
nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node)
nir_block *
nir_cf_node_cf_tree_next(nir_cf_node *node)
{
if (node->type == nir_cf_node_block)
return nir_block_cf_tree_next(nir_cf_node_as_block(node));
@ -1902,10 +1908,10 @@ nir_block_get_following_loop(nir_block *block)
static int
compare_block_index(const void *p1, const void *p2)
{
const nir_block *block1 = *((const nir_block **) p1);
const nir_block *block2 = *((const nir_block **) p2);
const nir_block *block1 = *((const nir_block **)p1);
const nir_block *block2 = *((const nir_block **)p2);
return (int) block1->index - (int) block2->index;
return (int)block1->index - (int)block2->index;
}
nir_block **
@ -1916,7 +1922,7 @@ nir_block_get_predecessors_sorted(const nir_block *block, void *mem_ctx)
unsigned i = 0;
set_foreach(block->predecessors, entry)
preds[i++] = (nir_block *) entry->key;
preds[i++] = (nir_block *)entry->key;
assert(i == block->predecessors->entries);
qsort(preds, block->predecessors->entries, sizeof(nir_block *),
@ -1946,7 +1952,7 @@ nir_index_blocks(nir_function_impl *impl)
static bool
index_ssa_def_cb(nir_ssa_def *def, void *state)
{
unsigned *index = (unsigned *) state;
unsigned *index = (unsigned *)state;
def->index = (*index)++;
return true;
@ -2166,7 +2172,8 @@ nir_shader_lower_instructions(nir_shader *shader,
* Returns true if the shader supports quad-based implicit derivatives on
* texture sampling.
*/
bool nir_shader_supports_implicit_lod(nir_shader *shader)
bool
nir_shader_supports_implicit_lod(nir_shader *shader)
{
return (shader->info.stage == MESA_SHADER_FRAGMENT ||
(shader->info.stage == MESA_SHADER_COMPUTE &&
@ -2543,21 +2550,21 @@ nir_rewrite_image_intrinsic(nir_intrinsic_instr *intrin, nir_ssa_def *src,
atomic_op = nir_intrinsic_atomic_op(intrin);
switch (intrin->intrinsic) {
#define CASE(op) \
case nir_intrinsic_image_deref_##op: \
#define CASE(op) \
case nir_intrinsic_image_deref_##op: \
intrin->intrinsic = bindless ? nir_intrinsic_bindless_image_##op \
: nir_intrinsic_image_##op; \
: nir_intrinsic_image_##op; \
break;
CASE(load)
CASE(sparse_load)
CASE(store)
CASE(atomic)
CASE(atomic_swap)
CASE(size)
CASE(samples)
CASE(load_raw_intel)
CASE(store_raw_intel)
CASE(fragment_mask_load_amd)
CASE(load)
CASE(sparse_load)
CASE(store)
CASE(atomic)
CASE(atomic_swap)
CASE(size)
CASE(samples)
CASE(load_raw_intel)
CASE(store_raw_intel)
CASE(fragment_mask_load_amd)
#undef CASE
default:
unreachable("Unhanded image intrinsic");
@ -2609,9 +2616,10 @@ nir_get_shader_call_payload_src(nir_intrinsic_instr *call)
}
}
nir_binding nir_chase_binding(nir_src rsrc)
nir_binding
nir_chase_binding(nir_src rsrc)
{
nir_binding res = {0};
nir_binding res = { 0 };
if (rsrc.ssa->parent_instr->type == nir_instr_type_deref) {
const struct glsl_type *type = glsl_without_array(nir_src_as_deref(rsrc)->type);
bool is_image = glsl_type_is_image(type) || glsl_type_is_sampler(type);
@ -2626,7 +2634,7 @@ nir_binding nir_chase_binding(nir_src rsrc)
return res;
} else if (deref->deref_type == nir_deref_type_array && is_image) {
if (res.num_indices == ARRAY_SIZE(res.indices))
return (nir_binding){0};
return (nir_binding){ 0 };
res.indices[res.num_indices++] = deref->arr.index;
}
@ -2646,13 +2654,13 @@ nir_binding nir_chase_binding(nir_src rsrc)
if (alu && alu->op == nir_op_mov) {
for (unsigned i = 0; i < num_components; i++) {
if (alu->src[0].swizzle[i] != i)
return (nir_binding){0};
return (nir_binding){ 0 };
}
rsrc = alu->src[0].src;
} else if (alu && nir_op_is_vec(alu->op)) {
for (unsigned i = 0; i < num_components; i++) {
if (alu->src[i].swizzle[0] != i || alu->src[i].src.ssa != alu->src[0].src.ssa)
return (nir_binding){0};
return (nir_binding){ 0 };
}
rsrc = alu->src[0].src;
} else if (intrin && intrin->intrinsic == nir_intrinsic_read_first_invocation) {
@ -2681,7 +2689,7 @@ nir_binding nir_chase_binding(nir_src rsrc)
nir_intrinsic_instr *intrin = nir_src_as_intrinsic(rsrc);
if (!intrin)
return (nir_binding){0};
return (nir_binding){ 0 };
/* Intel resource, similar to load_vulkan_descriptor after it has been
* lowered.
@ -2703,11 +2711,11 @@ nir_binding nir_chase_binding(nir_src rsrc)
if (intrin->intrinsic == nir_intrinsic_load_vulkan_descriptor) {
intrin = nir_src_as_intrinsic(intrin->src[0]);
if (!intrin)
return (nir_binding){0};
return (nir_binding){ 0 };
}
if (intrin->intrinsic != nir_intrinsic_vulkan_resource_index)
return (nir_binding){0};
return (nir_binding){ 0 };
assert(res.num_indices == 0);
res.success = true;
@ -2718,7 +2726,8 @@ nir_binding nir_chase_binding(nir_src rsrc)
return res;
}
nir_variable *nir_get_binding_variable(nir_shader *shader, nir_binding binding)
nir_variable *
nir_get_binding_variable(nir_shader *shader, nir_binding binding)
{
nir_variable *binding_var = NULL;
unsigned count = 0;
@ -2789,7 +2798,7 @@ nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
case GLSL_TYPE_FLOAT: return nir_type_float32;
case GLSL_TYPE_FLOAT16: return nir_type_float16;
case GLSL_TYPE_DOUBLE: return nir_type_float64;
/* clang-format on */
/* clang-format on */
case GLSL_TYPE_SAMPLER:
case GLSL_TYPE_TEXTURE:
@ -2897,27 +2906,27 @@ nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
}
#define CASE_ALL_SIZES(op) \
case op: \
case op ## 8: \
case op ## 16: \
case op ## 32: \
case op: \
case op##8: \
case op##16: \
case op##32:
bool
nir_alu_instr_is_comparison(const nir_alu_instr *instr)
{
switch (instr->op) {
CASE_ALL_SIZES(nir_op_flt)
CASE_ALL_SIZES(nir_op_fge)
CASE_ALL_SIZES(nir_op_feq)
CASE_ALL_SIZES(nir_op_fneu)
CASE_ALL_SIZES(nir_op_ilt)
CASE_ALL_SIZES(nir_op_ult)
CASE_ALL_SIZES(nir_op_ige)
CASE_ALL_SIZES(nir_op_uge)
CASE_ALL_SIZES(nir_op_ieq)
CASE_ALL_SIZES(nir_op_ine)
CASE_ALL_SIZES(nir_op_bitz)
CASE_ALL_SIZES(nir_op_bitnz)
CASE_ALL_SIZES(nir_op_flt)
CASE_ALL_SIZES(nir_op_fge)
CASE_ALL_SIZES(nir_op_feq)
CASE_ALL_SIZES(nir_op_fneu)
CASE_ALL_SIZES(nir_op_ilt)
CASE_ALL_SIZES(nir_op_ult)
CASE_ALL_SIZES(nir_op_ige)
CASE_ALL_SIZES(nir_op_uge)
CASE_ALL_SIZES(nir_op_ieq)
CASE_ALL_SIZES(nir_op_ine)
CASE_ALL_SIZES(nir_op_bitz)
CASE_ALL_SIZES(nir_op_bitnz)
case nir_op_inot:
return true;
default:
@ -3038,11 +3047,10 @@ nir_intrinsic_copy_const_indices(nir_intrinsic_instr *dst, nir_intrinsic_instr *
assert(dst_info->index_map[i] > 0);
dst->const_index[dst_info->index_map[i] - 1] =
src->const_index[src_info->index_map[i] - 1];
src->const_index[src_info->index_map[i] - 1];
}
}
bool
nir_tex_instr_need_sampler(const nir_tex_instr *instr)
{
@ -3067,23 +3075,23 @@ nir_tex_instr_result_size(const nir_tex_instr *instr)
case nir_texop_txs: {
unsigned ret;
switch (instr->sampler_dim) {
case GLSL_SAMPLER_DIM_1D:
case GLSL_SAMPLER_DIM_BUF:
ret = 1;
break;
case GLSL_SAMPLER_DIM_2D:
case GLSL_SAMPLER_DIM_CUBE:
case GLSL_SAMPLER_DIM_MS:
case GLSL_SAMPLER_DIM_RECT:
case GLSL_SAMPLER_DIM_EXTERNAL:
case GLSL_SAMPLER_DIM_SUBPASS:
ret = 2;
break;
case GLSL_SAMPLER_DIM_3D:
ret = 3;
break;
default:
unreachable("not reached");
case GLSL_SAMPLER_DIM_1D:
case GLSL_SAMPLER_DIM_BUF:
ret = 1;
break;
case GLSL_SAMPLER_DIM_2D:
case GLSL_SAMPLER_DIM_CUBE:
case GLSL_SAMPLER_DIM_MS:
case GLSL_SAMPLER_DIM_RECT:
case GLSL_SAMPLER_DIM_EXTERNAL:
case GLSL_SAMPLER_DIM_SUBPASS:
ret = 2;
break;
case GLSL_SAMPLER_DIM_3D:
ret = 3;
break;
default:
unreachable("not reached");
}
if (instr->is_array)
ret++;
@ -3268,15 +3276,13 @@ nir_instr_xfb_write_mask(nir_intrinsic_instr *instr)
unsigned mask = 0;
if (nir_intrinsic_has_io_xfb(instr)) {
unsigned wr_mask = nir_intrinsic_write_mask(instr) <<
nir_intrinsic_component(instr);
unsigned wr_mask = nir_intrinsic_write_mask(instr) << nir_intrinsic_component(instr);
assert((wr_mask & ~0xf) == 0); /* only 4 components allowed */
unsigned iter_mask = wr_mask;
while (iter_mask) {
unsigned i = u_bit_scan(&iter_mask);
nir_io_xfb xfb = i < 2 ? nir_intrinsic_io_xfb(instr) :
nir_intrinsic_io_xfb2(instr);
nir_io_xfb xfb = i < 2 ? nir_intrinsic_io_xfb(instr) : nir_intrinsic_io_xfb2(instr);
if (xfb.out[i % 2].num_components)
mask |= BITFIELD_RANGE(i, xfb.out[i % 2].num_components) & wr_mask;
}
@ -3392,7 +3398,8 @@ nir_remove_varying(nir_intrinsic_instr *intr, gl_shader_stage next_shader)
* This marks the output store instruction as not feeding fixed-function
* logic. If the instruction has no other use, it's removed.
*/
void nir_remove_sysval_output(nir_intrinsic_instr *intr)
void
nir_remove_sysval_output(nir_intrinsic_instr *intr)
{
nir_io_semantics sem = nir_intrinsic_io_semantics(intr);
@ -3406,7 +3413,8 @@ void nir_remove_sysval_output(nir_intrinsic_instr *intr)
}
}
void nir_remove_non_entrypoints(nir_shader *nir)
void
nir_remove_non_entrypoints(nir_shader *nir)
{
nir_foreach_function_safe(func, nir) {
if (!func->is_entrypoint)

776
src/compiler/nir/nir.h
View file

File diff suppressed because it is too large Load diff

60
src/compiler/nir/nir_builder.c
View file

@ -25,9 +25,9 @@
#include "nir_builder.h"
nir_builder MUST_CHECK PRINTFLIKE(3, 4)
nir_builder_init_simple_shader(gl_shader_stage stage,
const nir_shader_compiler_options *options,
const char *name, ...)
nir_builder_init_simple_shader(gl_shader_stage stage,
const nir_shader_compiler_options *options,
const char *name, ...)
{
nir_builder b;
@ -94,7 +94,7 @@ nir_builder_alu_instr_finish_and_insert(nir_builder *build, nir_alu_instr *instr
bit_size = src_bit_size;
} else {
assert(src_bit_size ==
nir_alu_type_get_type_size(op_info->input_types[i]));
nir_alu_type_get_type_size(op_info->input_types[i]));
}
}
}
@ -154,7 +154,7 @@ nir_build_alu1(nir_builder *build, nir_op op, nir_ssa_def *src0)
nir_ssa_def *
nir_build_alu2(nir_builder *build, nir_op op, nir_ssa_def *src0,
nir_ssa_def *src1)
nir_ssa_def *src1)
{
nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
if (!instr)
@ -168,7 +168,7 @@ nir_build_alu2(nir_builder *build, nir_op op, nir_ssa_def *src0,
nir_ssa_def *
nir_build_alu3(nir_builder *build, nir_op op, nir_ssa_def *src0,
nir_ssa_def *src1, nir_ssa_def *src2)
nir_ssa_def *src1, nir_ssa_def *src2)
{
nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
if (!instr)
@ -183,7 +183,7 @@ nir_build_alu3(nir_builder *build, nir_op op, nir_ssa_def *src0,
nir_ssa_def *
nir_build_alu4(nir_builder *build, nir_op op, nir_ssa_def *src0,
nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
{
nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
if (!instr)
@ -267,7 +267,7 @@ nir_build_tex_deref_instr(nir_builder *build, nir_texop op,
case nir_tex_src_coord:
tex->coord_components = nir_src_num_components(extra_srcs[i].src);
assert(tex->coord_components == tex->is_array +
glsl_get_sampler_dim_coordinate_components(tex->sampler_dim));
glsl_get_sampler_dim_coordinate_components(tex->sampler_dim));
break;
case nir_tex_src_lod:
@ -553,10 +553,10 @@ nir_type_convert(nir_builder *b,
nir_alu_type_get_type_size(src_type) == src->bit_size);
const nir_alu_type dst_base =
(nir_alu_type) nir_alu_type_get_base_type(dest_type);
(nir_alu_type)nir_alu_type_get_base_type(dest_type);
const nir_alu_type src_base =
(nir_alu_type) nir_alu_type_get_base_type(src_type);
(nir_alu_type)nir_alu_type_get_base_type(src_type);
/* b2b uses the regular type conversion path, but i2b and f2b are
* implemented as src != 0.
@ -568,21 +568,39 @@ nir_type_convert(nir_builder *b,
if (src_base == nir_type_float) {
switch (dst_bit_size) {
case 1: opcode = nir_op_fneu; break;
case 8: opcode = nir_op_fneu8; break;
case 16: opcode = nir_op_fneu16; break;
case 32: opcode = nir_op_fneu32; break;
default: unreachable("Invalid Boolean size.");
case 1:
opcode = nir_op_fneu;
break;
case 8:
opcode = nir_op_fneu8;
break;
case 16:
opcode = nir_op_fneu16;
break;
case 32:
opcode = nir_op_fneu32;
break;
default:
unreachable("Invalid Boolean size.");
}
} else {
assert(src_base == nir_type_int || src_base == nir_type_uint);
switch (dst_bit_size) {
case 1: opcode = nir_op_ine; break;
case 8: opcode = nir_op_ine8; break;
case 16: opcode = nir_op_ine16; break;
case 32: opcode = nir_op_ine32; break;
default: unreachable("Invalid Boolean size.");
case 1:
opcode = nir_op_ine;
break;
case 8:
opcode = nir_op_ine8;
break;
case 16:
opcode = nir_op_ine16;
break;
case 32:
opcode = nir_op_ine32;
break;
default:
unreachable("Invalid Boolean size.");
}
}
@ -590,7 +608,7 @@ nir_type_convert(nir_builder *b,
nir_imm_zero(b, src->num_components, src->bit_size),
NULL, NULL);
} else {
src_type = (nir_alu_type) (src_type | src->bit_size);
src_type = (nir_alu_type)(src_type | src->bit_size);
nir_op opcode =
nir_type_conversion_op(src_type, dest_type, rnd);

136
src/compiler/nir/nir_builder.h
View file

@ -24,9 +24,9 @@
#ifndef NIR_BUILDER_H
#define NIR_BUILDER_H
#include "nir_control_flow.h"
#include "util/bitscan.h"
#include "util/half_float.h"
#include "nir_control_flow.h"
#ifdef __cplusplus
extern "C" {
@ -71,9 +71,9 @@ nir_builder_at(nir_cursor cursor)
}
nir_builder MUST_CHECK PRINTFLIKE(3, 4)
nir_builder_init_simple_shader(gl_shader_stage stage,
const nir_shader_compiler_options *options,
const char *name, ...);
nir_builder_init_simple_shader(gl_shader_stage stage,
const nir_shader_compiler_options *options,
const char *name, ...);
typedef bool (*nir_instr_pass_cb)(struct nir_builder *, nir_instr *, void *);
@ -400,11 +400,11 @@ nir_type_convert(nir_builder *b,
static inline nir_ssa_def *
nir_convert_to_bit_size(nir_builder *b,
nir_ssa_def *src,
nir_alu_type type,
unsigned bit_size)
nir_ssa_def *src,
nir_alu_type type,
unsigned bit_size)
{
return nir_type_convert(b, src, type, (nir_alu_type) (type | bit_size),
return nir_type_convert(b, src, type, (nir_alu_type)(type | bit_size),
nir_rounding_mode_undef);
}
@ -442,7 +442,7 @@ static inline nir_ssa_def *
nir_b2iN(nir_builder *b, nir_ssa_def *src, uint32_t bit_size)
{
return nir_type_convert(b, src, nir_type_bool,
(nir_alu_type) (nir_type_int | bit_size),
(nir_alu_type)(nir_type_int | bit_size),
nir_rounding_mode_undef);
}
@ -450,7 +450,7 @@ static inline nir_ssa_def *
nir_b2fN(nir_builder *b, nir_ssa_def *src, uint32_t bit_size)
{
return nir_type_convert(b, src, nir_type_bool,
(nir_alu_type) (nir_type_float | bit_size),
(nir_alu_type)(nir_type_float | bit_size),
nir_rounding_mode_undef);
}
@ -458,7 +458,7 @@ static inline nir_ssa_def *
nir_i2fN(nir_builder *b, nir_ssa_def *src, unsigned bit_size)
{
return nir_type_convert(b, src, nir_type_int,
(nir_alu_type) (nir_type_float | bit_size),
(nir_alu_type)(nir_type_float | bit_size),
nir_rounding_mode_undef);
}
@ -466,7 +466,7 @@ static inline nir_ssa_def *
nir_u2fN(nir_builder *b, nir_ssa_def *src, unsigned bit_size)
{
return nir_type_convert(b, src, nir_type_uint,
(nir_alu_type) (nir_type_float | bit_size),
(nir_alu_type)(nir_type_float | bit_size),
nir_rounding_mode_undef);
}
@ -474,7 +474,7 @@ static inline nir_ssa_def *
nir_f2uN(nir_builder *b, nir_ssa_def *src, unsigned bit_size)
{
return nir_type_convert(b, src, nir_type_float,
(nir_alu_type) (nir_type_uint | bit_size),
(nir_alu_type)(nir_type_uint | bit_size),
nir_rounding_mode_undef);
}
@ -482,7 +482,7 @@ static inline nir_ssa_def *
nir_f2iN(nir_builder *b, nir_ssa_def *src, unsigned bit_size)
{
return nir_type_convert(b, src, nir_type_float,
(nir_alu_type) (nir_type_int | bit_size),
(nir_alu_type)(nir_type_int | bit_size),
nir_rounding_mode_undef);
}
@ -548,13 +548,20 @@ nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
{
assert(src0->num_components == src1->num_components);
switch (src0->num_components) {
case 1: return nir_fmul(build, src0, src1);
case 2: return nir_fdot2(build, src0, src1);
case 3: return nir_fdot3(build, src0, src1);
case 4: return nir_fdot4(build, src0, src1);
case 5: return nir_fdot5(build, src0, src1);
case 8: return nir_fdot8(build, src0, src1);
case 16: return nir_fdot16(build, src0, src1);
case 1:
return nir_fmul(build, src0, src1);
case 2:
return nir_fdot2(build, src0, src1);
case 3:
return nir_fdot3(build, src0, src1);
case 4:
return nir_fdot4(build, src0, src1);
case 5:
return nir_fdot5(build, src0, src1);
case 8:
return nir_fdot8(build, src0, src1);
case 16:
return nir_fdot16(build, src0, src1);
default:
unreachable("bad component size");
}
@ -566,13 +573,20 @@ static inline nir_ssa_def *
nir_ball_iequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
{
switch (src0->num_components) {
case 1: return nir_ieq(b, src0, src1);
case 2: return nir_ball_iequal2(b, src0, src1);
case 3: return nir_ball_iequal3(b, src0, src1);
case 4: return nir_ball_iequal4(b, src0, src1);
case 5: return nir_ball_iequal5(b, src0, src1);
case 8: return nir_ball_iequal8(b, src0, src1);
case 16: return nir_ball_iequal16(b, src0, src1);
case 1:
return nir_ieq(b, src0, src1);
case 2:
return nir_ball_iequal2(b, src0, src1);
case 3:
return nir_ball_iequal3(b, src0, src1);
case 4:
return nir_ball_iequal4(b, src0, src1);
case 5:
return nir_ball_iequal5(b, src0, src1);
case 8:
return nir_ball_iequal8(b, src0, src1);
case 16:
return nir_ball_iequal16(b, src0, src1);
default:
unreachable("bad component size");
}
@ -588,13 +602,20 @@ static inline nir_ssa_def *
nir_bany_inequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
{
switch (src0->num_components) {
case 1: return nir_ine(b, src0, src1);
case 2: return nir_bany_inequal2(b, src0, src1);
case 3: return nir_bany_inequal3(b, src0, src1);
case 4: return nir_bany_inequal4(b, src0, src1);
case 5: return nir_bany_inequal5(b, src0, src1);
case 8: return nir_bany_inequal8(b, src0, src1);
case 16: return nir_bany_inequal16(b, src0, src1);
case 1:
return nir_ine(b, src0, src1);
case 2:
return nir_bany_inequal2(b, src0, src1);
case 3:
return nir_bany_inequal3(b, src0, src1);
case 4:
return nir_bany_inequal4(b, src0, src1);
case 5:
return nir_bany_inequal5(b, src0, src1);
case 8:
return nir_bany_inequal8(b, src0, src1);
case 16:
return nir_bany_inequal16(b, src0, src1);
default:
unreachable("bad component size");
}
@ -727,7 +748,7 @@ nir_replicate(nir_builder *b, nir_ssa_def *scalar, unsigned num_components)
assert(scalar->num_components == 1);
assert(num_components <= NIR_MAX_VEC_COMPONENTS);
nir_ssa_def *copies[NIR_MAX_VEC_COMPONENTS] = {NULL};
nir_ssa_def *copies[NIR_MAX_VEC_COMPONENTS] = { NULL };
for (unsigned i = 0; i < num_components; ++i)
copies[i] = scalar;
@ -882,7 +903,7 @@ nir_ishl_imm(nir_builder *build, nir_ssa_def *x, uint32_t y)
if (y == 0) {
return x;
} else {
assert (y < x->bit_size);
assert(y < x->bit_size);
return nir_ishl(build, x, nir_imm_int(build, y));
}
}
@ -987,7 +1008,7 @@ nir_ffma_imm12(nir_builder *build, nir_ssa_def *src0, double src1, double src2)
return nir_fadd_imm(build, nir_fmul_imm(build, src0, src1), src2);
else
return nir_ffma(build, src0, nir_imm_floatN_t(build, src1, src0->bit_size),
nir_imm_floatN_t(build, src2, src0->bit_size));
nir_imm_floatN_t(build, src2, src0->bit_size));
}
static inline nir_ssa_def *
@ -1017,9 +1038,12 @@ nir_pack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
switch (dest_bit_size) {
case 64:
switch (src->bit_size) {
case 32: return nir_pack_64_2x32(b, src);
case 16: return nir_pack_64_4x16(b, src);
default: break;
case 32:
return nir_pack_64_2x32(b, src);
case 16:
return nir_pack_64_4x16(b, src);
default:
break;
}
break;
@ -1053,9 +1077,12 @@ nir_unpack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
switch (src->bit_size) {
case 64:
switch (dest_bit_size) {
case 32: return nir_unpack_64_2x32(b, src);
case 16: return nir_unpack_64_4x16(b, src);
default: break;
case 32:
return nir_unpack_64_2x32(b, src);
case 16:
return nir_unpack_64_4x16(b, src);
default:
break;
}
break;
@ -1120,7 +1147,7 @@ nir_extract_bits(nir_builder *b, nir_ssa_def **srcs, unsigned num_srcs,
const unsigned bit = first_bit + (i * common_bit_size);
while (bit >= src_end_bit) {
src_idx++;
assert(src_idx < (int) num_srcs);
assert(src_idx < (int)num_srcs);
src_start_bit = src_end_bit;
src_end_bit += srcs[src_idx]->bit_size *
srcs[src_idx]->num_components;
@ -1134,8 +1161,7 @@ nir_extract_bits(nir_builder *b, nir_ssa_def **srcs, unsigned num_srcs,
rel_bit / src_bit_size);
if (srcs[src_idx]->bit_size > common_bit_size) {
nir_ssa_def *unpacked = nir_unpack_bits(b, comp, common_bit_size);
comp = nir_channel(b, unpacked, (rel_bit % src_bit_size) /
common_bit_size);
comp = nir_channel(b, unpacked, (rel_bit % src_bit_size) / common_bit_size);
}
common_comps[i] = comp;
}
@ -1465,7 +1491,7 @@ nir_build_deref_follower(nir_builder *b, nir_deref_instr *parent,
if (leader->deref_type == nir_deref_type_array) {
nir_ssa_def *index = nir_i2iN(b, leader->arr.index.ssa,
parent->dest.ssa.bit_size);
parent->dest.ssa.bit_size);
return nir_build_deref_array(b, parent, index);
} else {
return nir_build_deref_array_wildcard(b, parent);
@ -1531,8 +1557,8 @@ static inline void
nir_copy_deref(nir_builder *build, nir_deref_instr *dest, nir_deref_instr *src)
{
nir_copy_deref_with_access(build, dest, src,
(enum gl_access_qualifier) 0,
(enum gl_access_qualifier) 0);
(enum gl_access_qualifier)0,
(enum gl_access_qualifier)0);
}
static inline void
@ -1572,7 +1598,7 @@ static inline void
nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
{
nir_copy_deref(build, nir_build_deref_var(build, dest),
nir_build_deref_var(build, src));
nir_build_deref_var(build, src));
}
static inline nir_ssa_def *
@ -1635,7 +1661,7 @@ nir_store_global(nir_builder *build, nir_ssa_def *addr, unsigned align,
store->src[0] = nir_src_for_ssa(value);
store->src[1] = nir_src_for_ssa(addr);
nir_intrinsic_set_write_mask(store,
write_mask & BITFIELD_MASK(value->num_components));
write_mask & BITFIELD_MASK(value->num_components));
nir_intrinsic_set_align(store, align, 0);
nir_builder_instr_insert(build, &store->instr);
}
@ -1740,7 +1766,7 @@ static inline nir_ssa_def *
nir_tex_deref(nir_builder *b, nir_deref_instr *t, nir_deref_instr *s,
nir_ssa_def *coord)
{
nir_tex_src srcs[] = {nir_tex_src_for_ssa(nir_tex_src_coord, coord)};
nir_tex_src srcs[] = { nir_tex_src_for_ssa(nir_tex_src_coord, coord) };
return nir_build_tex_deref_instr(b, nir_texop_tex, t, s,
ARRAY_SIZE(srcs), srcs);
@ -1832,7 +1858,7 @@ static inline nir_ssa_def *
nir_samples_identical_deref(nir_builder *b, nir_deref_instr *t,
nir_ssa_def *coord)
{
nir_tex_src srcs[] = {nir_tex_src_for_ssa(nir_tex_src_coord, coord)};
nir_tex_src srcs[] = { nir_tex_src_for_ssa(nir_tex_src_coord, coord) };
return nir_build_tex_deref_instr(b, nir_texop_samples_identical, t, NULL,
ARRAY_SIZE(srcs), srcs);
@ -1843,7 +1869,7 @@ static inline nir_ssa_def *
nir_mask(nir_builder *b, nir_ssa_def *bits, unsigned dst_bit_size)
{
return nir_ushr(b, nir_imm_intN_t(b, -1, dst_bit_size),
nir_isub_imm(b, dst_bit_size, nir_u2u32(b, bits)));
nir_isub_imm(b, dst_bit_size, nir_u2u32(b, bits)));
}
static inline nir_ssa_def *

52
src/compiler/nir/nir_builtin_builder.c
View file

@ -27,37 +27,37 @@
#include "nir.h"
#include "nir_builtin_builder.h"
nir_ssa_def*
nir_ssa_def *
nir_cross3(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
{
unsigned yzx[3] = { 1, 2, 0 };
unsigned zxy[3] = { 2, 0, 1 };
return nir_ffma(b, nir_swizzle(b, x, yzx, 3),
nir_swizzle(b, y, zxy, 3),
nir_fneg(b, nir_fmul(b, nir_swizzle(b, x, zxy, 3),
nir_swizzle(b, y, yzx, 3))));
nir_swizzle(b, y, zxy, 3),
nir_fneg(b, nir_fmul(b, nir_swizzle(b, x, zxy, 3),
nir_swizzle(b, y, yzx, 3))));
}
nir_ssa_def*
nir_ssa_def *
nir_cross4(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
{
nir_ssa_def *cross = nir_cross3(b, x, y);
return nir_vec4(b,
nir_channel(b, cross, 0),
nir_channel(b, cross, 1),
nir_channel(b, cross, 2),
nir_imm_intN_t(b, 0, cross->bit_size));
nir_channel(b, cross, 0),
nir_channel(b, cross, 1),
nir_channel(b, cross, 2),
nir_imm_intN_t(b, 0, cross->bit_size));
}
nir_ssa_def*
nir_ssa_def *
nir_fast_length(nir_builder *b, nir_ssa_def *vec)
{
return nir_fsqrt(b, nir_fdot(b, vec, vec));
}
nir_ssa_def*
nir_ssa_def *
nir_nextafter(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
{
nir_ssa_def *zero = nir_imm_intN_t(b, 0, x->bit_size);
@ -106,7 +106,7 @@ nir_nextafter(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
return nir_nan_check2(b, x, y, nir_bcsel(b, condeq, x, res));
}
nir_ssa_def*
nir_ssa_def *
nir_normalize(nir_builder *b, nir_ssa_def *vec)
{
if (vec->num_components == 1)
@ -128,7 +128,7 @@ nir_normalize(nir_builder *b, nir_ssa_def *vec)
return nir_bcsel(b, nir_feq(b, maxc, f0), vec, res);
}
nir_ssa_def*
nir_ssa_def *
nir_smoothstep(nir_builder *b, nir_ssa_def *edge0, nir_ssa_def *edge1, nir_ssa_def *x)
{
nir_ssa_def *f2 = nir_imm_floatN_t(b, 2.0, x->bit_size);
@ -137,13 +137,13 @@ nir_smoothstep(nir_builder *b, nir_ssa_def *edge0, nir_ssa_def *edge1, nir_ssa_d
/* t = clamp((x - edge0) / (edge1 - edge0), 0, 1) */
nir_ssa_def *t =
nir_fsat(b, nir_fdiv(b, nir_fsub(b, x, edge0),
nir_fsub(b, edge1, edge0)));
nir_fsub(b, edge1, edge0)));
/* result = t * t * (3 - 2 * t) */
return nir_fmul(b, t, nir_fmul(b, t, nir_a_minus_bc(b, f3, f2, t)));
}
nir_ssa_def*
nir_ssa_def *
nir_upsample(nir_builder *b, nir_ssa_def *hi, nir_ssa_def *lo)
{
assert(lo->num_components == hi->num_components);
@ -188,7 +188,7 @@ nir_atan(nir_builder *b, nir_ssa_def *y_over_x)
* \ 1.0 / y_over_x otherwise
*/
nir_ssa_def *x = nir_fdiv(b, nir_fmin(b, abs_y_over_x, one),
nir_fmax(b, abs_y_over_x, one));
nir_fmax(b, abs_y_over_x, one));
/*
* approximate atan by evaluating polynomial:
@ -197,19 +197,19 @@ nir_atan(nir_builder *b, nir_ssa_def *y_over_x)
* x^5 * 0.1938924977115610 - x^7 * 0.1173503194786851 +
* x^9 * 0.0536813784310406 - x^11 * 0.0121323213173444
*/
nir_ssa_def *x_2 = nir_fmul(b, x, x);
nir_ssa_def *x_3 = nir_fmul(b, x_2, x);
nir_ssa_def *x_5 = nir_fmul(b, x_3, x_2);
nir_ssa_def *x_7 = nir_fmul(b, x_5, x_2);
nir_ssa_def *x_9 = nir_fmul(b, x_7, x_2);
nir_ssa_def *x_2 = nir_fmul(b, x, x);
nir_ssa_def *x_3 = nir_fmul(b, x_2, x);
nir_ssa_def *x_5 = nir_fmul(b, x_3, x_2);
nir_ssa_def *x_7 = nir_fmul(b, x_5, x_2);
nir_ssa_def *x_9 = nir_fmul(b, x_7, x_2);
nir_ssa_def *x_11 = nir_fmul(b, x_9, x_2);
nir_ssa_def *polynomial_terms[] = {
nir_fmul_imm(b, x, 0.9999793128310355f),
nir_fmul_imm(b, x_3, -0.3326756418091246f),
nir_fmul_imm(b, x_5, 0.1938924977115610f),
nir_fmul_imm(b, x_7, -0.1173503194786851f),
nir_fmul_imm(b, x_9, 0.0536813784310406f),
nir_fmul_imm(b, x, 0.9999793128310355f),
nir_fmul_imm(b, x_3, -0.3326756418091246f),
nir_fmul_imm(b, x_5, 0.1938924977115610f),
nir_fmul_imm(b, x_7, -0.1173503194786851f),
nir_fmul_imm(b, x_9, 0.0536813784310406f),
nir_fmul_imm(b, x_11, -0.0121323213173444f),
};

28
src/compiler/nir/nir_builtin_builder.h
View file

@ -36,16 +36,16 @@ extern "C" {
* Definitions for functions in the C file come first.
*/
nir_ssa_def* nir_cross3(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y);
nir_ssa_def* nir_cross4(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y);
nir_ssa_def* nir_fast_length(nir_builder *b, nir_ssa_def *vec);
nir_ssa_def* nir_nextafter(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y);
nir_ssa_def* nir_normalize(nir_builder *b, nir_ssa_def *vec);
nir_ssa_def* nir_smoothstep(nir_builder *b, nir_ssa_def *edge0,
nir_ssa_def *nir_cross3(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y);
nir_ssa_def *nir_cross4(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y);
nir_ssa_def *nir_fast_length(nir_builder *b, nir_ssa_def *vec);
nir_ssa_def *nir_nextafter(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y);
nir_ssa_def *nir_normalize(nir_builder *b, nir_ssa_def *vec);
nir_ssa_def *nir_smoothstep(nir_builder *b, nir_ssa_def *edge0,
nir_ssa_def *edge1, nir_ssa_def *x);
nir_ssa_def* nir_upsample(nir_builder *b, nir_ssa_def *hi, nir_ssa_def *lo);
nir_ssa_def* nir_atan(nir_builder *b, nir_ssa_def *y_over_x);
nir_ssa_def* nir_atan2(nir_builder *b, nir_ssa_def *y, nir_ssa_def *x);
nir_ssa_def *nir_upsample(nir_builder *b, nir_ssa_def *hi, nir_ssa_def *lo);
nir_ssa_def *nir_atan(nir_builder *b, nir_ssa_def *y_over_x);
nir_ssa_def *nir_atan2(nir_builder *b, nir_ssa_def *y, nir_ssa_def *x);
nir_ssa_def *
nir_get_texture_lod(nir_builder *b, nir_tex_instr *tex);
@ -171,19 +171,19 @@ nir_fast_distance(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
return nir_fast_length(b, nir_fsub(b, x, y));
}
static inline nir_ssa_def*
static inline nir_ssa_def *
nir_fast_normalize(nir_builder *b, nir_ssa_def *vec)
{
return nir_fdiv(b, vec, nir_fast_length(b, vec));
}
static inline nir_ssa_def*
static inline nir_ssa_def *
nir_fmad(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y, nir_ssa_def *z)
{
return nir_fadd(b, nir_fmul(b, x, y), z);
}
static inline nir_ssa_def*
static inline nir_ssa_def *
nir_maxmag(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
{
nir_ssa_def *xabs = nir_fabs(b, x);
@ -195,7 +195,7 @@ nir_maxmag(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
return nir_bcsel(b, condy, y, nir_bcsel(b, condx, x, nir_fmax(b, x, y)));
}
static inline nir_ssa_def*
static inline nir_ssa_def *
nir_minmag(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
{
nir_ssa_def *xabs = nir_fabs(b, x);
@ -207,7 +207,7 @@ nir_minmag(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
return nir_bcsel(b, condy, y, nir_bcsel(b, condx, x, nir_fmin(b, x, y)));
}
static inline nir_ssa_def*
static inline nir_ssa_def *
nir_nan(nir_builder *b, nir_ssa_def *x)
{
nir_ssa_def *nan = nir_imm_floatN_t(b, NAN, x->bit_size);

4
src/compiler/nir/nir_clone.c
View file

@ -666,8 +666,8 @@ clone_function(clone_state *state, const nir_function *fxn, nir_shader *ns)
nfxn->num_params = fxn->num_params;
if (fxn->num_params) {
nfxn->params = ralloc_array(state->ns, nir_parameter, fxn->num_params);
memcpy(nfxn->params, fxn->params, sizeof(nir_parameter) * fxn->num_params);
nfxn->params = ralloc_array(state->ns, nir_parameter, fxn->num_params);
memcpy(nfxn->params, fxn->params, sizeof(nir_parameter) * fxn->num_params);
}
nfxn->is_entrypoint = fxn->is_entrypoint;
nfxn->is_preamble = fxn->is_preamble;

10
src/compiler/nir/nir_control_flow.c
View file

@ -154,7 +154,6 @@ link_block_to_non_block(nir_block *block, nir_cf_node *node)
unlink_block_successors(block);
link_blocks(block, loop_header_block, NULL);
}
}
/**
@ -190,7 +189,7 @@ split_block_beginning(nir_block *block)
exec_node_insert_node_before(&block->cf_node.node, &new_block->cf_node.node);
set_foreach(block->predecessors, entry) {
nir_block *pred = (nir_block *) entry->key;
nir_block *pred = (nir_block *)entry->key;
replace_successor(pred, block, new_block);
}
@ -440,7 +439,7 @@ nir_loop_add_continue_construct(nir_loop *loop)
nir_block *header = nir_loop_first_block(loop);
nir_block *preheader = nir_block_cf_tree_prev(header);
set_foreach(header->predecessors, entry) {
nir_block *pred = (nir_block *) entry->key;
nir_block *pred = (nir_block *)entry->key;
if (pred != preheader)
replace_successor(pred, header, cont);
}
@ -457,7 +456,7 @@ nir_loop_remove_continue_construct(nir_loop *loop)
nir_block *header = nir_loop_first_block(loop);
nir_block *cont = nir_loop_first_continue_block(loop);
set_foreach(cont->predecessors, entry) {
nir_block *pred = (nir_block*) entry->key;
nir_block *pred = (nir_block *)entry->key;
replace_successor(pred, cont, header);
}
block_remove_pred(header, cont);
@ -611,8 +610,7 @@ stitch_blocks(nir_block *before, nir_block *after)
exec_list_append(&before->instr_list, &after->instr_list);
exec_node_remove(&after->cf_node.node);
return last_before_instr ? nir_after_instr(last_before_instr) :
nir_before_block(before);
return last_before_instr ? nir_after_instr(last_before_instr) : nir_before_block(before);
}
}

1
src/compiler/nir/nir_control_flow.h
View file

@ -79,7 +79,6 @@ nir_cf_node_insert_end(struct exec_list *list, nir_cf_node *node)
nir_cf_node_insert(nir_after_cf_list(list), node);
}
/** Control flow motion.
*
* These functions let you take a part of a control flow list (basically

1
src/compiler/nir/nir_control_flow_private.h
View file

@ -30,7 +30,6 @@
#include "nir_control_flow.h"
/* Internal control-flow modification functions used when inserting/removing
* instructions.
*/

39
src/compiler/nir/nir_conversion_builder.h
View file

@ -72,7 +72,7 @@ nir_round_float_to_float(nir_builder *b, nir_ssa_def *src,
switch (round) {
case nir_rounding_mode_ru: {
/* If lower-precision conversion results in a lower value, push it
* up one ULP. */
* up one ULP. */
nir_ssa_def *lower_prec =
nir_build_alu(b, low_conv, src, NULL, NULL, NULL);
nir_ssa_def *roundtrip =
@ -83,7 +83,7 @@ nir_round_float_to_float(nir_builder *b, nir_ssa_def *src,
}
case nir_rounding_mode_rd: {
/* If lower-precision conversion results in a higher value, push it
* down one ULP. */
* down one ULP. */
nir_ssa_def *lower_prec =
nir_build_alu(b, low_conv, src, NULL, NULL, NULL);
nir_ssa_def *roundtrip =
@ -94,10 +94,10 @@ nir_round_float_to_float(nir_builder *b, nir_ssa_def *src,
}
case nir_rounding_mode_rtz:
return nir_bcsel(b, nir_flt_imm(b, src, 1),
nir_round_float_to_float(b, src, dest_bit_size,
nir_rounding_mode_ru),
nir_round_float_to_float(b, src, dest_bit_size,
nir_rounding_mode_rd));
nir_round_float_to_float(b, src, dest_bit_size,
nir_rounding_mode_ru),
nir_round_float_to_float(b, src, dest_bit_size,
nir_rounding_mode_rd));
case nir_rounding_mode_rtne:
case nir_rounding_mode_undef:
break;
@ -125,7 +125,8 @@ nir_round_int_to_float(nir_builder *b, nir_ssa_def *src,
case 64:
mantissa_bits = 52;
break;
default: unreachable("Unsupported bit size");
default:
unreachable("Unsupported bit size");
}
if (src->bit_size < mantissa_bits)
@ -142,7 +143,7 @@ nir_round_int_to_float(nir_builder *b, nir_ssa_def *src,
switch (round) {
case nir_rounding_mode_rtz:
return nir_bcsel(b, sign, nir_ineg(b, positive_rounded),
positive_rounded);
positive_rounded);
break;
case nir_rounding_mode_ru:
return nir_bcsel(b, sign,
@ -175,7 +176,7 @@ nir_round_int_to_float(nir_builder *b, nir_ssa_def *src,
break;
case nir_rounding_mode_ru:
return nir_bcsel(b, nir_ieq(b, src, truncated),
src, nir_uadd_sat(b, truncated, adjust));
src, nir_uadd_sat(b, truncated, adjust));
case nir_rounding_mode_rtne:
case nir_rounding_mode_undef:
break;
@ -266,8 +267,7 @@ nir_get_clamp_limits(nir_builder *b,
break;
}
case nir_type_uint: {
uint64_t uhigh = dest_bit_size == 64 ?
~0ull : (1ull << dest_bit_size) - 1;
uint64_t uhigh = dest_bit_size == 64 ? ~0ull : (1ull << dest_bit_size) - 1;
if (src_base_type != nir_type_float) {
*low = nir_imm_intN_t(b, 0, src_bit_size);
if (src_base_type == nir_type_uint || src_bit_size > dest_bit_size)
@ -314,8 +314,7 @@ nir_get_clamp_limits(nir_builder *b,
break;
}
case nir_type_uint: {
uint64_t src_uhigh = src_bit_size == 64 ?
~0ull : (1ull << src_bit_size) - 1;
uint64_t src_uhigh = src_bit_size == 64 ? ~0ull : (1ull << src_bit_size) - 1;
if (src_uhigh > fhigh)
*high = nir_imm_intN_t(b, fhigh, src_bit_size);
break;
@ -338,7 +337,7 @@ nir_get_clamp_limits(nir_builder *b,
/**
* Clamp the value into the widest representatble range of the
* destination type with cmp + bcsel.
*
*
* val/val_type: The variables used for bcsel
* src/src_type: The variables used for comparison
* dest_type: The type which determines the range used for comparison
@ -450,7 +449,7 @@ nir_convert_with_rounding(nir_builder *b,
/* Try to simplify the conversion if we can */
clamp = clamp &&
!nir_alu_type_range_contains_type_range(dest_type, src_type);
!nir_alu_type_range_contains_type_range(dest_type, src_type);
round = nir_simplify_conversion_rounding(src_type, dest_type, round);
/* For float -> int/uint conversions, we might not be able to represent
@ -458,8 +457,8 @@ nir_convert_with_rounding(nir_builder *b,
* do the comparison in float range, but the bcsel in the destination range.
*/
bool clamp_after_conversion = clamp &&
src_base_type == nir_type_float &&
dest_base_type != nir_type_float;
src_base_type == nir_type_float &&
dest_base_type != nir_type_float;
/*
* If we don't care about rounding and clamping, we can just use NIR's
@ -473,9 +472,9 @@ nir_convert_with_rounding(nir_builder *b,
if (!clamp && round == nir_rounding_mode_undef) {
trivial_convert = true;
} else if (!clamp && src_type == nir_type_float32 &&
dest_type == nir_type_float16 &&
(round == nir_rounding_mode_rtne ||
round == nir_rounding_mode_rtz)) {
dest_type == nir_type_float16 &&
(round == nir_rounding_mode_rtne ||
round == nir_rounding_mode_rtz)) {
trivial_convert = true;
} else {
trivial_convert = false;

41
src/compiler/nir/nir_deref.c
View file

@ -21,10 +21,10 @@
* IN THE SOFTWARE.
*/
#include "nir.h"
#include "nir_builder.h"
#include "nir_deref.h"
#include "util/hash_table.h"
#include "nir.h"
#include "nir_builder.h"
static bool
is_trivial_deref_cast(nir_deref_instr *cast)
@ -144,8 +144,8 @@ nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr)
for (; instr; instr = nir_deref_instr_parent(instr)) {
if (instr->deref_type == nir_deref_type_array &&
nir_src_is_const(instr->arr.index) &&
nir_src_as_uint(instr->arr.index) >=
glsl_get_length(nir_deref_instr_parent(instr)->type))
nir_src_as_uint(instr->arr.index) >=
glsl_get_length(nir_deref_instr_parent(instr)->type))
return true;
}
@ -318,13 +318,13 @@ nir_deref_instr_get_const_offset(nir_deref_instr *deref,
case nir_deref_type_array:
offset += nir_src_as_uint((*p)->arr.index) *
type_get_array_stride((*p)->type, size_align);
break;
break;
case nir_deref_type_struct: {
/* p starts at path[1], so this is safe */
nir_deref_instr *parent = *(p - 1);
offset += struct_type_get_field_offset(parent->type, size_align,
(*p)->strct.index);
break;
break;
}
case nir_deref_type_cast:
/* A cast doesn't contribute to the offset */
@ -393,7 +393,7 @@ nir_remove_dead_derefs_impl(nir_function_impl *impl)
if (progress) {
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}
@ -452,9 +452,10 @@ nir_fixup_deref_modes(nir_shader *shader)
{
nir_shader_instructions_pass(shader, nir_fixup_deref_modes_instr,
nir_metadata_block_index |
nir_metadata_dominance |
nir_metadata_live_ssa_defs |
nir_metadata_instr_index, NULL);
nir_metadata_dominance |
nir_metadata_live_ssa_defs |
nir_metadata_instr_index,
NULL);
}
static bool
@ -717,7 +718,8 @@ nir_compare_derefs(nir_deref_instr *a, nir_deref_instr *b)
return result;
}
nir_deref_path *nir_get_deref_path(void *mem_ctx, nir_deref_and_path *deref)
nir_deref_path *
nir_get_deref_path(void *mem_ctx, nir_deref_and_path *deref)
{
if (!deref->_path) {
deref->_path = ralloc(mem_ctx, nir_deref_path);
@ -726,9 +728,10 @@ nir_deref_path *nir_get_deref_path(void *mem_ctx, nir_deref_and_path *deref)
return deref->_path;
}
nir_deref_compare_result nir_compare_derefs_and_paths(void *mem_ctx,
nir_deref_and_path *a,
nir_deref_and_path *b)
nir_deref_compare_result
nir_compare_derefs_and_paths(void *mem_ctx,
nir_deref_and_path *a,
nir_deref_and_path *b)
{
if (a->instr == b->instr) /* nir_compare_derefs has a fast path if a == b */
return nir_compare_derefs(a->instr, b->instr);
@ -1196,7 +1199,6 @@ opt_deref_cast(nir_builder *b, nir_deref_instr *cast)
bool trivial_array_cast = is_trivial_array_deref_cast(cast);
nir_foreach_use_including_if_safe(use_src, &cast->dest.ssa) {
assert(!use_src->is_if && "there cannot be if-uses");
@ -1250,11 +1252,10 @@ opt_deref_ptr_as_array(nir_builder *b, nir_deref_instr *deref)
parent->deref_type != nir_deref_type_ptr_as_array)
return false;
deref->arr.in_bounds &= parent->arr.in_bounds;
nir_ssa_def *new_idx = nir_iadd(b, parent->arr.index.ssa,
deref->arr.index.ssa);
deref->arr.index.ssa);
deref->deref_type = parent->deref_type;
nir_instr_rewrite_src(&deref->instr, &deref->parent, parent->parent);
@ -1316,7 +1317,9 @@ resize_vector(nir_builder *b, nir_ssa_def *data, unsigned num_components)
if (num_components == data->num_components)
return data;
unsigned swiz[NIR_MAX_VEC_COMPONENTS] = { 0, };
unsigned swiz[NIR_MAX_VEC_COMPONENTS] = {
0,
};
for (unsigned i = 0; i < MIN2(num_components, data->num_components); i++)
swiz[i] = i;
@ -1505,7 +1508,7 @@ nir_opt_deref_impl(nir_function_impl *impl)
if (progress) {
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}

6
src/compiler/nir/nir_deref.h
View file

@ -62,9 +62,9 @@ nir_ssa_def *nir_build_deref_offset(nir_builder *b, nir_deref_instr *deref,
nir_deref_path *nir_get_deref_path(void *mem_ctx, nir_deref_and_path *deref);
typedef enum {
nir_derefs_do_not_alias = 0,
nir_derefs_equal_bit = (1 << 0),
nir_derefs_may_alias_bit = (1 << 1),
nir_derefs_do_not_alias = 0,
nir_derefs_equal_bit = (1 << 0),
nir_derefs_may_alias_bit = (1 << 1),
nir_derefs_a_contains_b_bit = (1 << 2),
nir_derefs_b_contains_a_bit = (1 << 3),
} nir_deref_compare_result;

9
src/compiler/nir/nir_divergence_analysis.c
View file

@ -669,7 +669,8 @@ visit_ssa_undef(nir_ssa_undef_instr *instr)
}
static bool
nir_variable_mode_is_uniform(nir_variable_mode mode) {
nir_variable_mode_is_uniform(nir_variable_mode mode)
{
switch (mode) {
case nir_var_uniform:
case nir_var_mem_ubo:
@ -869,7 +870,7 @@ visit_loop_header_phi(nir_phi_instr *phi, nir_block *preheader, bool divergent_c
if (phi->dest.ssa.divergent)
return false;
nir_ssa_def* same = NULL;
nir_ssa_def *same = NULL;
nir_foreach_phi_src(src, phi) {
/* if any source value is divergent, the resulting value is divergent */
if (src->src.ssa->divergent) {
@ -1058,7 +1059,8 @@ nir_divergence_analysis(nir_shader *shader)
visit_cf_list(&nir_shader_get_entrypoint(shader)->body, &state);
}
bool nir_update_instr_divergence(nir_shader *shader, nir_instr *instr)
bool
nir_update_instr_divergence(nir_shader *shader, nir_instr *instr)
{
nir_foreach_ssa_def(instr, set_ssa_def_not_divergent, NULL);
@ -1078,7 +1080,6 @@ bool nir_update_instr_divergence(nir_shader *shader, nir_instr *instr)
return true;
}
bool
nir_has_divergent_loop(nir_shader *shader)
{

12
src/compiler/nir/nir_dominance.c
View file

@ -74,7 +74,7 @@ calc_dominance(nir_block *block)
{
nir_block *new_idom = NULL;
set_foreach(block->predecessors, entry) {
nir_block *pred = (nir_block *) entry->key;
nir_block *pred = (nir_block *)entry->key;
if (pred->imm_dom) {
if (new_idom)
@ -97,7 +97,7 @@ calc_dom_frontier(nir_block *block)
{
if (block->predecessors->entries > 1) {
set_foreach(block->predecessors, entry) {
nir_block *runner = (nir_block *) entry->key;
nir_block *runner = (nir_block *)entry->key;
/* Skip unreachable predecessors */
if (runner->imm_dom == NULL)
@ -125,7 +125,7 @@ calc_dom_frontier(nir_block *block)
*/
static void
calc_dom_children(nir_function_impl* impl)
calc_dom_children(nir_function_impl *impl)
{
void *mem_ctx = ralloc_parent(impl);
@ -142,8 +142,7 @@ calc_dom_children(nir_function_impl* impl)
nir_foreach_block_unstructured(block, impl) {
if (block->imm_dom) {
block->imm_dom->dom_children[block->imm_dom->num_dom_children++]
= block;
block->imm_dom->dom_children[block->imm_dom->num_dom_children++] = block;
}
}
}
@ -170,7 +169,6 @@ nir_calc_dominance_impl(nir_function_impl *impl)
nir_metadata_require(impl, nir_metadata_block_index);
nir_foreach_block_unstructured(block, impl) {
init_block(block, impl);
}
@ -303,7 +301,7 @@ nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp)
nir_foreach_block_unstructured(block, impl) {
fprintf(fp, "DF(%u) = {", block->index);
set_foreach(block->dom_frontier, entry) {
nir_block *df = (nir_block *) entry->key;
nir_block *df = (nir_block *)entry->key;
fprintf(fp, "%u, ", df->index);
}
fprintf(fp, "}\n");

52
src/compiler/nir/nir_format_convert.h
View file

@ -79,15 +79,12 @@ nir_format_sign_extend_ivec(nir_builder *b, nir_ssa_def *src,
nir_ssa_def *comps[4];
for (unsigned i = 0; i < src->num_components; i++) {
unsigned shift = src->bit_size - bits[i];
comps[i] = nir_ishr_imm(b, nir_ishl_imm(b,
nir_channel(b, src, i),
shift),
shift);
comps[i] = nir_ishr_imm(b, nir_ishl_imm(b, nir_channel(b, src, i), shift),
shift);
}
return nir_vec(b, comps, src->num_components);
}
static inline nir_ssa_def *
nir_format_unpack_int(nir_builder *b, nir_ssa_def *packed,
const unsigned *bits, unsigned num_components,
@ -147,8 +144,7 @@ nir_format_pack_uint_unmasked(nir_builder *b, nir_ssa_def *color,
nir_ssa_def *packed = nir_imm_int(b, 0);
unsigned offset = 0;
for (unsigned i = 0; i < num_components; i++) {
packed = nir_ior(b, packed, nir_shift_imm(b, nir_channel(b, color, i),
offset));
packed = nir_ior(b, packed, nir_shift_imm(b, nir_channel(b, color, i), offset));
offset += bits[i];
}
assert(offset <= packed->bit_size);
@ -192,13 +188,13 @@ nir_format_bitcast_uvec_unmasked(nir_builder *b, nir_ssa_def *src,
DIV_ROUND_UP(src->num_components * src_bits, dst_bits);
assert(dst_components <= 4);
nir_ssa_def *dst_chan[4] = {0};
nir_ssa_def *dst_chan[4] = { 0 };
if (dst_bits > src_bits) {
unsigned shift = 0;
unsigned dst_idx = 0;
for (unsigned i = 0; i < src->num_components; i++) {
nir_ssa_def *shifted = nir_ishl_imm(b, nir_channel(b, src, i),
shift);
shift);
if (shift == 0) {
dst_chan[dst_idx] = shifted;
} else {
@ -263,7 +259,7 @@ nir_format_snorm_to_float(nir_builder *b, nir_ssa_def *s, const unsigned *bits)
_nir_format_norm_factor(b, bits, s->num_components, true);
return nir_fmax(b, nir_fdiv(b, nir_i2f32(b, s), factor),
nir_imm_float(b, -1.0f));
nir_imm_float(b, -1.0f));
}
static inline nir_ssa_def *
@ -308,12 +304,11 @@ nir_format_linear_to_srgb(nir_builder *b, nir_ssa_def *c)
{
nir_ssa_def *linear = nir_fmul_imm(b, c, 12.92f);
nir_ssa_def *curved =
nir_fadd_imm(b, nir_fmul_imm(b, nir_fpow(b, c, nir_imm_float(b, 1.0 / 2.4)),
1.055f),
-0.055f);
nir_fadd_imm(b, nir_fmul_imm(b, nir_fpow(b, c, nir_imm_float(b, 1.0 / 2.4)), 1.055f),
-0.055f);
return nir_fsat(b, nir_bcsel(b, nir_flt_imm(b, c, 0.0031308f),
linear, curved));
linear, curved));
}
static inline nir_ssa_def *
@ -321,12 +316,11 @@ nir_format_srgb_to_linear(nir_builder *b, nir_ssa_def *c)
{
nir_ssa_def *linear = nir_fdiv_imm(b, c, 12.92f);
nir_ssa_def *curved =
nir_fpow(b, nir_fmul_imm(b, nir_fadd_imm(b, c, 0.055f),
1.0 / 1.055f),
nir_imm_float(b, 2.4f));
nir_fpow(b, nir_fmul_imm(b, nir_fadd_imm(b, c, 0.055f), 1.0 / 1.055f),
nir_imm_float(b, 2.4f));
return nir_fsat(b, nir_bcsel(b, nir_fle_imm(b, c, 0.04045f),
linear, curved));
linear, curved));
}
/* Clamps a vector of uints so they don't extend beyond the given number of
@ -392,9 +386,9 @@ nir_format_pack_11f11f10f(nir_builder *b, nir_ssa_def *color)
nir_ssa_def *undef = nir_ssa_undef(b, 1, color->bit_size);
nir_ssa_def *p1 = nir_pack_half_2x16_split(b, nir_channel(b, clamped, 0),
nir_channel(b, clamped, 1));
nir_channel(b, clamped, 1));
nir_ssa_def *p2 = nir_pack_half_2x16_split(b, nir_channel(b, clamped, 2),
undef);
undef);
/* A 10 or 11-bit float has the same exponent as a 16-bit float but with
* fewer mantissa bits and no sign bit. All we have to do is throw away
@ -418,12 +412,12 @@ nir_format_pack_r9g9b9e5(nir_builder *b, nir_ssa_def *color)
/* Get rid of negatives and NaN */
clamped = nir_bcsel(b, nir_ugt_imm(b, color, 0x7f800000),
nir_imm_float(b, 0), clamped);
nir_imm_float(b, 0), clamped);
/* maxrgb.u = MAX3(rc.u, gc.u, bc.u); */
nir_ssa_def *maxu = nir_umax(b, nir_channel(b, clamped, 0),
nir_umax(b, nir_channel(b, clamped, 1),
nir_channel(b, clamped, 2)));
nir_umax(b, nir_channel(b, clamped, 1),
nir_channel(b, clamped, 2)));
/* maxrgb.u += maxrgb.u & (1 << (23-9)); */
maxu = nir_iadd(b, maxu, nir_iand_imm(b, maxu, 1 << 14));
@ -432,17 +426,15 @@ nir_format_pack_r9g9b9e5(nir_builder *b, nir_ssa_def *color)
* 1 + RGB9E5_EXP_BIAS - 127;
*/
nir_ssa_def *exp_shared =
nir_iadd_imm(b, nir_umax(b, nir_ushr_imm(b, maxu, 23),
nir_imm_int(b, -RGB9E5_EXP_BIAS - 1 + 127)),
1 + RGB9E5_EXP_BIAS - 127);
nir_iadd_imm(b, nir_umax(b, nir_ushr_imm(b, maxu, 23), nir_imm_int(b, -RGB9E5_EXP_BIAS - 1 + 127)),
1 + RGB9E5_EXP_BIAS - 127);
/* revdenom_biasedexp = 127 - (exp_shared - RGB9E5_EXP_BIAS -
* RGB9E5_MANTISSA_BITS) + 1;
*/
nir_ssa_def *revdenom_biasedexp =
nir_isub_imm(b, 127 + RGB9E5_EXP_BIAS +
RGB9E5_MANTISSA_BITS + 1,
exp_shared);
nir_isub_imm(b, 127 + RGB9E5_EXP_BIAS + RGB9E5_MANTISSA_BITS + 1,
exp_shared);
/* revdenom.u = revdenom_biasedexp << 23; */
nir_ssa_def *revdenom =
@ -460,7 +452,7 @@ nir_format_pack_r9g9b9e5(nir_builder *b, nir_ssa_def *color)
* bm = (bm & 1) + (bm >> 1);
*/
mantissa = nir_iadd(b, nir_iand_imm(b, mantissa, 1),
nir_ushr_imm(b, mantissa, 1));
nir_ushr_imm(b, mantissa, 1));
nir_ssa_def *packed = nir_channel(b, mantissa, 0);
packed = nir_mask_shift_or(b, packed, nir_channel(b, mantissa, 1), ~0, 9);

38
src/compiler/nir/nir_from_ssa.c
View file

@ -82,7 +82,8 @@ ssa_def_dominates(nir_ssa_def *a, nir_ssa_def *b)
if (a->parent_instr->type == nir_instr_type_ssa_undef) {
/* SSA undefs always dominate */
return true;
} if (def_after(a, b)) {
}
if (def_after(a, b)) {
return false;
} else if (a->parent_instr->block == b->parent_instr->block) {
return def_after(b, a);
@ -92,7 +93,6 @@ ssa_def_dominates(nir_ssa_def *a, nir_ssa_def *b)
}
}
/* The following data structure, which I have named merge_set is a way of
* representing a set registers of non-interfering registers. This is
* based on the concept of a "dominance forest" presented in "Fast Copy
@ -453,7 +453,7 @@ coalesce_phi_nodes_block(nir_block *block, struct from_ssa_state *state)
static void
aggressive_coalesce_parallel_copy(nir_parallel_copy_instr *pcopy,
struct from_ssa_state *state)
struct from_ssa_state *state)
{
nir_foreach_parallel_copy_entry(entry, pcopy) {
assert(!entry->src_is_reg);
@ -551,15 +551,15 @@ nir_rewrite_uses_to_load_reg(nir_builder *b, nir_ssa_def *old,
*/
nir_ssa_def *load = NULL;
if (b->cursor.option == nir_cursor_before_instr) {
nir_instr *prev = nir_instr_prev(b->cursor.instr);
nir_instr *prev = nir_instr_prev(b->cursor.instr);
if (prev != NULL && prev->type == nir_instr_type_intrinsic) {
nir_intrinsic_instr *intr = nir_instr_as_intrinsic(prev);
if (intr->intrinsic == nir_intrinsic_load_reg &&
intr->src[0].ssa == reg &&
nir_intrinsic_base(intr) == 0)
load = &intr->dest.ssa;
}
if (prev != NULL && prev->type == nir_instr_type_intrinsic) {
nir_intrinsic_instr *intr = nir_instr_as_intrinsic(prev);
if (intr->intrinsic == nir_intrinsic_load_reg &&
intr->src[0].ssa == reg &&
nir_intrinsic_base(intr) == 0)
load = &intr->dest.ssa;
}
}
if (load == NULL)
@ -968,7 +968,7 @@ resolve_parallel_copy(nir_parallel_copy_instr *pcopy,
}
set_reg_divergent(reg, copy_value_is_divergent(values[b]));
values[num_vals] = (struct copy_value) {
values[num_vals] = (struct copy_value){
.is_reg = true,
.ssa = reg,
};
@ -1034,12 +1034,11 @@ nir_convert_from_ssa_impl(nir_function_impl *impl,
/* Mark metadata as dirty before we ask for liveness analysis */
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
nir_metadata_require(impl, nir_metadata_instr_index |
nir_metadata_live_ssa_defs |
nir_metadata_dominance);
nir_metadata_live_ssa_defs |
nir_metadata_dominance);
nir_foreach_block(block, impl) {
coalesce_phi_nodes_block(block, &state);
@ -1056,7 +1055,7 @@ nir_convert_from_ssa_impl(nir_function_impl *impl,
}
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
/* Clean up dead instructions and the hash tables */
nir_instr_free_list(&state.dead_instrs);
@ -1078,13 +1077,12 @@ nir_convert_from_ssa(nir_shader *shader,
return progress;
}
static void
place_phi_read(nir_builder *b, nir_ssa_def *reg,
nir_ssa_def *def, nir_block *block, struct set *visited_blocks)
{
/* Search already visited blocks to avoid back edges in tree */
if (_mesa_set_search(visited_blocks, block) == NULL) {
/* Search already visited blocks to avoid back edges in tree */
if (_mesa_set_search(visited_blocks, block) == NULL) {
/* Try to go up the single-successor tree */
bool all_single_successors = true;
set_foreach(block->predecessors, entry) {

20
src/compiler/nir/nir_gather_info.c
View file

@ -21,9 +21,9 @@
* IN THE SOFTWARE.
*/
#include "main/menums.h"
#include "nir.h"
#include "nir_deref.h"
#include "main/menums.h"
#include "util/set.h"
@ -33,7 +33,7 @@ src_is_invocation_id(const nir_src *src)
nir_ssa_scalar s = nir_ssa_scalar_resolved(src->ssa, 0);
return s.def->parent_instr->type == nir_instr_type_intrinsic &&
nir_instr_as_intrinsic(s.def->parent_instr)->intrinsic ==
nir_intrinsic_load_invocation_id;
nir_intrinsic_load_invocation_id;
}
static bool
@ -42,7 +42,7 @@ src_is_local_invocation_index(const nir_src *src)
nir_ssa_scalar s = nir_ssa_scalar_resolved(src->ssa, 0);
return s.def->parent_instr->type == nir_instr_type_intrinsic &&
nir_instr_as_intrinsic(s.def->parent_instr)->intrinsic ==
nir_intrinsic_load_local_invocation_index;
nir_intrinsic_load_local_invocation_index;
}
static void
@ -109,8 +109,7 @@ set_io_mask(nir_shader *shader, nir_variable *var, int offset, int len,
return;
bitfield = BITFIELD64_BIT(idx - VARYING_SLOT_PATCH0);
}
else {
} else {
/* Varyings might still have temp locations so abort */
if (idx >= VARYING_SLOT_MAX)
return;
@ -222,9 +221,7 @@ get_io_offset(nir_deref_instr *deref, nir_variable *var, bool is_arrayed,
return 0;
}
assert(deref->deref_type == nir_deref_type_array);
return nir_src_is_const(deref->arr.index) ?
(nir_src_as_uint(deref->arr.index) + var->data.location_frac) / 4u :
(unsigned)-1;
return nir_src_is_const(deref->arr.index) ? (nir_src_as_uint(deref->arr.index) + var->data.location_frac) / 4u : (unsigned)-1;
}
unsigned offset = 0;
@ -452,10 +449,10 @@ gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader,
case nir_intrinsic_interp_deref_at_vertex:
case nir_intrinsic_load_deref:
case nir_intrinsic_store_deref:
case nir_intrinsic_copy_deref:{
case nir_intrinsic_copy_deref: {
nir_deref_instr *deref = nir_src_as_deref(instr->src[0]);
if (nir_deref_mode_is_one_of(deref, nir_var_shader_in |
nir_var_shader_out)) {
nir_var_shader_out)) {
nir_variable *var = nir_deref_instr_get_variable(deref);
bool is_output_read = false;
if (var->data.mode == nir_var_shader_out &&
@ -582,8 +579,7 @@ gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader,
case nir_intrinsic_load_color0:
case nir_intrinsic_load_color1:
shader->info.inputs_read |=
BITFIELD64_BIT(VARYING_SLOT_COL0 <<
(instr->intrinsic == nir_intrinsic_load_color1));
BITFIELD64_BIT(VARYING_SLOT_COL0 << (instr->intrinsic == nir_intrinsic_load_color1));
FALLTHROUGH;
case nir_intrinsic_load_subgroup_size:
case nir_intrinsic_load_subgroup_invocation:

2
src/compiler/nir/nir_gather_ssa_types.c
View file

@ -21,8 +21,8 @@
* IN THE SOFTWARE.
*/
#include "nir.h"
#include "util/bitset.h"
#include "nir.h"
static void
set_type(unsigned idx, nir_alu_type type, BITSET_WORD *float_types,

19
src/compiler/nir/nir_gather_xfb_info.c
View file

@ -44,7 +44,6 @@ add_var_xfb_varying(nir_xfb_info *xfb,
xfb->buffers[buffer].varying_count++;
}
static nir_xfb_info *
nir_xfb_info_create(void *mem_ctx, uint16_t output_count)
{
@ -231,8 +230,8 @@ nir_gather_xfb_info_with_varyings(nir_shader *shader,
* that contains an array.
*/
bool is_array_block = var->interface_type != NULL &&
glsl_type_is_array(var->type) &&
glsl_without_array(var->type) == var->interface_type;
glsl_type_is_array(var->type) &&
glsl_without_array(var->type) == var->interface_type;
if (var->data.explicit_offset && !is_array_block) {
unsigned offset = var->data.offset;
@ -275,7 +274,7 @@ nir_gather_xfb_info_with_varyings(nir_shader *shader,
#ifndef NDEBUG
/* Finally, do a sanity check */
unsigned max_offset[NIR_MAX_XFB_BUFFERS] = {0};
unsigned max_offset[NIR_MAX_XFB_BUFFERS] = { 0 };
for (unsigned i = 0; i < xfb->output_count; i++) {
assert(xfb->outputs[i].offset >= max_offset[xfb->outputs[i].buffer]);
assert(xfb->outputs[i].component_mask != 0);
@ -318,12 +317,12 @@ void
nir_gather_xfb_info_from_intrinsics(nir_shader *nir)
{
nir_function_impl *impl = nir_shader_get_entrypoint(nir);
uint8_t buffer_to_stream[MAX_XFB_BUFFERS] = {0};
uint8_t buffer_to_stream[MAX_XFB_BUFFERS] = { 0 };
uint8_t buffer_mask = 0;
uint8_t stream_mask = 0;
/* Gather xfb outputs. */
struct util_dynarray array = {0};
struct util_dynarray array = { 0 };
nir_foreach_block(block, impl) {
nir_foreach_instr(instr, block) {
@ -338,8 +337,7 @@ nir_gather_xfb_info_from_intrinsics(nir_shader *nir)
while (wr_mask) {
unsigned i = u_bit_scan(&wr_mask);
unsigned index = nir_intrinsic_component(intr) + i;
nir_io_xfb xfb = index < 2 ? nir_intrinsic_io_xfb(intr) :
nir_intrinsic_io_xfb2(intr);
nir_io_xfb xfb = index < 2 ? nir_intrinsic_io_xfb(intr) : nir_intrinsic_io_xfb2(intr);
if (xfb.out[index % 2].num_components) {
nir_io_semantics sem = nir_intrinsic_io_semantics(intr);
@ -388,10 +386,11 @@ nir_gather_xfb_info_from_intrinsics(nir_shader *nir)
j < count &&
cur->buffer == outputs[j].buffer &&
cur->location == outputs[j].location &&
cur->high_16bits == outputs[j].high_16bits; j++) {
cur->high_16bits == outputs[j].high_16bits;
j++) {
if (outputs[j].component_mask &&
outputs[j].offset - outputs[j].component_offset * 4 ==
cur->offset - cur->component_offset * 4) {
cur->offset - cur->component_offset * 4) {
unsigned merged_offset = MIN2(cur->component_offset,
outputs[j].component_offset);
/* component_mask is relative to 0, not component_offset */

15
src/compiler/nir/nir_group_loads.c
View file

@ -164,8 +164,7 @@ get_uniform_inst_resource(nir_instr *instr)
return NULL;
}
struct check_sources_state
{
struct check_sources_state {
nir_block *block;
uint32_t first_index;
};
@ -273,7 +272,7 @@ set_instr_indices(nir_block *block)
* instructions.
*/
if (last && is_pseudo_inst(last) && is_grouped_load(instr))
counter++;
counter++;
/* Set each instruction's index within the block. */
instr->index = counter;
@ -307,7 +306,6 @@ is_barrier(nir_instr *instr)
nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
const char *name = nir_intrinsic_infos[intr->intrinsic].name;
if (intr->intrinsic == nir_intrinsic_discard ||
intr->intrinsic == nir_intrinsic_discard_if ||
intr->intrinsic == nir_intrinsic_terminate ||
@ -320,8 +318,7 @@ is_barrier(nir_instr *instr)
return false;
}
struct indirection_state
{
struct indirection_state {
nir_block *block;
unsigned indirections;
};
@ -376,7 +373,7 @@ process_block(nir_block *block, nir_load_grouping grouping,
unsigned max_distance)
{
int max_indirection = -1;
unsigned num_inst_per_level[256] = {0};
unsigned num_inst_per_level[256] = { 0 };
/* UINT32_MAX means the instruction has not been visited. Once
* an instruction has been visited and its indirection level has been
@ -481,7 +478,7 @@ nir_group_loads(nir_shader *shader, nir_load_grouping grouping,
}
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance |
nir_metadata_loop_analysis);
nir_metadata_dominance |
nir_metadata_loop_analysis);
}
}

8
src/compiler/nir/nir_gs_count_vertices.c
View file

@ -60,16 +60,16 @@ nir_gs_count_vertices_and_primitives(const nir_shader *shader,
{
assert(num_streams);
int vtxcnt_arr[4] = {-1, -1, -1, -1};
int prmcnt_arr[4] = {-1, -1, -1, -1};
bool cnt_found[4] = {false, false, false, false};
int vtxcnt_arr[4] = { -1, -1, -1, -1 };
int prmcnt_arr[4] = { -1, -1, -1, -1 };
bool cnt_found[4] = { false, false, false, false };
nir_foreach_function_impl(impl, shader) {
/* set_vertex_and_primitive_count intrinsics only appear in predecessors of the
* end block. So we don't need to walk all of them.
*/
set_foreach(impl->end_block->predecessors, entry) {
nir_block *block = (nir_block *) entry->key;
nir_block *block = (nir_block *)entry->key;
nir_foreach_instr_reverse(instr, block) {
nir_intrinsic_instr *intrin = as_set_vertex_and_primitive_count(instr);

12
src/compiler/nir/nir_inline_functions.c
View file

@ -26,16 +26,18 @@
#include "nir_control_flow.h"
#include "nir_vla.h"
static bool function_ends_in_jump(nir_function_impl *impl)
static bool
function_ends_in_jump(nir_function_impl *impl)
{
nir_block *last_block = nir_impl_last_block(impl);
return nir_block_ends_in_jump(last_block);
}
void nir_inline_function_impl(struct nir_builder *b,
const nir_function_impl *impl,
nir_ssa_def **params,
struct hash_table *shader_var_remap)
void
nir_inline_function_impl(struct nir_builder *b,
const nir_function_impl *impl,
nir_ssa_def **params,
struct hash_table *shader_var_remap)
{
nir_function_impl *copy = nir_function_impl_clone(b->shader, impl);

8
src/compiler/nir/nir_inline_uniforms.c
View file

@ -110,7 +110,7 @@ nir_collect_src_uniforms(const nir_src *src, int component,
if (!nir_collect_src_uniforms(&alu_src->src, alu_src->swizzle[j],
uni_offsets, num_offsets,
max_num_bo, max_offset))
return false;
return false;
}
}
}
@ -228,7 +228,7 @@ nir_add_inlinable_uniforms(const nir_src *cond, nir_loop_info *info,
/* Allow induction variable which means a loop terminator. */
if (info) {
nir_ssa_scalar cond_scalar = {cond->ssa, 0};
nir_ssa_scalar cond_scalar = { cond->ssa, 0 };
/* Limit terminator condition to loop unroll support case which is a simple
* comparison (ie. "i < count" is supported, but "i + 1 < count" is not).
@ -419,7 +419,7 @@ nir_inline_uniforms(nir_shader *shader, unsigned num_uniforms,
* found component load with constant load.
*/
uint32_t max_offset = offset + num_components;
nir_ssa_def *components[NIR_MAX_VEC_COMPONENTS] = {0};
nir_ssa_def *components[NIR_MAX_VEC_COMPONENTS] = { 0 };
bool found = false;
b.cursor = nir_before_instr(&intr->instr);
@ -461,7 +461,7 @@ nir_inline_uniforms(nir_shader *shader, unsigned num_uniforms,
}
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
}
}
}

27
src/compiler/nir/nir_instr_set.c
View file

@ -22,8 +22,8 @@
*/
#include "nir_instr_set.h"
#include "nir_vla.h"
#include "util/half_float.h"
#include "nir_vla.h"
/* This function determines if uses of an instruction can safely be rewritten
* to use another identical instruction instead. Note that this function must
@ -55,7 +55,6 @@ instr_can_rewrite(const nir_instr *instr)
return false;
}
#define HASH(hash, data) XXH32(&(data), sizeof(data), hash)
static uint32_t
@ -312,7 +311,8 @@ get_neg_instr(nir_src s)
nir_alu_instr *alu = nir_src_as_alu_instr(s);
return alu != NULL && (alu->op == nir_op_fneg || alu->op == nir_op_ineg)
? alu : NULL;
? alu
: NULL;
}
bool
@ -428,7 +428,7 @@ nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
return true;
}
uint8_t alu1_swizzle[NIR_MAX_VEC_COMPONENTS] = {0};
uint8_t alu1_swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
nir_src alu1_actual_src;
nir_alu_instr *neg1 = get_neg_instr(alu1->src[src1].src);
@ -445,7 +445,7 @@ nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
alu1_swizzle[i] = i;
}
uint8_t alu2_swizzle[NIR_MAX_VEC_COMPONENTS] = {0};
uint8_t alu2_swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
nir_src alu2_actual_src;
nir_alu_instr *neg2 = get_neg_instr(alu2->src[src2].src);
@ -609,9 +609,9 @@ nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2)
tex1->is_shadow != tex2->is_shadow ||
tex1->is_new_style_shadow != tex2->is_new_style_shadow ||
tex1->component != tex2->component ||
tex1->texture_index != tex2->texture_index ||
tex1->sampler_index != tex2->sampler_index ||
tex1->backend_flags != tex2->backend_flags) {
tex1->texture_index != tex2->texture_index ||
tex1->sampler_index != tex2->sampler_index ||
tex1->backend_flags != tex2->backend_flags) {
return false;
}
@ -682,11 +682,11 @@ nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2)
return false;
if (info->has_dest && intrinsic1->dest.ssa.num_components !=
intrinsic2->dest.ssa.num_components)
intrinsic2->dest.ssa.num_components)
return false;
if (info->has_dest && intrinsic1->dest.ssa.bit_size !=
intrinsic2->dest.ssa.bit_size)
intrinsic2->dest.ssa.bit_size)
return false;
for (unsigned i = 0; i < info->num_srcs; i++) {
@ -753,14 +753,14 @@ nir_instr_set_destroy(struct set *instr_set)
bool
nir_instr_set_add_or_rewrite(struct set *instr_set, nir_instr *instr,
bool (*cond_function) (const nir_instr *a,
const nir_instr *b))
bool (*cond_function)(const nir_instr *a,
const nir_instr *b))
{
if (!instr_can_rewrite(instr))
return false;
struct set_entry *e = _mesa_set_search_or_add(instr_set, instr, NULL);
nir_instr *match = (nir_instr *) e->key;
nir_instr *match = (nir_instr *)e->key;
if (match == instr)
return false;
@ -799,4 +799,3 @@ nir_instr_set_remove(struct set *instr_set, nir_instr *instr)
if (entry)
_mesa_set_remove(instr_set, entry);
}

23
src/compiler/nir/nir_legacy.c
View file

@ -4,9 +4,9 @@
* SPDX-License-Identifier: MIT
*/
#include "nir_legacy.h"
#include "nir.h"
#include "nir_builder.h"
#include "nir_legacy.h"
bool
nir_legacy_float_mod_folds(nir_alu_instr *mod)
@ -47,18 +47,17 @@ chase_alu_src_helper(const nir_src *src)
if (load) {
bool indirect = (load->intrinsic == nir_intrinsic_load_reg_indirect);
return (nir_legacy_alu_src) {
return (nir_legacy_alu_src){
.src.is_ssa = false,
.src.reg = {
.handle = load->src[0].ssa,
.base_offset = nir_intrinsic_base(load),
.indirect = indirect ? load->src[1].ssa : NULL
},
.indirect = indirect ? load->src[1].ssa : NULL },
.fabs = nir_intrinsic_legacy_fabs(load),
.fneg = nir_intrinsic_legacy_fneg(load),
};
} else {
return (nir_legacy_alu_src) {
return (nir_legacy_alu_src){
.src.is_ssa = true,
.src.ssa = src->ssa,
};
@ -130,18 +129,17 @@ chase_alu_dest_helper(nir_dest *dest)
if (store) {
bool indirect = (store->intrinsic == nir_intrinsic_store_reg_indirect);
return (nir_legacy_alu_dest) {
return (nir_legacy_alu_dest){
.dest.is_ssa = false,
.dest.reg = {
.handle = store->src[1].ssa,
.base_offset = nir_intrinsic_base(store),
.indirect = indirect ? store->src[2].ssa : NULL
},
.indirect = indirect ? store->src[2].ssa : NULL },
.fsat = nir_intrinsic_legacy_fsat(store),
.write_mask = nir_intrinsic_write_mask(store),
};
} else {
return (nir_legacy_alu_dest) {
return (nir_legacy_alu_dest){
.dest.is_ssa = true,
.dest.ssa = &dest->ssa,
.write_mask = nir_component_mask(dest->ssa.num_components),
@ -226,7 +224,7 @@ nir_legacy_chase_alu_dest(nir_dest *dest)
/* Try SSA fsat. No users support 64-bit modifiers. */
if (chase_fsat(&def)) {
return (nir_legacy_alu_dest) {
return (nir_legacy_alu_dest){
.dest.is_ssa = true,
.dest.ssa = def,
.fsat = true,
@ -333,8 +331,9 @@ nir_legacy_trivialize(nir_shader *s, bool fuse_fabs)
* chase registers recursively, allowing registers to be trivialized easier.
*/
if (nir_shader_instructions_pass(s, fuse_mods_with_registers,
nir_metadata_block_index |
nir_metadata_dominance, &fuse_fabs)) {
nir_metadata_block_index |
nir_metadata_dominance,
&fuse_fabs)) {
/* If we made progress, we likely left dead loads. Clean them up. */
NIR_PASS_V(s, nir_opt_dce);
}

85
src/compiler/nir/nir_linking_helpers.c
View file

@ -21,10 +21,10 @@
* IN THE SOFTWARE.
*/
#include "util/hash_table.h"
#include "util/set.h"
#include "nir.h"
#include "nir_builder.h"
#include "util/set.h"
#include "util/hash_table.h"
/* This file contains various little helpers for doing simple linking in
* NIR. Eventually, we'll probably want a full-blown varying packing
@ -41,8 +41,7 @@ get_variable_io_mask(nir_variable *var, gl_shader_stage stage)
if (var->data.location < 0)
return 0;
unsigned location = var->data.patch ?
var->data.location - VARYING_SLOT_PATCH0 : var->data.location;
unsigned location = var->data.patch ? var->data.location - VARYING_SLOT_PATCH0 : var->data.location;
assert(var->data.mode == nir_var_shader_in ||
var->data.mode == nir_var_shader_out);
@ -159,7 +158,7 @@ nir_remove_unused_io_vars(nir_shader *shader,
if (!(other_stage & get_variable_io_mask(var, shader->info.stage))) {
/* This one is invalid, make it a global variable instead */
if (shader->info.stage == MESA_SHADER_MESH &&
(shader->info.outputs_read & BITFIELD64_BIT(var->data.location)))
(shader->info.outputs_read & BITFIELD64_BIT(var->data.location)))
var->data.mode = nir_var_mem_shared;
else
var->data.mode = nir_var_shader_temp;
@ -172,7 +171,7 @@ nir_remove_unused_io_vars(nir_shader *shader,
nir_function_impl *impl = nir_shader_get_entrypoint(shader);
if (progress) {
nir_metadata_preserve(impl, nir_metadata_dominance |
nir_metadata_block_index);
nir_metadata_block_index);
nir_fixup_deref_modes(shader);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
@ -232,7 +231,8 @@ nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer)
patches_read);
progress = nir_remove_unused_io_vars(consumer, nir_var_shader_in, written,
patches_written) || progress;
patches_written) ||
progress;
return progress;
}
@ -253,9 +253,9 @@ get_interp_type(nir_variable *var, const struct glsl_type *type,
return INTERP_MODE_NONE;
}
#define INTERPOLATE_LOC_SAMPLE 0
#define INTERPOLATE_LOC_SAMPLE 0
#define INTERPOLATE_LOC_CENTROID 1
#define INTERPOLATE_LOC_CENTER 2
#define INTERPOLATE_LOC_CENTER 2
static uint8_t
get_interp_loc(nir_variable *var)
@ -280,8 +280,7 @@ is_packing_supported_for_type(const struct glsl_type *type)
return glsl_type_is_scalar(type) && glsl_type_is_32bit(type);
}
struct assigned_comps
{
struct assigned_comps {
uint8_t comps;
uint8_t interp_type;
uint8_t interp_loc;
@ -324,8 +323,7 @@ get_unmoveable_components_masks(nir_shader *shader,
unsigned location = var->data.location - VARYING_SLOT_VAR0;
unsigned elements =
glsl_type_is_vector_or_scalar(glsl_without_array(type)) ?
glsl_get_vector_elements(glsl_without_array(type)) : 4;
glsl_type_is_vector_or_scalar(glsl_without_array(type)) ? glsl_get_vector_elements(glsl_without_array(type)) : 4;
bool dual_slot = glsl_type_is_dual_slot(glsl_without_array(type));
unsigned slots = glsl_count_attribute_slots(type, false);
@ -366,8 +364,7 @@ get_unmoveable_components_masks(nir_shader *shader,
}
}
struct varying_loc
{
struct varying_loc {
uint8_t component;
uint32_t location;
};
@ -379,7 +376,7 @@ mark_all_used_slots(nir_variable *var, uint64_t *slots_used,
unsigned loc_offset = var->data.patch ? VARYING_SLOT_PATCH0 : 0;
slots_used[var->data.patch ? 1 : 0] |= slots_used_mask &
BITFIELD64_RANGE(var->data.location - loc_offset, num_slots);
BITFIELD64_RANGE(var->data.location - loc_offset, num_slots);
}
static void
@ -396,10 +393,10 @@ remap_slots_and_components(nir_shader *shader, nir_variable_mode mode,
struct varying_loc (*remap)[4],
uint64_t *slots_used, uint64_t *out_slots_read,
uint32_t *p_slots_used, uint32_t *p_out_slots_read)
{
{
const gl_shader_stage stage = shader->info.stage;
uint64_t out_slots_read_tmp[2] = {0};
uint64_t slots_used_tmp[2] = {0};
uint64_t out_slots_read_tmp[2] = { 0 };
uint64_t slots_used_tmp[2] = { 0 };
/* We don't touch builtins so just copy the bitmask */
slots_used_tmp[0] = *slots_used & BITFIELD64_RANGE(0, VARYING_SLOT_VAR0);
@ -488,8 +485,8 @@ struct varying_component {
static int
cmp_varying_component(const void *comp1_v, const void *comp2_v)
{
struct varying_component *comp1 = (struct varying_component *) comp1_v;
struct varying_component *comp2 = (struct varying_component *) comp2_v;
struct varying_component *comp1 = (struct varying_component *)comp1_v;
struct varying_component *comp2 = (struct varying_component *)comp2_v;
/* We want patches to be order at the end of the array */
if (comp1->is_patch != comp2->is_patch)
@ -535,7 +532,7 @@ gather_varying_component_info(nir_shader *producer, nir_shader *consumer,
unsigned *varying_comp_info_size,
bool default_to_smooth_interp)
{
unsigned store_varying_info_idx[MAX_VARYINGS_INCL_PATCH][4] = {{0}};
unsigned store_varying_info_idx[MAX_VARYINGS_INCL_PATCH][4] = { { 0 } };
unsigned num_of_comps_to_pack = 0;
/* Count the number of varying that can be packed and create a mapping
@ -611,7 +608,7 @@ gather_varying_component_info(nir_shader *producer, nir_shader *consumer,
continue;
struct varying_component *vc_info =
&(*varying_comp_info)[var_info_idx-1];
&(*varying_comp_info)[var_info_idx - 1];
if (!vc_info->initialised) {
const struct glsl_type *type = in_var->type;
@ -629,8 +626,8 @@ gather_varying_component_info(nir_shader *producer, nir_shader *consumer,
vc_info->is_patch = in_var->data.patch;
vc_info->is_per_primitive = in_var->data.per_primitive;
vc_info->is_mediump = !producer->options->linker_ignore_precision &&
(in_var->data.precision == GLSL_PRECISION_MEDIUM ||
in_var->data.precision == GLSL_PRECISION_LOW);
(in_var->data.precision == GLSL_PRECISION_MEDIUM ||
in_var->data.precision == GLSL_PRECISION_LOW);
vc_info->is_intra_stage_only = false;
vc_info->initialised = true;
}
@ -678,7 +675,7 @@ gather_varying_component_info(nir_shader *producer, nir_shader *consumer,
}
struct varying_component *vc_info =
&(*varying_comp_info)[var_info_idx-1];
&(*varying_comp_info)[var_info_idx - 1];
if (!vc_info->initialised) {
const struct glsl_type *type = out_var->type;
@ -695,8 +692,8 @@ gather_varying_component_info(nir_shader *producer, nir_shader *consumer,
vc_info->is_patch = out_var->data.patch;
vc_info->is_per_primitive = out_var->data.per_primitive;
vc_info->is_mediump = !producer->options->linker_ignore_precision &&
(out_var->data.precision == GLSL_PRECISION_MEDIUM ||
out_var->data.precision == GLSL_PRECISION_LOW);
(out_var->data.precision == GLSL_PRECISION_MEDIUM ||
out_var->data.precision == GLSL_PRECISION_LOW);
vc_info->is_intra_stage_only = true;
vc_info->initialised = true;
}
@ -704,7 +701,7 @@ gather_varying_component_info(nir_shader *producer, nir_shader *consumer,
}
}
for (unsigned i = 0; i < *varying_comp_info_size; i++ ) {
for (unsigned i = 0; i < *varying_comp_info_size; i++) {
struct varying_component *vc_info = &(*varying_comp_info)[i];
if (!vc_info->initialised) {
/* Something went wrong, the shader interfaces didn't match, so
@ -765,12 +762,12 @@ allow_pack_interp_loc(nir_pack_varying_options options, int loc)
}
static void
assign_remap_locations(struct varying_loc (*remap)[4],
struct assigned_comps *assigned_comps,
struct varying_component *info,
unsigned *cursor, unsigned *comp,
unsigned max_location,
nir_pack_varying_options options)
assign_remap_locations(struct varying_loc (*remap)[4],
struct assigned_comps *assigned_comps,
struct varying_component *info,
unsigned *cursor, unsigned *comp,
unsigned max_location,
nir_pack_varying_options options)
{
unsigned tmp_cursor = *cursor;
unsigned tmp_comp = *comp;
@ -860,7 +857,7 @@ compact_components(nir_shader *producer, nir_shader *consumer,
struct assigned_comps *assigned_comps,
bool default_to_smooth_interp)
{
struct varying_loc remap[MAX_VARYINGS_INCL_PATCH][4] = {{{0}, {0}}};
struct varying_loc remap[MAX_VARYINGS_INCL_PATCH][4] = { { { 0 }, { 0 } } };
struct varying_component *varying_comp_info;
unsigned varying_comp_info_size;
@ -879,7 +876,7 @@ compact_components(nir_shader *producer, nir_shader *consumer,
unsigned comp = 0;
/* Set the remap array based on the sorted components */
for (unsigned i = 0; i < varying_comp_info_size; i++ ) {
for (unsigned i = 0; i < varying_comp_info_size; i++) {
struct varying_component *info = &varying_comp_info[i];
assert(info->is_patch || cursor < MAX_VARYING);
@ -949,7 +946,7 @@ nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
assert(producer->info.stage != MESA_SHADER_FRAGMENT);
assert(consumer->info.stage != MESA_SHADER_VERTEX);
struct assigned_comps assigned_comps[MAX_VARYINGS_INCL_PATCH] = {{0}};
struct assigned_comps assigned_comps[MAX_VARYINGS_INCL_PATCH] = { { 0 } };
get_unmoveable_components_masks(producer, nir_var_shader_out,
assigned_comps,
@ -1091,7 +1088,7 @@ replace_varying_input_by_constant_load(nir_shader *shader,
static bool
replace_duplicate_input(nir_shader *shader, nir_variable *input_var,
nir_intrinsic_instr *dup_store_intr)
nir_intrinsic_instr *dup_store_intr)
{
assert(input_var);
@ -1195,7 +1192,7 @@ static nir_deref_instr *
clone_deref_instr(nir_builder *b, nir_variable *var, nir_deref_instr *deref)
{
if (deref->deref_type == nir_deref_type_var)
return nir_build_deref_var(b, var);
return nir_build_deref_var(b, var);
nir_deref_instr *parent_deref = nir_deref_instr_parent(deref);
nir_deref_instr *parent = clone_deref_instr(b, var, parent_deref);
@ -1267,7 +1264,7 @@ replace_varying_input_by_uniform_load(nir_shader *shader,
/* Add a vector to scalar move if uniform is a vector. */
if (uni_def->num_components > 1) {
nir_alu_src src = {0};
nir_alu_src src = { 0 };
src.src = nir_src_for_ssa(uni_def);
src.swizzle[0] = scalar->comp;
uni_def = nir_mov_alu(&b, src, 1);
@ -1344,7 +1341,7 @@ nir_link_varying_precision(nir_shader *producer, nir_shader *consumer)
continue;
nir_variable *consumer_var = find_consumer_variable(consumer,
producer_var);
producer_var);
/* Skip if the variable will be eliminated */
if (!consumer_var)
@ -1424,7 +1421,7 @@ nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer)
struct hash_entry *entry = _mesa_hash_table_search(varying_values, ssa);
if (entry) {
progress |= replace_duplicate_input(consumer,
(nir_variable *) entry->data,
(nir_variable *)entry->data,
intr);
} else {
nir_variable *in_var = get_matching_input_var(consumer, out_var);
@ -1482,7 +1479,7 @@ nir_assign_io_var_locations(nir_shader *shader, nir_variable_mode mode,
{
unsigned location = 0;
unsigned assigned_locations[VARYING_SLOT_TESS_MAX];
uint64_t processed_locs[2] = {0};
uint64_t processed_locs[2] = { 0 };
struct exec_list io_vars;
sort_varyings(shader, mode, &io_vars);

7
src/compiler/nir/nir_liveness.c
View file

@ -22,8 +22,8 @@
*/
#include "nir.h"
#include "nir_worklist.h"
#include "nir_vla.h"
#include "nir_worklist.h"
/*
* Basic liveness analysis. This works only in SSA form.
@ -72,7 +72,7 @@ set_src_live(nir_src *src, void *void_live)
BITSET_WORD *live = void_live;
if (nir_src_is_undef(*src))
return true; /* undefined variables are never live */
return true; /* undefined variables are never live */
BITSET_SET(live, src->ssa->index);
@ -137,7 +137,7 @@ nir_live_ssa_defs_impl(nir_function_impl *impl)
/* Number the instructions so we can do cheap interference tests using the
* instruction index.
*/
nir_metadata_require(impl, nir_metadata_instr_index);
nir_metadata_require(impl, nir_metadata_instr_index);
nir_block_worklist_init(&state.worklist, impl->num_blocks, NULL);
@ -148,7 +148,6 @@ nir_live_ssa_defs_impl(nir_function_impl *impl)
init_liveness_block(block, &state);
}
/* We're now ready to work through the worklist and update the liveness
* sets of each of the blocks. By the time we get to this point, every
* block in the function implementation has been pushed onto the

36
src/compiler/nir/nir_loop_analyze.c
View file

@ -21,10 +21,10 @@
* IN THE SOFTWARE.
*/
#include "nir.h"
#include "nir_constant_expressions.h"
#include "nir_loop_analyze.h"
#include "util/bitset.h"
#include "nir.h"
#include "nir_constant_expressions.h"
typedef enum {
undefined,
@ -158,7 +158,7 @@ instr_cost(loop_info_state *state, nir_instr *instr,
unsigned cost = 1;
if (nir_op_is_selection(alu->op)) {
nir_ssa_scalar cond_scalar = {alu->src[0].src.ssa, 0};
nir_ssa_scalar cond_scalar = { alu->src[0].src.ssa, 0 };
if (nir_is_terminator_condition_with_two_inputs(cond_scalar)) {
nir_instr *sel_cond = alu->src[0].src.ssa->parent_instr;
nir_alu_instr *sel_alu = nir_instr_as_alu(sel_cond);
@ -174,7 +174,7 @@ instr_cost(loop_info_state *state, nir_instr *instr,
if ((nir_src_is_const(sel_alu->src[0].src) &&
get_loop_var(rhs.def, state)->type == basic_induction) ||
(nir_src_is_const(sel_alu->src[1].src) &&
get_loop_var(lhs.def, state)->type == basic_induction) ) {
get_loop_var(lhs.def, state)->type == basic_induction)) {
/* Also if the selects condition is only used by the select then
* remove that alu instructons cost from the cost total also.
*/
@ -204,7 +204,7 @@ instr_cost(loop_info_state *state, nir_instr *instr,
return cost;
bool is_fp64 = nir_dest_bit_size(alu->dest.dest) == 64 &&
nir_alu_type_get_base_type(info->output_type) == nir_type_float;
nir_alu_type_get_base_type(info->output_type) == nir_type_float;
for (unsigned i = 0; i < info->num_inputs; i++) {
if (nir_src_bit_size(alu->src[i].src) == 64 &&
nir_alu_type_get_base_type(info->input_types[i]) == nir_type_float)
@ -245,9 +245,9 @@ static bool
init_loop_block(nir_block *block, loop_info_state *state,
bool in_if_branch, bool in_nested_loop)
{
init_loop_state init_state = {.in_if_branch = in_if_branch,
.in_nested_loop = in_nested_loop,
.state = state };
init_loop_state init_state = { .in_if_branch = in_if_branch,
.in_nested_loop = in_nested_loop,
.state = state };
nir_foreach_instr(instr, block) {
nir_foreach_ssa_def(instr, init_loop_def, &init_state);
@ -374,7 +374,7 @@ is_only_uniform_src(nir_src *src)
nir_alu_instr *alu = nir_instr_as_alu(instr);
for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) {
if (!is_only_uniform_src(&alu->src[i].src))
return false;
return false;
}
return true;
}
@ -460,7 +460,7 @@ compute_induction_information(loop_info_state *state)
/* Is one of the operands const or uniform, and the other the phi.
* The phi source can't be swizzled in any way.
*/
if (alu->src[1-i].src.ssa == &phi->dest.ssa &&
if (alu->src[1 - i].src.ssa == &phi->dest.ssa &&
alu_src_has_identity_swizzle(alu, 1 - i)) {
if (is_only_uniform_src(&alu->src[i].src))
var->update_src = alu->src + i;
@ -508,9 +508,9 @@ compute_induction_information(loop_info_state *state)
if (var->type == basic_induction) {
nir_loop_induction_variable *ivar =
&info->induction_vars[info->num_induction_vars++];
ivar->def = var->def;
ivar->init_src = var->init_src;
ivar->update_src = var->update_src;
ivar->def = var->def;
ivar->init_src = var->init_src;
ivar->update_src = var->update_src;
}
}
/* don't overflow */
@ -1379,9 +1379,9 @@ force_unroll_array_access(loop_info_state *state, nir_deref_instr *deref,
if (array_size) {
if ((array_size == state->loop->info->max_trip_count) &&
nir_deref_mode_must_be(deref, nir_var_shader_in |
nir_var_shader_out |
nir_var_shader_temp |
nir_var_function_temp))
nir_var_shader_out |
nir_var_shader_temp |
nir_var_function_temp))
return true;
if (nir_deref_mode_must_be(deref, state->indirect_mask))
@ -1404,7 +1404,6 @@ force_unroll_heuristics(loop_info_state *state, nir_block *block)
nir_tex_instr_src_index(tex_instr,
nir_tex_src_sampler_deref);
if (sampler_idx >= 0) {
nir_deref_instr *deref =
nir_instr_as_deref(tex_instr->src[sampler_idx].src.ssa->parent_instr);
@ -1413,7 +1412,6 @@ force_unroll_heuristics(loop_info_state *state, nir_block *block)
}
}
if (instr->type != nir_instr_type_intrinsic)
continue;
@ -1526,7 +1524,7 @@ initialize_loop_info_state(nir_loop *loop, void *mem_ctx,
list_inithead(&state->process_list);
if (loop->info)
ralloc_free(loop->info);
ralloc_free(loop->info);
loop->info = rzalloc(loop, nir_loop_info);

2
src/compiler/nir/nir_lower_alpha_test.c
View file

@ -107,6 +107,6 @@ nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
}
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
}
}

2
src/compiler/nir/nir_lower_alu.c
View file

@ -230,6 +230,6 @@ nir_lower_alu(nir_shader *shader)
return nir_shader_instructions_pass(shader, lower_alu_instr,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
NULL);
}

56
src/compiler/nir/nir_lower_alu_width.c
View file

@ -199,12 +199,12 @@ lower_alu_instr_width(nir_builder *b, nir_instr *instr, void *_data)
}
#define LOWER_REDUCTION(name, chan, merge) \
case name##2: \
case name##3: \
case name##4: \
case name##8: \
case name##16: \
return lower_reduction(alu, chan, merge, b, true); \
case name##2: \
case name##3: \
case name##4: \
case name##8: \
case name##16: \
return lower_reduction(alu, chan, merge, b, true);
switch (alu->op) {
case nir_op_vec16:
@ -225,7 +225,7 @@ lower_alu_instr_width(nir_builder *b, nir_instr *instr, void *_data)
nir_ssa_def *src_vec2 = nir_ssa_for_alu_src(b, alu, 0);
return nir_pack_half_2x16_split(b, nir_channel(b, src_vec2, 0),
nir_channel(b, src_vec2, 1));
nir_channel(b, src_vec2, 1));
}
case nir_op_unpack_unorm_4x8:
@ -244,15 +244,15 @@ lower_alu_instr_width(nir_builder *b, nir_instr *instr, void *_data)
nir_ssa_def *packed = nir_ssa_for_alu_src(b, alu, 0);
if (alu->op == nir_op_unpack_half_2x16_flush_to_zero) {
return nir_vec2(b,
nir_unpack_half_2x16_split_x_flush_to_zero(b,
packed),
nir_unpack_half_2x16_split_y_flush_to_zero(b,
packed));
return nir_vec2(b,
nir_unpack_half_2x16_split_x_flush_to_zero(b,
packed),
nir_unpack_half_2x16_split_y_flush_to_zero(b,
packed));
} else {
return nir_vec2(b,
nir_unpack_half_2x16_split_x(b, packed),
nir_unpack_half_2x16_split_y(b, packed));
return nir_vec2(b,
nir_unpack_half_2x16_split_x(b, packed),
nir_unpack_half_2x16_split_y(b, packed));
}
}
@ -261,10 +261,9 @@ lower_alu_instr_width(nir_builder *b, nir_instr *instr, void *_data)
b->shader->options->lower_pack_unorm_2x16);
nir_ssa_def *word = nir_extract_u16(b, nir_ssa_for_alu_src(b, alu, 0),
nir_imm_int(b, 0));
return nir_ior(b, nir_ishl(b, nir_channel(b, word, 1),
nir_imm_int(b, 16)),
nir_channel(b, word, 0));
nir_imm_int(b, 0));
return nir_ior(b, nir_ishl(b, nir_channel(b, word, 1), nir_imm_int(b, 16)),
nir_channel(b, word, 0));
}
case nir_op_pack_uvec4_to_uint: {
@ -272,14 +271,10 @@ lower_alu_instr_width(nir_builder *b, nir_instr *instr, void *_data)
b->shader->options->lower_pack_unorm_4x8);
nir_ssa_def *byte = nir_extract_u8(b, nir_ssa_for_alu_src(b, alu, 0),
nir_imm_int(b, 0));
return nir_ior(b, nir_ior(b, nir_ishl(b, nir_channel(b, byte, 3),
nir_imm_int(b, 24)),
nir_ishl(b, nir_channel(b, byte, 2),
nir_imm_int(b, 16))),
nir_ior(b, nir_ishl(b, nir_channel(b, byte, 1),
nir_imm_int(b, 8)),
nir_channel(b, byte, 0)));
nir_imm_int(b, 0));
return nir_ior(b, nir_ior(b, nir_ishl(b, nir_channel(b, byte, 3), nir_imm_int(b, 24)), nir_ishl(b, nir_channel(b, byte, 2), nir_imm_int(b, 16))),
nir_ior(b, nir_ishl(b, nir_channel(b, byte, 1), nir_imm_int(b, 8)),
nir_channel(b, byte, 0)));
}
case nir_op_fdph: {
@ -293,7 +288,7 @@ lower_alu_instr_width(nir_builder *b, nir_instr *instr, void *_data)
for (unsigned i = 0; i < 3; i++) {
int dest = reverse_order ? 3 - i : i;
sum[dest] = nir_fmul(b, nir_channel(b, src0_vec, i),
nir_channel(b, src1_vec, i));
nir_channel(b, src1_vec, i));
}
sum[reverse_order ? 0 : 3] = nir_channel(b, src1_vec, 3);
@ -325,9 +320,9 @@ lower_alu_instr_width(nir_builder *b, nir_instr *instr, void *_data)
nir_ssa_def *src_vec4 = nir_ssa_for_alu_src(b, alu, 0);
nir_ssa_def *xy = nir_pack_32_2x16_split(b, nir_channel(b, src_vec4, 0),
nir_channel(b, src_vec4, 1));
nir_channel(b, src_vec4, 1));
nir_ssa_def *zw = nir_pack_32_2x16_split(b, nir_channel(b, src_vec4, 2),
nir_channel(b, src_vec4, 3));
nir_channel(b, src_vec4, 3));
return nir_pack_64_2x32_split(b, xy, zw);
}
@ -459,4 +454,3 @@ nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *
return nir_lower_alu_width(shader, cb ? scalar_cb : NULL, &data);
}

11
src/compiler/nir/nir_lower_amul.c
View file

@ -123,19 +123,19 @@ lower_intrinsic(lower_state *state, nir_intrinsic_instr *intr)
{
switch (intr->intrinsic) {
case nir_intrinsic_load_ubo:
//# src[] = { buffer_index, offset }.
// # src[] = { buffer_index, offset }.
if (large_ubo(state, intr->src[0]))
lower_large_src(&intr->src[1], state);
return;
case nir_intrinsic_load_ssbo:
//# src[] = { buffer_index, offset }.
// # src[] = { buffer_index, offset }.
if (large_ssbo(state, intr->src[0]))
lower_large_src(&intr->src[1], state);
return;
case nir_intrinsic_store_ssbo:
//# src[] = { value, block_index, offset }
// # src[] = { value, block_index, offset }
if (large_ssbo(state, intr->src[1]))
lower_large_src(&intr->src[2], state);
return;
@ -215,7 +215,7 @@ nir_lower_amul(nir_shader *shader,
/* Figure out which UBOs or SSBOs are large enough to be
* disqualified from imul24:
*/
nir_foreach_variable_in_shader (var, shader) {
nir_foreach_variable_in_shader(var, shader) {
if (var->data.mode == nir_var_mem_ubo) {
if (is_large(&state, var)) {
state.has_large_ubo = true;
@ -270,8 +270,7 @@ nir_lower_amul(nir_shader *shader,
}
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
}
return state.progress;

2
src/compiler/nir/nir_lower_array_deref_of_vec.c
View file

@ -163,7 +163,7 @@ nir_lower_array_deref_of_vec_impl(nir_function_impl *impl,
if (progress) {
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}

17
src/compiler/nir/nir_lower_atomics_to_ssbo.c
View file

@ -35,7 +35,7 @@
static nir_deref_instr *
deref_offset_var(nir_builder *b, unsigned binding, unsigned offset_align_state)
{
gl_state_index16 tokens[STATE_LENGTH] = {offset_align_state, binding};
gl_state_index16 tokens[STATE_LENGTH] = { offset_align_state, binding };
nir_variable *var = nir_find_state_variable(b->shader, tokens);
if (!var) {
var = nir_state_variable_create(b->shader, glsl_uint_type(), "offset", tokens);
@ -100,7 +100,7 @@ lower_instr(nir_intrinsic_instr *instr, unsigned ssbo_offset, nir_builder *b, un
offset_load = nir_load_deref(b, deref_offset);
}
nir_intrinsic_instr *new_instr =
nir_intrinsic_instr_create(b->shader, op);
nir_intrinsic_instr_create(b->shader, op);
if (nir_intrinsic_has_atomic_op(new_instr))
nir_intrinsic_set_atomic_op(new_instr, atomic_op);
@ -197,7 +197,7 @@ nir_lower_atomics_to_ssbo(nir_shader *shader, unsigned offset_align_state)
}
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
}
if (progress) {
@ -237,14 +237,14 @@ nir_lower_atomics_to_ssbo(nir_shader *shader, unsigned offset_align_state)
ssbo->data.binding + 1);
struct glsl_struct_field field = {
.type = type,
.name = "counters",
.location = -1,
.type = type,
.name = "counters",
.location = -1,
};
ssbo->interface_type =
glsl_interface_type(&field, 1, GLSL_INTERFACE_PACKING_STD430,
false, "counters");
glsl_interface_type(&field, 1, GLSL_INTERFACE_PACKING_STD430,
false, "counters");
replaced |= (1 << var->data.binding);
}
@ -255,4 +255,3 @@ nir_lower_atomics_to_ssbo(nir_shader *shader, unsigned offset_align_state)
return progress;
}

10
src/compiler/nir/nir_lower_bit_size.c
View file

@ -30,8 +30,9 @@
* the original bit-size.
*/
static nir_ssa_def *convert_to_bit_size(nir_builder *bld, nir_ssa_def *src,
nir_alu_type type, unsigned bit_size)
static nir_ssa_def *
convert_to_bit_size(nir_builder *bld, nir_ssa_def *src,
nir_alu_type type, unsigned bit_size)
{
assert(src->bit_size < bit_size);
@ -114,7 +115,6 @@ lower_alu_instr(nir_builder *bld, nir_alu_instr *alu, unsigned bit_size)
lowered_dst = nir_build_alu_src_arr(bld, op, srcs);
}
/* Convert result back to the original bit-size */
if (nir_alu_type_get_type_size(nir_op_infos[op].output_type) == 0 &&
dst_bit_size != bit_size) {
@ -278,7 +278,7 @@ lower_impl(nir_function_impl *impl,
if (progress) {
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}
@ -357,6 +357,6 @@ nir_lower_64bit_phis(nir_shader *shader)
{
return nir_shader_instructions_pass(shader, lower_64bit_phi_instr,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
NULL);
}

5
src/compiler/nir/nir_lower_bitmap.c
View file

@ -90,8 +90,7 @@ lower_bitmap(nir_shader *shader, nir_builder *b,
nir_builder_instr_insert(b, &tex->instr);
/* kill if tex != 0.0.. take .x or .w channel according to format: */
cond = nir_fneu_imm(b, nir_channel(b, &tex->dest.ssa,
options->swizzle_xxxx ? 0 : 3),
cond = nir_fneu_imm(b, nir_channel(b, &tex->dest.ssa, options->swizzle_xxxx ? 0 : 3),
0.0);
nir_discard_if(b, cond);
@ -108,7 +107,7 @@ lower_bitmap_impl(nir_function_impl *impl,
lower_bitmap(impl->function->shader, &b, options);
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
}
void

43
src/compiler/nir/nir_lower_blend.c
View file

@ -31,11 +31,11 @@
* fixed-function blending in part or in full.
*/
#include "nir_lower_blend.h"
#include "compiler/nir/nir.h"
#include "compiler/nir/nir_builder.h"
#include "compiler/nir/nir_format_convert.h"
#include "util/blend.h"
#include "nir_lower_blend.h"
struct ctx {
const nir_lower_blend_options *options;
@ -136,7 +136,7 @@ static nir_ssa_def *
nir_fsat_signed(nir_builder *b, nir_ssa_def *x)
{
return nir_fclamp(b, x, nir_imm_floatN_t(b, -1.0, x->bit_size),
nir_imm_floatN_t(b, +1.0, x->bit_size));
nir_imm_floatN_t(b, +1.0, x->bit_size));
}
static nir_ssa_def *
@ -189,7 +189,6 @@ should_clamp_factor(enum pipe_blendfactor factor, bool snorm)
default:
unreachable("invalid blend factor");
}
}
static bool
@ -246,10 +245,10 @@ nir_color_mask(
nir_ssa_def *dst)
{
return nir_vec4(b,
nir_channel(b, (mask & (1 << 0)) ? src : dst, 0),
nir_channel(b, (mask & (1 << 1)) ? src : dst, 1),
nir_channel(b, (mask & (1 << 2)) ? src : dst, 2),
nir_channel(b, (mask & (1 << 3)) ? src : dst, 3));
nir_channel(b, (mask & (1 << 0)) ? src : dst, 0),
nir_channel(b, (mask & (1 << 1)) ? src : dst, 1),
nir_channel(b, (mask & (1 << 2)) ? src : dst, 2),
nir_channel(b, (mask & (1 << 3)) ? src : dst, 3));
}
static nir_ssa_def *
@ -330,7 +329,7 @@ nir_blend_logicop(
unsigned bits[4];
for (int i = 0; i < 4; ++i)
bits[i] = format_desc->channel[i].size;
bits[i] = format_desc->channel[i].size;
if (util_format_is_unorm(format)) {
src = nir_format_float_to_unorm(b, src, bits);
@ -435,10 +434,10 @@ nir_blend(
nir_ssa_def *one = nir_imm_floatN_t(b, 1.0, dst->bit_size);
dst = nir_vec4(b,
channel_exists(desc, 0) ? nir_channel(b, dst, 0) : zero,
channel_exists(desc, 1) ? nir_channel(b, dst, 1) : zero,
channel_exists(desc, 2) ? nir_channel(b, dst, 2) : zero,
channel_exists(desc, 3) ? nir_channel(b, dst, 3) : one);
channel_exists(desc, 0) ? nir_channel(b, dst, 0) : zero,
channel_exists(desc, 1) ? nir_channel(b, dst, 1) : zero,
channel_exists(desc, 2) ? nir_channel(b, dst, 2) : zero,
channel_exists(desc, 3) ? nir_channel(b, dst, 3) : one);
/* We blend per channel and recombine later */
nir_ssa_def *channels[4];
@ -453,14 +452,14 @@ nir_blend(
if (nir_blend_factored(chan.func)) {
psrc = nir_blend_factor(
b, psrc,
src, src1, dst, bconst, c,
chan.src_factor, format);
b, psrc,
src, src1, dst, bconst, c,
chan.src_factor, format);
pdst = nir_blend_factor(
b, pdst,
src, src1, dst, bconst, c,
chan.dst_factor, format);
b, pdst,
src, src1, dst, bconst, c,
chan.dst_factor, format);
}
channels[c] = nir_blend_func(b, chan.func, psrc, pdst);
@ -595,7 +594,7 @@ nir_lower_blend_instr(nir_builder *b, nir_instr *instr, void *data)
/* Grow or shrink the store destination as needed */
store->num_components = num_components;
nir_intrinsic_set_write_mask(store, nir_intrinsic_write_mask(store) &
nir_component_mask(num_components));
nir_component_mask(num_components));
/* Write out the final color instead of the input */
nir_instr_rewrite_src_ssa(instr, &store->src[0], blended);
@ -649,14 +648,14 @@ nir_lower_blend(nir_shader *shader, const nir_lower_blend_options *options)
{
assert(shader->info.stage == MESA_SHADER_FRAGMENT);
struct ctx ctx = {.options = options};
struct ctx ctx = { .options = options };
nir_shader_instructions_pass(shader, consume_dual_stores,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
ctx.src1);
nir_shader_instructions_pass(shader, nir_lower_blend_instr,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
&ctx);
}

2
src/compiler/nir/nir_lower_blend.h
View file

@ -26,8 +26,8 @@
#define NIR_BLEND_H
#include "compiler/nir/nir.h"
#include "util/format/u_formats.h"
#include "util/blend.h"
#include "util/format/u_formats.h"
/* These structs encapsulates the blend state such that it can be lowered
* cleanly

115
src/compiler/nir/nir_lower_bool_to_bitsize.c
View file

@ -46,9 +46,12 @@ static uint32_t
get_bool_convert_opcode(uint32_t dst_bit_size)
{
switch (dst_bit_size) {
case 32: return nir_op_i2i32;
case 16: return nir_op_i2i16;
case 8: return nir_op_i2i8;
case 32:
return nir_op_i2i32;
case 16:
return nir_op_i2i16;
case 8:
return nir_op_i2i8;
default:
unreachable("invalid boolean bit-size");
}
@ -173,130 +176,118 @@ lower_alu_instr(nir_builder *b, nir_alu_instr *alu)
break;
case nir_op_flt:
opcode = bit_size == 8 ? nir_op_flt8 :
bit_size == 16 ? nir_op_flt16 : nir_op_flt32;
opcode = bit_size == 8 ? nir_op_flt8 : bit_size == 16 ? nir_op_flt16
: nir_op_flt32;
break;
case nir_op_fge:
opcode = bit_size == 8 ? nir_op_fge8 :
bit_size == 16 ? nir_op_fge16 : nir_op_fge32;
opcode = bit_size == 8 ? nir_op_fge8 : bit_size == 16 ? nir_op_fge16
: nir_op_fge32;
break;
case nir_op_feq:
opcode = bit_size == 8 ? nir_op_feq8 :
bit_size == 16 ? nir_op_feq16 : nir_op_feq32;
opcode = bit_size == 8 ? nir_op_feq8 : bit_size == 16 ? nir_op_feq16
: nir_op_feq32;
break;
case nir_op_fneu:
opcode = bit_size == 8 ? nir_op_fneu8 :
bit_size == 16 ? nir_op_fneu16 : nir_op_fneu32;
opcode = bit_size == 8 ? nir_op_fneu8 : bit_size == 16 ? nir_op_fneu16
: nir_op_fneu32;
break;
case nir_op_ilt:
opcode = bit_size == 8 ? nir_op_ilt8 :
bit_size == 16 ? nir_op_ilt16 : nir_op_ilt32;
opcode = bit_size == 8 ? nir_op_ilt8 : bit_size == 16 ? nir_op_ilt16
: nir_op_ilt32;
break;
case nir_op_ige:
opcode = bit_size == 8 ? nir_op_ige8 :
bit_size == 16 ? nir_op_ige16 : nir_op_ige32;
opcode = bit_size == 8 ? nir_op_ige8 : bit_size == 16 ? nir_op_ige16
: nir_op_ige32;
break;
case nir_op_ieq:
opcode = bit_size == 8 ? nir_op_ieq8 :
bit_size == 16 ? nir_op_ieq16 : nir_op_ieq32;
opcode = bit_size == 8 ? nir_op_ieq8 : bit_size == 16 ? nir_op_ieq16
: nir_op_ieq32;
break;
case nir_op_ine:
opcode = bit_size == 8 ? nir_op_ine8 :
bit_size == 16 ? nir_op_ine16 : nir_op_ine32;
opcode = bit_size == 8 ? nir_op_ine8 : bit_size == 16 ? nir_op_ine16
: nir_op_ine32;
break;
case nir_op_ult:
opcode = bit_size == 8 ? nir_op_ult8 :
bit_size == 16 ? nir_op_ult16 : nir_op_ult32;
opcode = bit_size == 8 ? nir_op_ult8 : bit_size == 16 ? nir_op_ult16
: nir_op_ult32;
break;
case nir_op_uge:
opcode = bit_size == 8 ? nir_op_uge8 :
bit_size == 16 ? nir_op_uge16 : nir_op_uge32;
opcode = bit_size == 8 ? nir_op_uge8 : bit_size == 16 ? nir_op_uge16
: nir_op_uge32;
break;
case nir_op_ball_fequal2:
opcode = bit_size == 8 ? nir_op_b8all_fequal2 :
bit_size == 16 ? nir_op_b16all_fequal2 :
nir_op_b32all_fequal2;
opcode = bit_size == 8 ? nir_op_b8all_fequal2 : bit_size == 16 ? nir_op_b16all_fequal2
: nir_op_b32all_fequal2;
break;
case nir_op_ball_fequal3:
opcode = bit_size == 8 ? nir_op_b8all_fequal3 :
bit_size == 16 ? nir_op_b16all_fequal3 :
nir_op_b32all_fequal3;
opcode = bit_size == 8 ? nir_op_b8all_fequal3 : bit_size == 16 ? nir_op_b16all_fequal3
: nir_op_b32all_fequal3;
break;
case nir_op_ball_fequal4:
opcode = bit_size == 8 ? nir_op_b8all_fequal4 :
bit_size == 16 ? nir_op_b16all_fequal4 :
nir_op_b32all_fequal4;
opcode = bit_size == 8 ? nir_op_b8all_fequal4 : bit_size == 16 ? nir_op_b16all_fequal4
: nir_op_b32all_fequal4;
break;
case nir_op_bany_fnequal2:
opcode = bit_size == 8 ? nir_op_b8any_fnequal2 :
bit_size == 16 ? nir_op_b16any_fnequal2 :
nir_op_b32any_fnequal2;
opcode = bit_size == 8 ? nir_op_b8any_fnequal2 : bit_size == 16 ? nir_op_b16any_fnequal2
: nir_op_b32any_fnequal2;
break;
case nir_op_bany_fnequal3:
opcode = bit_size == 8 ? nir_op_b8any_fnequal3 :
bit_size == 16 ? nir_op_b16any_fnequal3 :
nir_op_b32any_fnequal3;
opcode = bit_size == 8 ? nir_op_b8any_fnequal3 : bit_size == 16 ? nir_op_b16any_fnequal3
: nir_op_b32any_fnequal3;
break;
case nir_op_bany_fnequal4:
opcode = bit_size == 8 ? nir_op_b8any_fnequal4 :
bit_size == 16 ? nir_op_b16any_fnequal4 :
nir_op_b32any_fnequal4;
opcode = bit_size == 8 ? nir_op_b8any_fnequal4 : bit_size == 16 ? nir_op_b16any_fnequal4
: nir_op_b32any_fnequal4;
break;
case nir_op_ball_iequal2:
opcode = bit_size == 8 ? nir_op_b8all_iequal2 :
bit_size == 16 ? nir_op_b16all_iequal2 :
nir_op_b32all_iequal2;
opcode = bit_size == 8 ? nir_op_b8all_iequal2 : bit_size == 16 ? nir_op_b16all_iequal2
: nir_op_b32all_iequal2;
break;
case nir_op_ball_iequal3:
opcode = bit_size == 8 ? nir_op_b8all_iequal3 :
bit_size == 16 ? nir_op_b16all_iequal3 :
nir_op_b32all_iequal3;
opcode = bit_size == 8 ? nir_op_b8all_iequal3 : bit_size == 16 ? nir_op_b16all_iequal3
: nir_op_b32all_iequal3;
break;
case nir_op_ball_iequal4:
opcode = bit_size == 8 ? nir_op_b8all_iequal4 :
bit_size == 16 ? nir_op_b16all_iequal4 :
nir_op_b32all_iequal4;
opcode = bit_size == 8 ? nir_op_b8all_iequal4 : bit_size == 16 ? nir_op_b16all_iequal4
: nir_op_b32all_iequal4;
break;
case nir_op_bany_inequal2:
opcode = bit_size == 8 ? nir_op_b8any_inequal2 :
bit_size == 16 ? nir_op_b16any_inequal2 :
nir_op_b32any_inequal2;
opcode = bit_size == 8 ? nir_op_b8any_inequal2 : bit_size == 16 ? nir_op_b16any_inequal2
: nir_op_b32any_inequal2;
break;
case nir_op_bany_inequal3:
opcode = bit_size == 8 ? nir_op_b8any_inequal3 :
bit_size == 16 ? nir_op_b16any_inequal3 :
nir_op_b32any_inequal3;
opcode = bit_size == 8 ? nir_op_b8any_inequal3 : bit_size == 16 ? nir_op_b16any_inequal3
: nir_op_b32any_inequal3;
break;
case nir_op_bany_inequal4:
opcode = bit_size == 8 ? nir_op_b8any_inequal4 :
bit_size == 16 ? nir_op_b16any_inequal4 :
nir_op_b32any_inequal4;
opcode = bit_size == 8 ? nir_op_b8any_inequal4 : bit_size == 16 ? nir_op_b16any_inequal4
: nir_op_b32any_inequal4;
break;
case nir_op_bcsel:
opcode = bit_size == 8 ? nir_op_b8csel :
bit_size == 16 ? nir_op_b16csel : nir_op_b32csel;
opcode = bit_size == 8 ? nir_op_b8csel : bit_size == 16 ? nir_op_b16csel
: nir_op_b32csel;
/* The destination of the selection may have a different bit-size from
* the bcsel condition.
@ -425,6 +416,6 @@ nir_lower_bool_to_bitsize(nir_shader *shader)
{
return nir_shader_instructions_pass(shader, nir_lower_bool_to_bitsize_instr,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
NULL);
}

116
src/compiler/nir/nir_lower_bool_to_float.c
View file

@ -65,33 +65,83 @@ lower_alu_instr(nir_builder *b, nir_alu_instr *alu, bool has_fcsel_ne,
/* These we expect to have booleans but the opcode doesn't change */
break;
case nir_op_b2f32: alu->op = nir_op_mov; break;
case nir_op_b2i32: alu->op = nir_op_mov; break;
case nir_op_b2b1: alu->op = nir_op_mov; break;
case nir_op_b2f32:
alu->op = nir_op_mov;
break;
case nir_op_b2i32:
alu->op = nir_op_mov;
break;
case nir_op_b2b1:
alu->op = nir_op_mov;
break;
case nir_op_flt: alu->op = nir_op_slt; break;
case nir_op_fge: alu->op = nir_op_sge; break;
case nir_op_feq: alu->op = nir_op_seq; break;
case nir_op_fneu: alu->op = nir_op_sne; break;
case nir_op_ilt: alu->op = nir_op_slt; break;
case nir_op_ige: alu->op = nir_op_sge; break;
case nir_op_ieq: alu->op = nir_op_seq; break;
case nir_op_ine: alu->op = nir_op_sne; break;
case nir_op_ult: alu->op = nir_op_slt; break;
case nir_op_uge: alu->op = nir_op_sge; break;
case nir_op_flt:
alu->op = nir_op_slt;
break;
case nir_op_fge:
alu->op = nir_op_sge;
break;
case nir_op_feq:
alu->op = nir_op_seq;
break;
case nir_op_fneu:
alu->op = nir_op_sne;
break;
case nir_op_ilt:
alu->op = nir_op_slt;
break;
case nir_op_ige:
alu->op = nir_op_sge;
break;
case nir_op_ieq:
alu->op = nir_op_seq;
break;
case nir_op_ine:
alu->op = nir_op_sne;
break;
case nir_op_ult:
alu->op = nir_op_slt;
break;
case nir_op_uge:
alu->op = nir_op_sge;
break;
case nir_op_ball_fequal2: alu->op = nir_op_fall_equal2; break;
case nir_op_ball_fequal3: alu->op = nir_op_fall_equal3; break;
case nir_op_ball_fequal4: alu->op = nir_op_fall_equal4; break;
case nir_op_bany_fnequal2: alu->op = nir_op_fany_nequal2; break;
case nir_op_bany_fnequal3: alu->op = nir_op_fany_nequal3; break;
case nir_op_bany_fnequal4: alu->op = nir_op_fany_nequal4; break;
case nir_op_ball_iequal2: alu->op = nir_op_fall_equal2; break;
case nir_op_ball_iequal3: alu->op = nir_op_fall_equal3; break;
case nir_op_ball_iequal4: alu->op = nir_op_fall_equal4; break;
case nir_op_bany_inequal2: alu->op = nir_op_fany_nequal2; break;
case nir_op_bany_inequal3: alu->op = nir_op_fany_nequal3; break;
case nir_op_bany_inequal4: alu->op = nir_op_fany_nequal4; break;
case nir_op_ball_fequal2:
alu->op = nir_op_fall_equal2;
break;
case nir_op_ball_fequal3:
alu->op = nir_op_fall_equal3;
break;
case nir_op_ball_fequal4:
alu->op = nir_op_fall_equal4;
break;
case nir_op_bany_fnequal2:
alu->op = nir_op_fany_nequal2;
break;
case nir_op_bany_fnequal3:
alu->op = nir_op_fany_nequal3;
break;
case nir_op_bany_fnequal4:
alu->op = nir_op_fany_nequal4;
break;
case nir_op_ball_iequal2:
alu->op = nir_op_fall_equal2;
break;
case nir_op_ball_iequal3:
alu->op = nir_op_fall_equal3;
break;
case nir_op_ball_iequal4:
alu->op = nir_op_fall_equal4;
break;
case nir_op_bany_inequal2:
alu->op = nir_op_fany_nequal2;
break;
case nir_op_bany_inequal3:
alu->op = nir_op_fany_nequal3;
break;
case nir_op_bany_inequal4:
alu->op = nir_op_fany_nequal4;
break;
case nir_op_bcsel:
if (has_fcsel_gt)
@ -110,13 +160,19 @@ lower_alu_instr(nir_builder *b, nir_alu_instr *alu, bool has_fcsel_ne,
break;
case nir_op_iand: alu->op = nir_op_fmul; break;
case nir_op_ixor: alu->op = nir_op_sne; break;
case nir_op_ior: alu->op = nir_op_fmax; break;
case nir_op_iand:
alu->op = nir_op_fmul;
break;
case nir_op_ixor:
alu->op = nir_op_sne;
break;
case nir_op_ior:
alu->op = nir_op_fmax;
break;
case nir_op_inot:
rep = nir_seq(b, nir_ssa_for_alu_src(b, alu, 0),
nir_imm_float(b, 0));
nir_imm_float(b, 0));
break;
default:
@ -206,6 +262,6 @@ nir_lower_bool_to_float(nir_shader *shader, bool has_fcsel_ne)
return nir_shader_instructions_pass(shader, nir_lower_bool_to_float_instr,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
&data);
}

99
src/compiler/nir/nir_lower_bool_to_int32.c
View file

@ -73,33 +73,81 @@ lower_alu_instr(nir_alu_instr *alu)
alu->op = nir_op_mov;
break;
case nir_op_flt: alu->op = nir_op_flt32; break;
case nir_op_fge: alu->op = nir_op_fge32; break;
case nir_op_feq: alu->op = nir_op_feq32; break;
case nir_op_fneu: alu->op = nir_op_fneu32; break;
case nir_op_ilt: alu->op = nir_op_ilt32; break;
case nir_op_ige: alu->op = nir_op_ige32; break;
case nir_op_ieq: alu->op = nir_op_ieq32; break;
case nir_op_ine: alu->op = nir_op_ine32; break;
case nir_op_ult: alu->op = nir_op_ult32; break;
case nir_op_uge: alu->op = nir_op_uge32; break;
case nir_op_flt:
alu->op = nir_op_flt32;
break;
case nir_op_fge:
alu->op = nir_op_fge32;
break;
case nir_op_feq:
alu->op = nir_op_feq32;
break;
case nir_op_fneu:
alu->op = nir_op_fneu32;
break;
case nir_op_ilt:
alu->op = nir_op_ilt32;
break;
case nir_op_ige:
alu->op = nir_op_ige32;
break;
case nir_op_ieq:
alu->op = nir_op_ieq32;
break;
case nir_op_ine:
alu->op = nir_op_ine32;
break;
case nir_op_ult:
alu->op = nir_op_ult32;
break;
case nir_op_uge:
alu->op = nir_op_uge32;
break;
case nir_op_ball_fequal2: alu->op = nir_op_b32all_fequal2; break;
case nir_op_ball_fequal3: alu->op = nir_op_b32all_fequal3; break;
case nir_op_ball_fequal4: alu->op = nir_op_b32all_fequal4; break;
case nir_op_bany_fnequal2: alu->op = nir_op_b32any_fnequal2; break;
case nir_op_bany_fnequal3: alu->op = nir_op_b32any_fnequal3; break;
case nir_op_bany_fnequal4: alu->op = nir_op_b32any_fnequal4; break;
case nir_op_ball_iequal2: alu->op = nir_op_b32all_iequal2; break;
case nir_op_ball_iequal3: alu->op = nir_op_b32all_iequal3; break;
case nir_op_ball_iequal4: alu->op = nir_op_b32all_iequal4; break;
case nir_op_bany_inequal2: alu->op = nir_op_b32any_inequal2; break;
case nir_op_bany_inequal3: alu->op = nir_op_b32any_inequal3; break;
case nir_op_bany_inequal4: alu->op = nir_op_b32any_inequal4; break;
case nir_op_ball_fequal2:
alu->op = nir_op_b32all_fequal2;
break;
case nir_op_ball_fequal3:
alu->op = nir_op_b32all_fequal3;
break;
case nir_op_ball_fequal4:
alu->op = nir_op_b32all_fequal4;
break;
case nir_op_bany_fnequal2:
alu->op = nir_op_b32any_fnequal2;
break;
case nir_op_bany_fnequal3:
alu->op = nir_op_b32any_fnequal3;
break;
case nir_op_bany_fnequal4:
alu->op = nir_op_b32any_fnequal4;
break;
case nir_op_ball_iequal2:
alu->op = nir_op_b32all_iequal2;
break;
case nir_op_ball_iequal3:
alu->op = nir_op_b32all_iequal3;
break;
case nir_op_ball_iequal4:
alu->op = nir_op_b32all_iequal4;
break;
case nir_op_bany_inequal2:
alu->op = nir_op_b32any_inequal2;
break;
case nir_op_bany_inequal3:
alu->op = nir_op_b32any_inequal3;
break;
case nir_op_bany_inequal4:
alu->op = nir_op_b32any_inequal4;
break;
case nir_op_bcsel: alu->op = nir_op_b32csel; break;
case nir_op_bcsel:
alu->op = nir_op_b32csel;
break;
case nir_op_fisfinite: alu->op = nir_op_fisfinite32; break;
case nir_op_fisfinite:
alu->op = nir_op_fisfinite32;
break;
default:
assert(alu->dest.dest.ssa.bit_size > 1);
@ -181,6 +229,7 @@ nir_lower_bool_to_int32(nir_shader *shader)
progress |=
nir_shader_instructions_pass(shader, nir_lower_bool_to_int32_instr,
nir_metadata_block_index |
nir_metadata_dominance, NULL);
nir_metadata_dominance,
NULL);
return progress;
}

6
src/compiler/nir/nir_lower_cl_images.c
View file

@ -85,7 +85,7 @@ nir_dedup_inline_samplers(nir_shader *nir)
nir_shader_instructions_pass(nir, nir_dedup_inline_samplers_instr,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
&inline_samplers);
/* If we found any inline samplers in the instructions pass, they'll now be
@ -188,7 +188,7 @@ nir_lower_cl_images(nir_shader *shader, bool lower_image_derefs, bool lower_samp
b.cursor = nir_instr_remove(&deref->instr);
nir_ssa_def *loc =
nir_imm_intN_t(&b, deref->var->data.driver_location,
deref->dest.ssa.bit_size);
deref->dest.ssa.bit_size);
nir_ssa_def_rewrite_uses(&deref->dest.ssa, loc);
progress = true;
break;
@ -275,7 +275,7 @@ nir_lower_cl_images(nir_shader *shader, bool lower_image_derefs, bool lower_samp
if (progress) {
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}

3
src/compiler/nir/nir_lower_clamp_color_outputs.c
View file

@ -21,7 +21,6 @@
* SOFTWARE.
*/
#include "nir.h"
#include "nir_builder.h"
@ -102,6 +101,6 @@ nir_lower_clamp_color_outputs(nir_shader *shader)
{
return nir_shader_instructions_pass(shader, lower_instr,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
shader);
}

16
src/compiler/nir/nir_lower_clip.c
View file

@ -39,7 +39,6 @@
* and only once).
*/
static nir_variable *
create_clipdist_var(nir_shader *shader,
bool output, gl_varying_slot slot, unsigned array_size)
@ -122,12 +121,12 @@ load_clipdist_input(nir_builder *b, nir_variable *in, int location_offset,
if (b->shader->options->use_interpolated_input_intrinsics) {
/* TODO: use sample when per-sample shading? */
nir_ssa_def *barycentric = nir_load_barycentric(
b, nir_intrinsic_load_barycentric_pixel, INTERP_MODE_NONE);
b, nir_intrinsic_load_barycentric_pixel, INTERP_MODE_NONE);
load = nir_load_interpolated_input(
b, 4, 32, barycentric, nir_imm_int(b, location_offset),
.base = in->data.driver_location,
.dest_type = nir_type_float32,
.io_semantics = semantics);
b, 4, 32, barycentric, nir_imm_int(b, location_offset),
.base = in->data.driver_location,
.dest_type = nir_type_float32,
.io_semantics = semantics);
} else {
load = nir_load_input(b, 4, 32, nir_imm_int(b, location_offset),
@ -232,7 +231,6 @@ get_ucp(nir_builder *b, int plane,
return nir_load_user_clip_plane(b, plane);
}
static void
lower_clip_outputs(nir_builder *b, nir_variable *position,
nir_variable *clipvertex, nir_variable **out,
@ -462,7 +460,7 @@ lower_clip_fs(nir_function_impl *impl, unsigned ucp_enables,
static bool
fs_has_clip_dist_input_var(nir_shader *shader, nir_variable **io_vars,
unsigned *ucp_enables)
unsigned *ucp_enables)
{
assert(shader->info.stage == MESA_SHADER_FRAGMENT);
nir_foreach_shader_in_variable(var, shader) {
@ -485,7 +483,7 @@ bool
nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
bool use_clipdist_array)
{
nir_variable *in[2] = {0};
nir_variable *in[2] = { 0 };
if (!ucp_enables)
return false;

6
src/compiler/nir/nir_lower_clip_cull_distance_arrays.c
View file

@ -143,9 +143,9 @@ nir_lower_clip_cull_distance_arrays(nir_shader *nir)
if (progress) {
nir_metadata_preserve(impl,
nir_metadata_block_index |
nir_metadata_dominance |
nir_metadata_live_ssa_defs |
nir_metadata_loop_analysis);
nir_metadata_dominance |
nir_metadata_live_ssa_defs |
nir_metadata_loop_analysis);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}

9
src/compiler/nir/nir_lower_clip_disable.c
View file

@ -19,7 +19,7 @@
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*
*
* Authors:
* Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
*/
@ -27,7 +27,6 @@
#include "nir.h"
#include "nir_builder.h"
/**
* This pass uses the enabled clip planes from the rasterizer state to rewrite
* vertex shader store operations and store a 0 to the corresponding gl_ClipDistance[n]
@ -80,7 +79,7 @@ lower_clip_plane_store(nir_builder *b, nir_instr *instr_, void *cb_data)
out = nir_deref_instr_get_variable(deref);
if ((out->data.location != VARYING_SLOT_CLIP_DIST0 &&
out->data.location != VARYING_SLOT_CLIP_DIST1) ||
out->data.mode != nir_var_shader_out)
out->data.mode != nir_var_shader_out)
return false;
b->cursor = nir_after_instr(&instr->instr);
@ -100,7 +99,7 @@ lower_clip_plane_store(nir_builder *b, nir_instr *instr_, void *cb_data)
components[i] = nir_ssa_undef(b, 1, 32);
}
nir_store_deref(b, deref, nir_vec(b, components, instr->num_components), wrmask);
} else if (nir_src_is_const(deref->arr.index)) {
} else if (nir_src_is_const(deref->arr.index)) {
/* storing using a constant index */
plane = nir_src_as_uint(deref->arr.index);
/* no need to make changes if the clip plane is enabled */
@ -131,6 +130,6 @@ nir_lower_clip_disable(nir_shader *shader, unsigned clip_plane_enable)
return nir_shader_instructions_pass(shader, lower_clip_plane_store,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
&clip_plane_enable);
}

2
src/compiler/nir/nir_lower_clip_halfz.c
View file

@ -64,6 +64,6 @@ nir_lower_clip_halfz(nir_shader *shader)
nir_shader_instructions_pass(shader, lower_pos_write,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
NULL);
}

10
src/compiler/nir/nir_lower_const_arrays_to_uniforms.c
View file

@ -58,7 +58,7 @@ set_const_initialiser(nir_deref_instr **p, nir_constant *top_level_init,
assert(*p);
nir_constant *ret = top_level_init;
for ( ; *p; p++) {
for (; *p; p++) {
if ((*p)->deref_type == nir_deref_type_array) {
assert(nir_src_is_const((*p)->arr.index));
@ -81,7 +81,7 @@ set_const_initialiser(nir_deref_instr **p, nir_constant *top_level_init,
*/
nir_instr *src_instr = const_src->ssa->parent_instr;
assert(src_instr->type == nir_instr_type_load_const);
nir_load_const_instr* load = nir_instr_as_load_const(src_instr);
nir_load_const_instr *load = nir_instr_as_load_const(src_instr);
for (unsigned i = 0; i < load->def.num_components; i++) {
if (!(writemask & (1 << i)))
@ -247,7 +247,7 @@ nir_lower_const_arrays_to_uniforms(nir_shader *shader,
struct var_info *var_infos = ralloc_array(NULL, struct var_info, num_locals);
nir_foreach_function_temp_variable(var, impl) {
var_infos[var->index] = (struct var_info) {
var_infos[var->index] = (struct var_info){
.var = var,
.is_constant = true,
.found_read = false,
@ -379,7 +379,7 @@ nir_lower_const_arrays_to_uniforms(nir_shader *shader,
b.cursor = nir_before_instr(instr);
nir_variable *uni = (nir_variable *) entry->data;
nir_variable *uni = (nir_variable *)entry->data;
nir_deref_instr *new_deref_instr = nir_build_deref_var(&b, uni);
nir_deref_path path;
@ -408,7 +408,7 @@ nir_lower_const_arrays_to_uniforms(nir_shader *shader,
}
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
ralloc_free(var_infos);
_mesa_hash_table_destroy(const_array_vars, NULL);

5
src/compiler/nir/nir_lower_continue_constructs.c
View file

@ -22,7 +22,6 @@
*
*/
#include "nir.h"
#include "nir_builder.h"
#include "nir_control_flow.h"
@ -40,7 +39,7 @@ lower_loop_continue_block(nir_builder *b, nir_loop *loop, bool *repair_ssa)
unsigned num_continue = 0;
nir_block *single_predecessor = NULL;
set_foreach(cont->predecessors, entry) {
nir_block *pred = (nir_block*) entry->key;
nir_block *pred = (nir_block *)entry->key;
/* If the continue block has no predecessors, it is unreachable. */
if (pred->predecessors->entries == 0)
continue;
@ -102,7 +101,6 @@ lower_loop_continue_block(nir_builder *b, nir_loop *loop, bool *repair_ssa)
return true;
}
static bool
visit_cf_list(nir_builder *b, struct exec_list *list, bool *repair_ssa)
{
@ -171,4 +169,3 @@ nir_lower_continue_constructs(nir_shader *shader)
return progress;
}

4
src/compiler/nir/nir_lower_convert_alu_types.c
View file

@ -95,7 +95,7 @@ opt_simplify_convert_alu_types_impl(nir_function_impl *impl)
if (lowered_instr) {
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}
@ -143,7 +143,7 @@ lower_convert_alu_types_impl(nir_function_impl *impl,
if (progress) {
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}

2
src/compiler/nir/nir_lower_discard_if.c
View file

@ -21,8 +21,8 @@
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include "nir.h"
#include "compiler/nir/nir_builder.h"
#include "nir.h"
static bool
lower_discard_if_instr(nir_builder *b, nir_instr *instr_, void *cb_data)

15
src/compiler/nir/nir_lower_discard_or_demote.c
View file

@ -92,7 +92,6 @@ insert_is_helper(nir_builder *b, nir_instr *instr)
return nir_is_helper_invocation(b, 1);
}
static bool
nir_lower_load_helper_to_is_helper(nir_builder *b, nir_instr *instr, void *data)
{
@ -100,14 +99,14 @@ nir_lower_load_helper_to_is_helper(nir_builder *b, nir_instr *instr, void *data)
return false;
nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
nir_ssa_def *is_helper = *(nir_ssa_def**) data;
nir_ssa_def *is_helper = *(nir_ssa_def **)data;
switch (intrin->intrinsic) {
case nir_intrinsic_demote:
case nir_intrinsic_demote_if:
/* insert is_helper at last top level occasion */
if (is_helper == NULL) {
is_helper = insert_is_helper(b, instr);
*(nir_ssa_def**)data = is_helper;
*(nir_ssa_def **)data = is_helper;
return true;
} else {
return false;
@ -165,9 +164,9 @@ nir_lower_discard_or_demote(nir_shader *shader,
progress = nir_shader_instructions_pass(shader,
nir_lower_discard_to_demote_instr,
nir_metadata_block_index |
nir_metadata_dominance |
nir_metadata_live_ssa_defs |
nir_metadata_instr_index,
nir_metadata_dominance |
nir_metadata_live_ssa_defs |
nir_metadata_instr_index,
NULL);
shader->info.fs.uses_demote = true;
} else if (!shader->info.fs.needs_quad_helper_invocations &&
@ -177,7 +176,7 @@ nir_lower_discard_or_demote(nir_shader *shader,
progress = nir_shader_instructions_pass(shader,
nir_lower_demote_to_discard_instr,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
NULL);
shader->info.fs.uses_demote = false;
} else if (shader->info.fs.uses_demote &&
@ -189,7 +188,7 @@ nir_lower_discard_or_demote(nir_shader *shader,
progress = nir_shader_instructions_pass(shader,
nir_lower_load_helper_to_is_helper,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
&is_helper);
BITSET_CLEAR(shader->info.system_values_read,
nir_system_value_from_intrinsic(nir_intrinsic_load_helper_invocation));

79
src/compiler/nir/nir_lower_double_ops.c
View file

@ -25,8 +25,8 @@
#include "nir.h"
#include "nir_builder.h"
#include <math.h>
#include <float.h>
#include <math.h>
/*
* Lowers some unsupported double operations, using only:
@ -98,8 +98,7 @@ fix_inv_result(nir_builder *b, nir_ssa_def *res, nir_ssa_def *src,
* denorms properly. Note that this doesn't preserve positive/negative
* zeros, but GLSL doesn't require it.
*/
res = nir_bcsel(b, nir_ior(b, nir_ile_imm(b, exp, 0),
nir_feq_imm(b, nir_fabs(b, src), INFINITY)),
res = nir_bcsel(b, nir_ior(b, nir_ile_imm(b, exp, 0), nir_feq_imm(b, nir_fabs(b, src), INFINITY)),
nir_imm_double(b, 0.0f), res);
/* If the original input was 0, generate the correctly-signed infinity */
@ -107,7 +106,6 @@ fix_inv_result(nir_builder *b, nir_ssa_def *res, nir_ssa_def *src,
res, get_signed_inf(b, src));
return res;
}
static nir_ssa_def *
@ -301,9 +299,8 @@ lower_sqrt_rsq(nir_builder *b, nir_ssa_def *src, bool sqrt)
nir_imm_double(b, 0.0),
src);
}
res = nir_bcsel(b, nir_ior(b, nir_feq_imm(b, src_flushed, 0.0),
nir_feq_imm(b, src, INFINITY)),
src_flushed, res);
res = nir_bcsel(b, nir_ior(b, nir_feq_imm(b, src_flushed, 0.0), nir_feq_imm(b, src, INFINITY)),
src_flushed, res);
} else {
res = fix_inv_result(b, res, src, new_exp);
}
@ -352,15 +349,14 @@ lower_trunc(nir_builder *b, nir_ssa_def *src)
nir_ssa_def *src_lo = nir_unpack_64_2x32_split_x(b, src);
nir_ssa_def *src_hi = nir_unpack_64_2x32_split_y(b, src);
return
nir_bcsel(b,
nir_ilt_imm(b, unbiased_exp, 0),
nir_imm_double(b, 0.0),
nir_bcsel(b, nir_ige_imm(b, unbiased_exp, 53),
src,
nir_pack_64_2x32_split(b,
nir_iand(b, mask_lo, src_lo),
nir_iand(b, mask_hi, src_hi))));
return nir_bcsel(b,
nir_ilt_imm(b, unbiased_exp, 0),
nir_imm_double(b, 0.0),
nir_bcsel(b, nir_ige_imm(b, unbiased_exp, 53),
src,
nir_pack_64_2x32_split(b,
nir_iand(b, mask_lo, src_lo),
nir_iand(b, mask_hi, src_hi))));
}
static nir_ssa_def *
@ -415,7 +411,8 @@ lower_round_even(nir_builder *b, nir_ssa_def *src)
return nir_bcsel(b, nir_flt(b, nir_fabs(b, src), two52),
nir_pack_64_2x32_split(b, nir_unpack_64_2x32_split_x(b, res),
nir_ior(b, nir_unpack_64_2x32_split_y(b, res), sign)), src);
nir_ior(b, nir_unpack_64_2x32_split_y(b, res), sign)),
src);
}
static nir_ssa_def *
@ -506,8 +503,7 @@ lower_doubles_instr_to_soft(nir_builder *b, nir_alu_instr *instr,
if (instr->src[0].src.ssa->bit_size == 64) {
name = "__int64_to_fp64";
mangled_name = "__int64_to_fp64(i641;";
}
else {
} else {
name = "__int_to_fp64";
mangled_name = "__int_to_fp64(i1;";
}
@ -516,8 +512,7 @@ lower_doubles_instr_to_soft(nir_builder *b, nir_alu_instr *instr,
if (instr->src[0].src.ssa->bit_size == 64) {
name = "__uint64_to_fp64";
mangled_name = "__uint64_to_fp64(u641;";
}
else {
} else {
name = "__uint_to_fp64";
mangled_name = "__uint_to_fp64(u1;";
}
@ -617,7 +612,9 @@ lower_doubles_instr_to_soft(nir_builder *b, nir_alu_instr *instr,
assert(func);
}
nir_ssa_def *params[4] = { NULL, };
nir_ssa_def *params[4] = {
NULL,
};
nir_variable *ret_tmp =
nir_local_variable_create(b->impl, return_type, "return_tmp");
@ -639,18 +636,30 @@ nir_lower_doubles_options
nir_lower_doubles_op_to_options_mask(nir_op opcode)
{
switch (opcode) {
case nir_op_frcp: return nir_lower_drcp;
case nir_op_fsqrt: return nir_lower_dsqrt;
case nir_op_frsq: return nir_lower_drsq;
case nir_op_ftrunc: return nir_lower_dtrunc;
case nir_op_ffloor: return nir_lower_dfloor;
case nir_op_fceil: return nir_lower_dceil;
case nir_op_ffract: return nir_lower_dfract;
case nir_op_fround_even: return nir_lower_dround_even;
case nir_op_fmod: return nir_lower_dmod;
case nir_op_fsub: return nir_lower_dsub;
case nir_op_fdiv: return nir_lower_ddiv;
default: return 0;
case nir_op_frcp:
return nir_lower_drcp;
case nir_op_fsqrt:
return nir_lower_dsqrt;
case nir_op_frsq:
return nir_lower_drsq;
case nir_op_ftrunc:
return nir_lower_dtrunc;
case nir_op_ffloor:
return nir_lower_dfloor;
case nir_op_fceil:
return nir_lower_dceil;
case nir_op_ffract:
return nir_lower_dfract;
case nir_op_fround_even:
return nir_lower_dround_even;
case nir_op_fmod:
return nir_lower_dmod;
case nir_op_fsub:
return nir_lower_dsub;
case nir_op_fdiv:
return nir_lower_ddiv;
default:
return 0;
}
}
@ -771,7 +780,7 @@ nir_lower_doubles_impl(nir_function_impl *impl,
nir_opt_deref_impl(impl);
} else if (progress) {
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}

4
src/compiler/nir/nir_lower_drawpixels.c
View file

@ -33,7 +33,7 @@
typedef struct {
const nir_lower_drawpixels_options *options;
nir_shader *shader;
nir_shader *shader;
nir_variable *texcoord, *texcoord_const, *scale, *bias, *tex, *pixelmap;
} lower_drawpixels_state;
@ -253,6 +253,6 @@ nir_lower_drawpixels(nir_shader *shader,
nir_shader_instructions_pass(shader, lower_drawpixels_instr,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
&state);
}

2
src/compiler/nir/nir_lower_fb_read.c
View file

@ -91,6 +91,6 @@ nir_lower_fb_read(nir_shader *shader)
return nir_shader_instructions_pass(shader, nir_lower_fb_read_instr,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
NULL);
}

1
src/compiler/nir/nir_lower_flatshade.c
View file

@ -21,7 +21,6 @@
* SOFTWARE.
*/
#include "nir.h"
#include "nir_builder.h"

4
src/compiler/nir/nir_lower_flrp.c
View file

@ -21,9 +21,9 @@
* IN THE SOFTWARE.
*/
#include <math.h>
#include "util/u_vector.h"
#include "nir.h"
#include "nir_builder.h"
#include "util/u_vector.h"
/**
* Lower flrp instructions.
@ -615,7 +615,7 @@ lower_flrp_impl(nir_function_impl *impl,
}
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
}
/**

15
src/compiler/nir/nir_lower_fp16_conv.c
View file

@ -54,12 +54,10 @@ half_rounded(nir_builder *b, nir_ssa_def *value, nir_ssa_def *guard, nir_ssa_def
return nir_iadd(b, value, nir_iand(b, guard, nir_ior(b, sticky, value)));
case nir_rounding_mode_ru:
sign = nir_ushr_imm(b, sign, 31);
return nir_iadd(b, value, nir_iand(b, nir_inot(b, sign),
nir_ior(b, guard, sticky)));
return nir_iadd(b, value, nir_iand(b, nir_inot(b, sign), nir_ior(b, guard, sticky)));
case nir_rounding_mode_rd:
sign = nir_ushr_imm(b, sign, 31);
return nir_iadd(b, value, nir_iand(b, sign,
nir_ior(b, guard, sticky)));
return nir_iadd(b, value, nir_iand(b, sign, nir_ior(b, guard, sticky)));
default:
return value;
}
@ -80,9 +78,9 @@ float_to_half_impl(nir_builder *b, nir_ssa_def *src, nir_rounding_mode mode)
/* NaN or INF. For rtne, overflow also becomes INF, so combine the comparisons */
nir_push_if(b, nir_ige(b, abs, mode == nir_rounding_mode_rtne ? f16max : f32infinity));
nir_ssa_def *inf_nanfp16 = nir_bcsel(b,
nir_ilt(b, f32infinity, abs),
nir_imm_int(b, 0x7E00),
nir_imm_int(b, 0x7C00));
nir_ilt(b, f32infinity, abs),
nir_imm_int(b, 0x7E00),
nir_imm_int(b, 0x7C00));
nir_push_else(b, NULL);
nir_ssa_def *overflowed_fp16 = NULL;
@ -101,7 +99,8 @@ float_to_half_impl(nir_builder *b, nir_ssa_def *src, nir_rounding_mode mode)
/* Negative becomes inf, positive becomes max float */
overflowed_fp16 = nir_bcsel(b, nir_i2b(b, sign), nir_imm_int(b, 0x7C00), nir_imm_int(b, 0x7BFF));
break;
default: unreachable("Should've been handled already");
default:
unreachable("Should've been handled already");
}
nir_push_else(b, NULL);
}

12
src/compiler/nir/nir_lower_fragcolor.c
View file

@ -19,7 +19,7 @@
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*
*
* Authors:
* Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
*/
@ -68,10 +68,8 @@ lower_fragcolor_instr(nir_builder *b, nir_instr *intr, void *data)
nir_ssa_def *frag_color = instr->src[1].ssa;
ralloc_free(out->name);
const char *name = out->data.index == 0 ? "gl_FragData[0]" :
"gl_SecondaryFragDataEXT[0]";
const char *name_tmpl = out->data.index == 0 ? "gl_FragData[%u]" :
"gl_SecondaryFragDataEXT[%u]";
const char *name = out->data.index == 0 ? "gl_FragData[0]" : "gl_SecondaryFragDataEXT[0]";
const char *name_tmpl = out->data.index == 0 ? "gl_FragData[%u]" : "gl_SecondaryFragDataEXT[%u]";
out->name = ralloc_strdup(out, name);
@ -85,7 +83,7 @@ lower_fragcolor_instr(nir_builder *b, nir_instr *intr, void *data)
char name[28];
snprintf(name, sizeof(name), name_tmpl, i);
nir_variable *out_color = nir_variable_create(b->shader, nir_var_shader_out,
out->type, name);
out->type, name);
out_color->data.location = FRAG_RESULT_DATA0 + i;
out_color->data.driver_location = b->shader->num_outputs++;
out_color->data.index = out->data.index;
@ -102,5 +100,5 @@ nir_lower_fragcolor(nir_shader *shader, unsigned max_draw_buffers)
return false;
return nir_shader_instructions_pass(shader, lower_fragcolor_instr,
nir_metadata_block_index | nir_metadata_dominance, &max_draw_buffers);
nir_metadata_block_index | nir_metadata_dominance, &max_draw_buffers);
}

1
src/compiler/nir/nir_lower_fragcoord_wtrans.c
View file

@ -75,5 +75,4 @@ nir_lower_fragcoord_wtrans(nir_shader *shader)
lower_fragcoord_wtrans_filter,
lower_fragcoord_wtrans_impl,
NULL);
}

8
src/compiler/nir/nir_lower_frexp.c
View file

@ -129,7 +129,7 @@ lower_frexp_exp(nir_builder *b, nir_ssa_def *x)
* exponent must be a 32-bit integer.
*/
exponent = nir_i2i32(b, nir_iadd(b, nir_ushr(b, abs_x, exponent_shift),
nir_bcsel(b, is_not_zero, exponent_bias, zero)));
nir_bcsel(b, is_not_zero, exponent_bias, zero)));
break;
}
case 32: {
@ -137,7 +137,7 @@ lower_frexp_exp(nir_builder *b, nir_ssa_def *x)
nir_ssa_def *exponent_bias = nir_imm_int(b, -126);
exponent = nir_iadd(b, nir_ushr(b, abs_x, exponent_shift),
nir_bcsel(b, is_not_zero, exponent_bias, zero));
nir_bcsel(b, is_not_zero, exponent_bias, zero));
break;
}
case 64: {
@ -148,7 +148,7 @@ lower_frexp_exp(nir_builder *b, nir_ssa_def *x)
nir_ssa_def *abs_upper_x = nir_unpack_64_2x32_split_y(b, abs_x);
exponent = nir_iadd(b, nir_ushr(b, abs_upper_x, exponent_shift),
nir_bcsel(b, is_not_zero, exponent_bias, zero32));
nir_bcsel(b, is_not_zero, exponent_bias, zero32));
break;
}
default:
@ -190,6 +190,6 @@ nir_lower_frexp(nir_shader *shader)
{
return nir_shader_instructions_pass(shader, lower_frexp_instr,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
NULL);
}

6
src/compiler/nir/nir_lower_global_vars_to_local.c
View file

@ -51,7 +51,7 @@ mark_global_var_uses_block(nir_block *block, nir_function_impl *impl,
struct hash_table *var_func_table)
{
nir_foreach_instr(instr, block) {
if (instr->type == nir_instr_type_deref) {
if (instr->type == nir_instr_type_deref) {
nir_deref_instr *deref = nir_instr_as_deref(instr);
if (deref->deref_type == nir_deref_type_var)
register_var_use(deref->var, impl, var_func_table);
@ -89,8 +89,8 @@ nir_lower_global_vars_to_local(nir_shader *shader)
var->data.mode = nir_var_function_temp;
exec_list_push_tail(&impl->locals, &var->node);
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance |
nir_metadata_live_ssa_defs);
nir_metadata_dominance |
nir_metadata_live_ssa_defs);
progress = true;
}
}

53
src/compiler/nir/nir_lower_goto_ifs.c
View file

@ -174,8 +174,7 @@ set_path_vars_cond(nir_builder *b, struct path_fork *fork, nir_src condition,
}
fork = fork->paths[i].fork;
break;
}
else {
} else {
nir_ssa_def *ssa_def = condition.ssa;
assert(ssa_def->bit_size == 1);
assert(ssa_def->num_components == 1);
@ -206,17 +205,14 @@ route_to(nir_builder *b, struct routes *routing, nir_block *target)
{
if (_mesa_set_search(routing->regular.reachable, target)) {
set_path_vars(b, routing->regular.fork, target);
}
else if (_mesa_set_search(routing->brk.reachable, target)) {
} else if (_mesa_set_search(routing->brk.reachable, target)) {
set_path_vars(b, routing->brk.fork, target);
nir_jump(b, nir_jump_break);
}
else if (_mesa_set_search(routing->cont.reachable, target)) {
} else if (_mesa_set_search(routing->cont.reachable, target)) {
set_path_vars(b, routing->cont.fork, target);
nir_jump(b, nir_jump_continue);
}
else {
assert(!target->successors[0]); /* target is endblock */
} else {
assert(!target->successors[0]); /* target is endblock */
nir_jump(b, nir_jump_return);
}
}
@ -363,8 +359,7 @@ fork_condition(nir_builder *b, struct path_fork *fork)
nir_ssa_def *ret;
if (fork->is_var) {
ret = nir_load_var(b, fork->path_var);
}
else
} else
ret = fork->path_ssa;
return ret;
}
@ -382,21 +377,21 @@ loop_routing_end(struct routes *routing, nir_builder *b)
assert(routing->cont.reachable == routing->regular.reachable);
nir_pop_loop(b, NULL);
if (routing->brk.fork && routing->brk.fork->paths[1].reachable ==
routing_backup->cont.reachable) {
routing_backup->cont.reachable) {
assert(!(routing->brk.fork->is_var &&
strcmp(routing->brk.fork->path_var->name, "path_continue")));
nir_push_if_src(b, nir_src_for_ssa(
fork_condition(b, routing->brk.fork)));
fork_condition(b, routing->brk.fork)));
nir_jump(b, nir_jump_continue);
nir_pop_if(b, NULL);
routing->brk = routing->brk.fork->paths[0];
}
if (routing->brk.fork && routing->brk.fork->paths[1].reachable ==
routing_backup->brk.reachable) {
routing_backup->brk.reachable) {
assert(!(routing->brk.fork->is_var &&
strcmp(routing->brk.fork->path_var->name, "path_break")));
nir_push_if_src(b, nir_src_for_ssa(
fork_condition(b, routing->brk.fork)));
fork_condition(b, routing->brk.fork)));
nir_jump(b, nir_jump_break);
nir_pop_if(b, NULL);
routing->brk = routing->brk.fork->paths[0];
@ -436,7 +431,6 @@ inside_outside(nir_block *block, struct set *loop_heads, struct set *outside,
_mesa_set_add(remaining, block->dom_children[i]);
}
if (NIR_LOWER_GOTO_IFS_DEBUG) {
printf("inside_outside(%u):\n", block->index);
printf(" loop_heads = ");
@ -454,7 +448,7 @@ inside_outside(nir_block *block, struct set *loop_heads, struct set *outside,
while (remaining->entries && progress) {
progress = false;
set_foreach(remaining, child_entry) {
nir_block *dom_child = (nir_block *) child_entry->key;
nir_block *dom_child = (nir_block *)child_entry->key;
bool can_jump_back = false;
set_foreach(dom_child->dom_frontier, entry) {
if (entry->key == dom_child)
@ -485,7 +479,7 @@ inside_outside(nir_block *block, struct set *loop_heads, struct set *outside,
/* Recurse for each remaining */
set_foreach(remaining, entry) {
inside_outside((nir_block *) entry->key, loop_heads, outside, reach,
inside_outside((nir_block *)entry->key, loop_heads, outside, reach,
brk_reachable, mem_ctx);
}
@ -583,7 +577,8 @@ handle_irreducible(struct set *remaining, struct strct_lvl *curr_level,
struct set *brk_reachable, void *mem_ctx)
{
nir_block *candidate = (nir_block *)
_mesa_set_next_entry(remaining, NULL)->key;
_mesa_set_next_entry(remaining, NULL)
->key;
struct set *old_candidates = _mesa_pointer_set_create(mem_ctx);
while (candidate) {
_mesa_set_add(old_candidates, candidate);
@ -594,7 +589,7 @@ handle_irreducible(struct set *remaining, struct strct_lvl *curr_level,
candidate = NULL;
set_foreach(remaining, entry) {
nir_block *remaining_block = (nir_block *) entry->key;
nir_block *remaining_block = (nir_block *)entry->key;
if (!_mesa_set_search(curr_level->blocks, remaining_block) &&
_mesa_set_intersects(remaining_block->dom_frontier,
curr_level->blocks)) {
@ -614,7 +609,7 @@ handle_irreducible(struct set *remaining, struct strct_lvl *curr_level,
curr_level->reach = _mesa_pointer_set_create(curr_level);
set_foreach(curr_level->blocks, entry) {
_mesa_set_remove_key(remaining, entry->key);
inside_outside((nir_block *) entry->key, loop_heads, remaining,
inside_outside((nir_block *)entry->key, loop_heads, remaining,
curr_level->reach, brk_reachable, mem_ctx);
}
_mesa_set_destroy(loop_heads, NULL);
@ -676,9 +671,9 @@ organize_levels(struct list_head *levels, struct set *remaining,
while (remaining->entries) {
_mesa_set_clear(remaining_frontier, NULL);
set_foreach(remaining, entry) {
nir_block *remain_block = (nir_block *) entry->key;
nir_block *remain_block = (nir_block *)entry->key;
set_foreach(remain_block->dom_frontier, frontier_entry) {
nir_block *frontier = (nir_block *) frontier_entry->key;
nir_block *frontier = (nir_block *)frontier_entry->key;
if (frontier != remain_block) {
_mesa_set_add(remaining_frontier, frontier);
}
@ -688,7 +683,7 @@ organize_levels(struct list_head *levels, struct set *remaining,
struct strct_lvl *curr_level = rzalloc(mem_ctx, struct strct_lvl);
curr_level->blocks = _mesa_pointer_set_create(curr_level);
set_foreach(remaining, entry) {
nir_block *candidate = (nir_block *) entry->key;
nir_block *candidate = (nir_block *)entry->key;
if (!_mesa_set_search(remaining_frontier, candidate)) {
_mesa_set_add(curr_level->blocks, candidate);
_mesa_set_remove_key(remaining, candidate);
@ -723,7 +718,7 @@ organize_levels(struct list_head *levels, struct set *remaining,
}
set_foreach(curr_level->blocks, blocks_entry) {
nir_block *level_block = (nir_block *) blocks_entry->key;
nir_block *level_block = (nir_block *)blocks_entry->key;
if (prev_frontier == NULL) {
prev_frontier =
_mesa_set_clone(level_block->dom_frontier, curr_level);
@ -827,9 +822,9 @@ plant_levels(struct list_head *levels, struct routes *routing,
if (level->skip_start) {
assert(routing->regular.fork);
assert(!(routing->regular.fork->is_var && strcmp(
routing->regular.fork->path_var->name, "path_conditional")));
routing->regular.fork->path_var->name, "path_conditional")));
nir_push_if_src(b, nir_src_for_ssa(
fork_condition(b, routing->regular.fork)));
fork_condition(b, routing->regular.fork)));
routing->regular = routing->regular.fork->paths[1];
}
struct path in_path = routing->regular;
@ -938,7 +933,7 @@ nir_lower_goto_ifs_impl(nir_function_impl *impl)
nir_cf_list cf_list;
nir_cf_extract(&cf_list, nir_before_cf_list(&impl->body),
nir_after_cf_list(&impl->body));
nir_after_cf_list(&impl->body));
/* From this point on, it's structured */
impl->structured = true;
@ -956,7 +951,7 @@ nir_lower_goto_ifs_impl(nir_function_impl *impl)
nir_block *start_block = nir_cf_node_as_block(start_node);
struct routes *routing = rzalloc(mem_ctx, struct routes);
*routing = (struct routes) {
*routing = (struct routes){
.regular.reachable = end_set,
.brk.reachable = empty_set,
.cont.reachable = empty_set,

9
src/compiler/nir/nir_lower_gs_intrinsics.c
View file

@ -278,7 +278,7 @@ append_set_vertex_and_primitive_count(nir_block *end_block, struct state *state)
* but before any jump instructions (return).
*/
set_foreach(end_block->predecessors, entry) {
nir_block *pred = (nir_block *) entry->key;
nir_block *pred = (nir_block *)entry->key;
b->cursor = nir_after_block_before_jump(pred);
for (unsigned stream = 0; stream < NIR_MAX_XFB_STREAMS; ++stream) {
@ -293,8 +293,8 @@ append_set_vertex_and_primitive_count(nir_block *end_block, struct state *state)
/* Inactive stream: vertex count is 0, primitive count is 0 or undef. */
vtx_cnt = nir_imm_int(b, 0);
prim_cnt = state->count_prims || state->is_points
? nir_imm_int(b, 0)
: nir_ssa_undef(b, 1, 32);
? nir_imm_int(b, 0)
: nir_ssa_undef(b, 1, 32);
} else {
if (state->overwrite_incomplete)
overwrite_incomplete_primitives(state, stream);
@ -328,8 +328,7 @@ static bool
a_block_needs_set_vertex_and_primitive_count(nir_block *end_block, bool per_stream)
{
set_foreach(end_block->predecessors, entry) {
nir_block *pred = (nir_block *) entry->key;
nir_block *pred = (nir_block *)entry->key;
for (unsigned stream = 0; stream < NIR_MAX_XFB_STREAMS; ++stream) {
/* When it's not per-stream, we only need to write one variable. */

12
src/compiler/nir/nir_lower_idiv.c
View file

@ -92,8 +92,8 @@ emit_idiv(nir_builder *bld, nir_ssa_def *numer, nir_ssa_def *denom, nir_op op)
static nir_ssa_def *
convert_instr_small(nir_builder *b, nir_op op,
nir_ssa_def *numer, nir_ssa_def *denom,
const nir_lower_idiv_options *options)
nir_ssa_def *numer, nir_ssa_def *denom,
const nir_lower_idiv_options *options)
{
unsigned sz = numer->bit_size;
nir_alu_type int_type = nir_op_infos[op].output_type | sz;
@ -121,7 +121,7 @@ convert_instr_small(nir_builder *b, nir_op op,
if (op == nir_op_imod) {
nir_ssa_def *zero = nir_imm_zero(b, 1, sz);
nir_ssa_def *diff_sign =
nir_ine(b, nir_ige(b, numer, zero), nir_ige(b, denom, zero));
nir_ine(b, nir_ige(b, numer, zero), nir_ige(b, denom, zero));
nir_ssa_def *adjust = nir_iand(b, diff_sign, nir_ine(b, res, zero));
res = nir_iadd(b, res, nir_bcsel(b, adjust, denom, zero));
@ -176,7 +176,7 @@ bool
nir_lower_idiv(nir_shader *shader, const nir_lower_idiv_options *options)
{
return nir_shader_lower_instructions(shader,
inst_is_idiv,
lower_idiv,
(void *)options);
inst_is_idiv,
lower_idiv,
(void *)options);
}

3
src/compiler/nir/nir_lower_image.c
View file

@ -222,5 +222,6 @@ nir_lower_image(nir_shader *nir, const nir_lower_image_options *options)
{
return nir_shader_instructions_pass(nir, lower_image_instr,
nir_metadata_block_index |
nir_metadata_dominance, (void*)options);
nir_metadata_dominance,
(void *)options);
}

12
src/compiler/nir/nir_lower_image_atomics_to_global.c
View file

@ -24,11 +24,11 @@ lower(nir_builder *b, nir_instr *instr, UNUSED void *_)
nir_intrinsic_op address_op;
bool swap;
#define CASE(storage) \
case nir_intrinsic_##storage##_atomic: \
case nir_intrinsic_##storage##_atomic_swap: \
address_op = nir_intrinsic_##storage##_texel_address; \
swap = intr->intrinsic == nir_intrinsic_##storage##_atomic_swap; \
#define CASE(storage) \
case nir_intrinsic_##storage##_atomic: \
case nir_intrinsic_##storage##_atomic_swap: \
address_op = nir_intrinsic_##storage##_texel_address; \
swap = intr->intrinsic == nir_intrinsic_##storage##_atomic_swap; \
break;
switch (intr->intrinsic) {
@ -103,6 +103,6 @@ nir_lower_image_atomics_to_global(nir_shader *shader)
{
return nir_shader_instructions_pass(shader, lower,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
NULL);
}

13
src/compiler/nir/nir_lower_input_attachments.c
View file

@ -36,10 +36,8 @@ load_frag_coord(nir_builder *b, nir_deref_instr *deref,
nir_ssa_def *unscaled_frag_coord = nir_load_frag_coord_unscaled_ir3(b);
if (deref->deref_type == nir_deref_type_array) {
nir_ssa_def *unscaled =
nir_i2b(b, nir_iand(b, nir_ishr(b,
nir_imm_int(b, options->unscaled_input_attachment_ir3 >> base),
deref->arr.index.ssa),
nir_imm_int(b, 1)));
nir_i2b(b, nir_iand(b, nir_ishr(b, nir_imm_int(b, options->unscaled_input_attachment_ir3 >> base), deref->arr.index.ssa),
nir_imm_int(b, 1)));
frag_coord = nir_bcsel(b, unscaled, unscaled_frag_coord, frag_coord);
} else {
assert(deref->deref_type == nir_deref_type_var);
@ -75,8 +73,7 @@ load_layer_id(nir_builder *b, const nir_input_attachment_options *options)
return nir_load_layer_id(b);
}
gl_varying_slot slot = options->use_view_id_for_layer ?
VARYING_SLOT_VIEW_INDEX : VARYING_SLOT_LAYER;
gl_varying_slot slot = options->use_view_id_for_layer ? VARYING_SLOT_VIEW_INDEX : VARYING_SLOT_LAYER;
nir_variable *layer_id = nir_get_variable_with_location(b->shader, nir_var_shader_in,
slot, glsl_int_type());
layer_id->data.interpolation = INTERP_MODE_FLAT;
@ -173,7 +170,7 @@ try_lower_input_texop(nir_builder *b, nir_tex_instr *tex,
nir_ssa_def *layer = load_layer_id(b, options);
nir_ssa_def *coord = nir_vec3(b, nir_channel(b, frag_coord, 0),
nir_channel(b, frag_coord, 1), layer);
nir_channel(b, frag_coord, 1), layer);
tex->coord_components = 3;
@ -220,6 +217,6 @@ nir_lower_input_attachments(nir_shader *shader,
return nir_shader_instructions_pass(shader, lower_input_attachments_instr,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
(void *)options);
}

109
src/compiler/nir/nir_lower_int64.c
View file

@ -24,22 +24,23 @@
#include "nir.h"
#include "nir_builder.h"
#define COND_LOWER_OP(b, name, ...) \
(b->shader->options->lower_int64_options & \
nir_lower_int64_op_to_options_mask(nir_op_##name)) ? \
lower_##name##64(b, __VA_ARGS__) : nir_##name(b, __VA_ARGS__)
#define COND_LOWER_OP(b, name, ...) \
(b->shader->options->lower_int64_options & \
nir_lower_int64_op_to_options_mask(nir_op_##name)) \
? lower_##name##64(b, __VA_ARGS__) \
: nir_##name(b, __VA_ARGS__)
#define COND_LOWER_CMP(b, name, ...) \
(b->shader->options->lower_int64_options & \
nir_lower_int64_op_to_options_mask(nir_op_##name)) ? \
lower_int64_compare(b, nir_op_##name, __VA_ARGS__) : \
nir_##name(b, __VA_ARGS__)
#define COND_LOWER_CMP(b, name, ...) \
(b->shader->options->lower_int64_options & \
nir_lower_int64_op_to_options_mask(nir_op_##name)) \
? lower_int64_compare(b, nir_op_##name, __VA_ARGS__) \
: nir_##name(b, __VA_ARGS__)
#define COND_LOWER_CAST(b, name, ...) \
(b->shader->options->lower_int64_options & \
nir_lower_int64_op_to_options_mask(nir_op_##name)) ? \
lower_##name(b, __VA_ARGS__) : \
nir_##name(b, __VA_ARGS__)
#define COND_LOWER_CAST(b, name, ...) \
(b->shader->options->lower_int64_options & \
nir_lower_int64_op_to_options_mask(nir_op_##name)) \
? lower_##name(b, __VA_ARGS__) \
: nir_##name(b, __VA_ARGS__)
static nir_ssa_def *
lower_b2i64(nir_builder *b, nir_ssa_def *x)
@ -59,7 +60,6 @@ lower_i2i16(nir_builder *b, nir_ssa_def *x)
return nir_i2i16(b, nir_unpack_64_2x32_split_x(b, x));
}
static nir_ssa_def *
lower_i2i32(nir_builder *b, nir_ssa_def *x)
{
@ -107,7 +107,7 @@ lower_bcsel64(nir_builder *b, nir_ssa_def *cond, nir_ssa_def *x, nir_ssa_def *y)
nir_ssa_def *y_hi = nir_unpack_64_2x32_split_y(b, y);
return nir_pack_64_2x32_split(b, nir_bcsel(b, cond, x_lo, y_lo),
nir_bcsel(b, cond, x_hi, y_hi));
nir_bcsel(b, cond, x_hi, y_hi));
}
static nir_ssa_def *
@ -128,7 +128,7 @@ lower_iand64(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
nir_ssa_def *y_hi = nir_unpack_64_2x32_split_y(b, y);
return nir_pack_64_2x32_split(b, nir_iand(b, x_lo, y_lo),
nir_iand(b, x_hi, y_hi));
nir_iand(b, x_hi, y_hi));
}
static nir_ssa_def *
@ -140,7 +140,7 @@ lower_ior64(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
nir_ssa_def *y_hi = nir_unpack_64_2x32_split_y(b, y);
return nir_pack_64_2x32_split(b, nir_ior(b, x_lo, y_lo),
nir_ior(b, x_hi, y_hi));
nir_ior(b, x_hi, y_hi));
}
static nir_ssa_def *
@ -152,7 +152,7 @@ lower_ixor64(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
nir_ssa_def *y_hi = nir_unpack_64_2x32_split_y(b, y);
return nir_pack_64_2x32_split(b, nir_ixor(b, x_lo, y_lo),
nir_ixor(b, x_hi, y_hi));
nir_ixor(b, x_hi, y_hi));
}
static nir_ssa_def *
@ -190,14 +190,14 @@ lower_ishl64(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
nir_ssa_def *res_if_lt_32 =
nir_pack_64_2x32_split(b, lo_shifted,
nir_ior(b, hi_shifted, lo_shifted_hi));
nir_ior(b, hi_shifted, lo_shifted_hi));
nir_ssa_def *res_if_ge_32 =
nir_pack_64_2x32_split(b, nir_imm_int(b, 0),
nir_ishl(b, x_lo, reverse_count));
nir_ishl(b, x_lo, reverse_count));
return nir_bcsel(b, nir_ieq_imm(b, y, 0), x,
nir_bcsel(b, nir_uge_imm(b, y, 32),
res_if_ge_32, res_if_lt_32));
res_if_ge_32, res_if_lt_32));
}
static nir_ssa_def *
@ -237,14 +237,14 @@ lower_ishr64(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
nir_ssa_def *res_if_lt_32 =
nir_pack_64_2x32_split(b, nir_ior(b, lo_shifted, hi_shifted_lo),
hi_shifted);
hi_shifted);
nir_ssa_def *res_if_ge_32 =
nir_pack_64_2x32_split(b, nir_ishr(b, x_hi, reverse_count),
nir_ishr_imm(b, x_hi, 31));
nir_ishr_imm(b, x_hi, 31));
return nir_bcsel(b, nir_ieq_imm(b, y, 0), x,
nir_bcsel(b, nir_uge_imm(b, y, 32),
res_if_ge_32, res_if_lt_32));
res_if_ge_32, res_if_lt_32));
}
static nir_ssa_def *
@ -283,14 +283,14 @@ lower_ushr64(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
nir_ssa_def *res_if_lt_32 =
nir_pack_64_2x32_split(b, nir_ior(b, lo_shifted, hi_shifted_lo),
hi_shifted);
hi_shifted);
nir_ssa_def *res_if_ge_32 =
nir_pack_64_2x32_split(b, nir_ushr(b, x_hi, reverse_count),
nir_imm_int(b, 0));
nir_imm_int(b, 0));
return nir_bcsel(b, nir_ieq_imm(b, y, 0), x,
nir_bcsel(b, nir_uge_imm(b, y, 32),
res_if_ge_32, res_if_lt_32));
res_if_ge_32, res_if_lt_32));
}
static nir_ssa_def *
@ -356,12 +356,12 @@ lower_int64_compare(nir_builder *b, nir_op op, nir_ssa_def *x, nir_ssa_def *y)
return nir_ior(b, nir_ine(b, x_hi, y_hi), nir_ine(b, x_lo, y_lo));
case nir_op_ult:
return nir_ior(b, nir_ult(b, x_hi, y_hi),
nir_iand(b, nir_ieq(b, x_hi, y_hi),
nir_ult(b, x_lo, y_lo)));
nir_iand(b, nir_ieq(b, x_hi, y_hi),
nir_ult(b, x_lo, y_lo)));
case nir_op_ilt:
return nir_ior(b, nir_ilt(b, x_hi, y_hi),
nir_iand(b, nir_ieq(b, x_hi, y_hi),
nir_ult(b, x_lo, y_lo)));
nir_iand(b, nir_ieq(b, x_hi, y_hi),
nir_ult(b, x_lo, y_lo)));
break;
case nir_op_uge:
/* Lower as !(x < y) in the hopes of better CSE */
@ -418,8 +418,8 @@ lower_imul64(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
nir_ssa_def *mul_lo = nir_umul_2x32_64(b, x_lo, y_lo);
nir_ssa_def *res_hi = nir_iadd(b, nir_unpack_64_2x32_split_y(b, mul_lo),
nir_iadd(b, nir_imul(b, x_lo, y_hi),
nir_imul(b, x_hi, y_lo)));
nir_iadd(b, nir_imul(b, x_lo, y_hi),
nir_imul(b, x_hi, y_lo)));
return nir_pack_64_2x32_split(b, nir_unpack_64_2x32_split_x(b, mul_lo),
res_hi);
@ -446,7 +446,9 @@ lower_mul_high64(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y,
y32[2] = y32[3] = nir_imm_int(b, 0);
}
nir_ssa_def *res[8] = { NULL, };
nir_ssa_def *res[8] = {
NULL,
};
/* Yes, the following generates a pile of code. However, we throw res[0]
* and res[1] away in the end and, if we're in the umul case, four of our
@ -541,13 +543,13 @@ lower_udiv64_mod64(nir_builder *b, nir_ssa_def *n, nir_ssa_def *d,
nir_ssa_def *new_n_hi = nir_isub(b, n_hi, d_shift);
nir_ssa_def *new_q_hi = nir_ior_imm(b, q_hi, 1ull << i);
nir_ssa_def *cond = nir_iand(b, need_high_div,
nir_uge(b, n_hi, d_shift));
nir_uge(b, n_hi, d_shift));
if (i != 0) {
/* log2_d_lo is always <= 31, so we don't need to bother with it
* in the last iteration.
*/
cond = nir_iand(b, cond,
nir_ile_imm(b, log2_d_lo, 31 - i));
nir_ile_imm(b, log2_d_lo, 31 - i));
}
n_hi = nir_bcsel(b, cond, new_n_hi, n_hi);
q_hi = nir_bcsel(b, cond, new_q_hi, q_hi);
@ -576,7 +578,7 @@ lower_udiv64_mod64(nir_builder *b, nir_ssa_def *n, nir_ssa_def *d,
* in the last iteration.
*/
cond = nir_iand(b, cond,
nir_ile_imm(b, log2_denom, 31 - i));
nir_ile_imm(b, log2_denom, 31 - i));
}
n = nir_bcsel(b, cond, new_n, n);
q_lo = nir_bcsel(b, cond, new_q_lo, q_lo);
@ -601,7 +603,7 @@ lower_idiv64(nir_builder *b, nir_ssa_def *n, nir_ssa_def *d)
nir_ssa_def *d_hi = nir_unpack_64_2x32_split_y(b, d);
nir_ssa_def *negate = nir_ine(b, nir_ilt_imm(b, n_hi, 0),
nir_ilt_imm(b, d_hi, 0));
nir_ilt_imm(b, d_hi, 0));
nir_ssa_def *q, *r;
lower_udiv64_mod64(b, nir_iabs(b, n), nir_iabs(b, d), &q, &r);
return nir_bcsel(b, negate, nir_ineg(b, q), q);
@ -629,8 +631,8 @@ lower_imod64(nir_builder *b, nir_ssa_def *n, nir_ssa_def *d)
nir_ssa_def *rem = nir_bcsel(b, n_is_neg, nir_ineg(b, r), r);
return nir_bcsel(b, nir_ieq_imm(b, r, 0), nir_imm_int64(b, 0),
nir_bcsel(b, nir_ieq(b, n_is_neg, d_is_neg), rem,
nir_iadd(b, rem, d)));
nir_bcsel(b, nir_ieq(b, n_is_neg, d_is_neg), rem,
nir_iadd(b, rem, d)));
}
static nir_ssa_def *
@ -658,12 +660,12 @@ lower_extract(nir_builder *b, nir_op op, nir_ssa_def *x, nir_ssa_def *c)
nir_ssa_def *extract32;
if (chunk < num_chunks_in_32) {
extract32 = nir_build_alu(b, op, nir_unpack_64_2x32_split_x(b, x),
nir_imm_int(b, chunk),
NULL, NULL);
nir_imm_int(b, chunk),
NULL, NULL);
} else {
extract32 = nir_build_alu(b, op, nir_unpack_64_2x32_split_y(b, x),
nir_imm_int(b, chunk - num_chunks_in_32),
NULL, NULL);
nir_imm_int(b, chunk - num_chunks_in_32),
NULL, NULL);
}
if (op == nir_op_extract_i8 || op == nir_op_extract_i16)
@ -747,7 +749,7 @@ lower_2f(nir_builder *b, nir_ssa_def *x, unsigned dest_bit_size,
nir_ssa_def *discard =
nir_imax(b, nir_iadd_imm(b, exp, -significand_bits),
nir_imm_int(b, 0));
nir_imm_int(b, 0));
nir_ssa_def *significand = COND_LOWER_OP(b, ushr, x, discard);
if (significand_bits < 32)
significand = COND_LOWER_CAST(b, u2u32, significand);
@ -767,7 +769,7 @@ lower_2f(nir_builder *b, nir_ssa_def *x, unsigned dest_bit_size,
nir_ssa_def *halfway = nir_iand(b, COND_LOWER_CMP(b, ieq, rem, half),
nir_ine_imm(b, discard, 0));
nir_ssa_def *is_odd = COND_LOWER_CMP(b, ine, nir_imm_int64(b, 0),
COND_LOWER_OP(b, iand, x, lsb_mask));
COND_LOWER_OP(b, iand, x, lsb_mask));
nir_ssa_def *round_up = nir_ior(b, COND_LOWER_CMP(b, ilt, half, rem),
nir_iand(b, halfway, is_odd));
if (significand_bits >= 32)
@ -1195,7 +1197,7 @@ static nir_ssa_def *
lower_vote_ieq(nir_builder *b, nir_ssa_def *x)
{
return nir_iand(b, build_vote_ieq(b, nir_unpack_64_2x32_split_x(b, x)),
build_vote_ieq(b, nir_unpack_64_2x32_split_y(b, x)));
build_vote_ieq(b, nir_unpack_64_2x32_split_y(b, x)));
}
static nir_ssa_def *
@ -1220,8 +1222,7 @@ static nir_ssa_def *
lower_scan_iadd64(nir_builder *b, const nir_intrinsic_instr *intrin)
{
unsigned cluster_size =
intrin->intrinsic == nir_intrinsic_reduce ?
nir_intrinsic_cluster_size(intrin) : 0;
intrin->intrinsic == nir_intrinsic_reduce ? nir_intrinsic_cluster_size(intrin) : 0;
/* Split it into three chunks of no more than 24 bits each. With 8 bits
* of headroom, we're guaranteed that there will never be overflow in the
@ -1234,19 +1235,19 @@ lower_scan_iadd64(nir_builder *b, const nir_intrinsic_instr *intrin)
nir_u2u32(b, nir_iand_imm(b, x, 0xffffff));
nir_ssa_def *x_mid =
nir_u2u32(b, nir_iand_imm(b, nir_ushr_imm(b, x, 24),
0xffffff));
0xffffff));
nir_ssa_def *x_hi =
nir_u2u32(b, nir_ushr_imm(b, x, 48));
nir_ssa_def *scan_low =
build_scan_intrinsic(b, intrin->intrinsic, nir_op_iadd,
cluster_size, x_low);
cluster_size, x_low);
nir_ssa_def *scan_mid =
build_scan_intrinsic(b, intrin->intrinsic, nir_op_iadd,
cluster_size, x_mid);
cluster_size, x_mid);
nir_ssa_def *scan_hi =
build_scan_intrinsic(b, intrin->intrinsic, nir_op_iadd,
cluster_size, x_hi);
cluster_size, x_hi);
scan_low = nir_u2u64(b, scan_low);
scan_mid = nir_ishl_imm(b, nir_u2u64(b, scan_mid), 24);

110
src/compiler/nir/nir_lower_int_to_float.c
View file

@ -107,9 +107,15 @@ lower_alu_instr(nir_builder *b, nir_alu_instr *alu)
/* These we expect to have integers but the opcode doesn't change */
break;
case nir_op_b2i32: alu->op = nir_op_b2f32; break;
case nir_op_i2f32: alu->op = nir_op_mov; break;
case nir_op_u2f32: alu->op = nir_op_mov; break;
case nir_op_b2i32:
alu->op = nir_op_b2f32;
break;
case nir_op_i2f32:
alu->op = nir_op_mov;
break;
case nir_op_u2f32:
alu->op = nir_op_mov;
break;
case nir_op_f2i32: {
alu->op = nir_op_ftrunc;
@ -138,18 +144,38 @@ lower_alu_instr(nir_builder *b, nir_alu_instr *alu)
break;
}
case nir_op_f2u32: alu->op = nir_op_ffloor; break;
case nir_op_f2u32:
alu->op = nir_op_ffloor;
break;
case nir_op_ilt: alu->op = nir_op_flt; break;
case nir_op_ige: alu->op = nir_op_fge; break;
case nir_op_ieq: alu->op = nir_op_feq; break;
case nir_op_ine: alu->op = nir_op_fneu; break;
case nir_op_ult: alu->op = nir_op_flt; break;
case nir_op_uge: alu->op = nir_op_fge; break;
case nir_op_ilt:
alu->op = nir_op_flt;
break;
case nir_op_ige:
alu->op = nir_op_fge;
break;
case nir_op_ieq:
alu->op = nir_op_feq;
break;
case nir_op_ine:
alu->op = nir_op_fneu;
break;
case nir_op_ult:
alu->op = nir_op_flt;
break;
case nir_op_uge:
alu->op = nir_op_fge;
break;
case nir_op_iadd: alu->op = nir_op_fadd; break;
case nir_op_isub: alu->op = nir_op_fsub; break;
case nir_op_imul: alu->op = nir_op_fmul; break;
case nir_op_iadd:
alu->op = nir_op_fadd;
break;
case nir_op_isub:
alu->op = nir_op_fsub;
break;
case nir_op_imul:
alu->op = nir_op_fmul;
break;
case nir_op_idiv: {
nir_ssa_def *x = nir_ssa_for_alu_src(b, alu, 0);
@ -164,22 +190,50 @@ lower_alu_instr(nir_builder *b, nir_alu_instr *alu)
break;
}
case nir_op_iabs: alu->op = nir_op_fabs; break;
case nir_op_ineg: alu->op = nir_op_fneg; break;
case nir_op_imax: alu->op = nir_op_fmax; break;
case nir_op_imin: alu->op = nir_op_fmin; break;
case nir_op_umax: alu->op = nir_op_fmax; break;
case nir_op_umin: alu->op = nir_op_fmin; break;
case nir_op_iabs:
alu->op = nir_op_fabs;
break;
case nir_op_ineg:
alu->op = nir_op_fneg;
break;
case nir_op_imax:
alu->op = nir_op_fmax;
break;
case nir_op_imin:
alu->op = nir_op_fmin;
break;
case nir_op_umax:
alu->op = nir_op_fmax;
break;
case nir_op_umin:
alu->op = nir_op_fmin;
break;
case nir_op_ball_iequal2: alu->op = nir_op_ball_fequal2; break;
case nir_op_ball_iequal3: alu->op = nir_op_ball_fequal3; break;
case nir_op_ball_iequal4: alu->op = nir_op_ball_fequal4; break;
case nir_op_bany_inequal2: alu->op = nir_op_bany_fnequal2; break;
case nir_op_bany_inequal3: alu->op = nir_op_bany_fnequal3; break;
case nir_op_bany_inequal4: alu->op = nir_op_bany_fnequal4; break;
case nir_op_ball_iequal2:
alu->op = nir_op_ball_fequal2;
break;
case nir_op_ball_iequal3:
alu->op = nir_op_ball_fequal3;
break;
case nir_op_ball_iequal4:
alu->op = nir_op_ball_fequal4;
break;
case nir_op_bany_inequal2:
alu->op = nir_op_bany_fnequal2;
break;
case nir_op_bany_inequal3:
alu->op = nir_op_bany_fnequal3;
break;
case nir_op_bany_inequal4:
alu->op = nir_op_bany_fnequal4;
break;
case nir_op_i32csel_gt: alu->op = nir_op_fcsel_gt; break;
case nir_op_i32csel_ge: alu->op = nir_op_fcsel_ge; break;
case nir_op_i32csel_gt:
alu->op = nir_op_fcsel_gt;
break;
case nir_op_i32csel_ge:
alu->op = nir_op_fcsel_ge;
break;
default:
assert(nir_alu_type_get_base_type(info->output_type) != nir_type_int &&
@ -246,7 +300,7 @@ nir_lower_int_to_float_impl(nir_function_impl *impl)
if (progress) {
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}

12
src/compiler/nir/nir_lower_interpolation.c
View file

@ -38,7 +38,7 @@ static bool
nir_lower_interpolation_instr(nir_builder *b, nir_instr *instr, void *cb_data)
{
nir_lower_interpolation_options options =
*(nir_lower_interpolation_options *)cb_data;
*(nir_lower_interpolation_options *)cb_data;
if (instr->type != nir_instr_type_intrinsic)
return false;
@ -107,11 +107,11 @@ nir_lower_interpolation_instr(nir_builder *b, nir_instr *instr, void *cb_data)
nir_ssa_def *val;
val = nir_ffma(b, nir_channel(b, bary, 1),
nir_channel(b, iid, 1),
nir_channel(b, iid, 0));
nir_channel(b, iid, 1),
nir_channel(b, iid, 0));
val = nir_ffma(b, nir_channel(b, bary, 0),
nir_channel(b, iid, 2),
val);
nir_channel(b, iid, 2),
val);
comps[i] = val;
}
@ -126,6 +126,6 @@ nir_lower_interpolation(nir_shader *shader, nir_lower_interpolation_options opti
{
return nir_shader_instructions_pass(shader, nir_lower_interpolation_instr,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
&options);
}

228
src/compiler/nir/nir_lower_io.c
View file

@ -45,8 +45,10 @@ static nir_intrinsic_op
ssbo_atomic_for_deref(nir_intrinsic_op deref_op)
{
switch (deref_op) {
case nir_intrinsic_deref_atomic: return nir_intrinsic_ssbo_atomic;
case nir_intrinsic_deref_atomic_swap: return nir_intrinsic_ssbo_atomic_swap;
case nir_intrinsic_deref_atomic:
return nir_intrinsic_ssbo_atomic;
case nir_intrinsic_deref_atomic_swap:
return nir_intrinsic_ssbo_atomic_swap;
default:
unreachable("Invalid SSBO atomic");
}
@ -78,8 +80,10 @@ static nir_intrinsic_op
shared_atomic_for_deref(nir_intrinsic_op deref_op)
{
switch (deref_op) {
case nir_intrinsic_deref_atomic: return nir_intrinsic_shared_atomic;
case nir_intrinsic_deref_atomic_swap: return nir_intrinsic_shared_atomic_swap;
case nir_intrinsic_deref_atomic:
return nir_intrinsic_shared_atomic;
case nir_intrinsic_deref_atomic_swap:
return nir_intrinsic_shared_atomic_swap;
default:
unreachable("Invalid shared atomic");
}
@ -154,8 +158,9 @@ nir_is_arrayed_io(const nir_variable *var, gl_shader_stage stage)
return false;
}
static unsigned get_number_of_slots(struct lower_io_state *state,
const nir_variable *var)
static unsigned
get_number_of_slots(struct lower_io_state *state,
const nir_variable *var)
{
const struct glsl_type *type = var->type;
@ -280,14 +285,12 @@ emit_load(struct lower_io_state *state,
op = nir_intrinsic_load_interpolated_input;
}
} else {
op = array_index ? nir_intrinsic_load_per_vertex_input :
nir_intrinsic_load_input;
op = array_index ? nir_intrinsic_load_per_vertex_input : nir_intrinsic_load_input;
}
break;
case nir_var_shader_out:
op = !array_index ? nir_intrinsic_load_output :
var->data.per_primitive ? nir_intrinsic_load_per_primitive_output :
nir_intrinsic_load_per_vertex_output;
op = !array_index ? nir_intrinsic_load_output : var->data.per_primitive ? nir_intrinsic_load_per_primitive_output
: nir_intrinsic_load_per_vertex_output;
break;
case nir_var_uniform:
op = nir_intrinsic_load_uniform;
@ -314,7 +317,7 @@ emit_load(struct lower_io_state *state,
nir_intrinsic_set_dest_type(load, dest_type);
if (load->intrinsic != nir_intrinsic_load_uniform) {
nir_io_semantics semantics = {0};
nir_io_semantics semantics = { 0 };
semantics.location = var->data.location;
semantics.num_slots = get_number_of_slots(state, var);
semantics.fb_fetch_output = var->data.fb_fetch_output;
@ -400,9 +403,8 @@ emit_store(struct lower_io_state *state, nir_ssa_def *data,
assert(var->data.mode == nir_var_shader_out);
nir_intrinsic_op op =
!array_index ? nir_intrinsic_store_output :
var->data.per_primitive ? nir_intrinsic_store_per_primitive_output :
nir_intrinsic_store_per_vertex_output;
!array_index ? nir_intrinsic_store_output : var->data.per_primitive ? nir_intrinsic_store_per_primitive_output
: nir_intrinsic_store_per_vertex_output;
nir_intrinsic_instr *store =
nir_intrinsic_instr_create(state->builder.shader, op);
@ -436,7 +438,7 @@ emit_store(struct lower_io_state *state, nir_ssa_def *data,
}
}
nir_io_semantics semantics = {0};
nir_io_semantics semantics = { 0 };
semantics.location = var->data.location;
semantics.num_slots = get_number_of_slots(state, var);
semantics.dual_source_blend_index = var->data.index;
@ -565,7 +567,7 @@ lower_interpolate_at(nir_intrinsic_instr *intrin, struct lower_io_state *state,
nir_builder_instr_insert(b, &bary_setup->instr);
nir_io_semantics semantics = {0};
nir_io_semantics semantics = { 0 };
semantics.location = var->data.location;
semantics.num_slots = get_number_of_slots(state, var);
semantics.medium_precision =
@ -636,30 +638,30 @@ nir_lower_io_block(nir_block *block,
var->data.mode == nir_var_shader_out ||
var->data.bindless;
if (nir_deref_instr_is_known_out_of_bounds(deref)) {
/* Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:
*
* In the subsections described above for array, vector, matrix and
* structure accesses, any out-of-bounds access produced undefined
* behavior....
* Out-of-bounds reads return undefined values, which
* include values from other variables of the active program or zero.
* Out-of-bounds writes may be discarded or overwrite
* other variables of the active program.
*
* GL_KHR_robustness and GL_ARB_robustness encourage us to return zero
* for reads.
*
* Otherwise get_io_offset would return out-of-bound offset which may
* result in out-of-bound loading/storing of inputs/outputs,
* that could cause issues in drivers down the line.
*/
if (nir_deref_instr_is_known_out_of_bounds(deref)) {
/* Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:
*
* In the subsections described above for array, vector, matrix and
* structure accesses, any out-of-bounds access produced undefined
* behavior....
* Out-of-bounds reads return undefined values, which
* include values from other variables of the active program or zero.
* Out-of-bounds writes may be discarded or overwrite
* other variables of the active program.
*
* GL_KHR_robustness and GL_ARB_robustness encourage us to return zero
* for reads.
*
* Otherwise get_io_offset would return out-of-bound offset which may
* result in out-of-bound loading/storing of inputs/outputs,
* that could cause issues in drivers down the line.
*/
if (intrin->intrinsic != nir_intrinsic_store_deref) {
nir_ssa_def *zero =
nir_imm_zero(b, intrin->dest.ssa.num_components,
intrin->dest.ssa.bit_size);
intrin->dest.ssa.bit_size);
nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
zero);
zero);
}
nir_instr_remove(&intrin->instr);
@ -939,7 +941,7 @@ build_addr_for_var(nir_builder *b, nir_variable *var,
case nir_var_mem_global:
return nir_iadd_imm(b, nir_load_global_base_ptr(b, num_comps, bit_size),
var->data.driver_location);
var->data.driver_location);
default:
unreachable("Unsupported variable mode");
@ -971,7 +973,7 @@ build_runtime_addr_mode_check(nir_builder *b, nir_ssa_def *addr,
case nir_var_mem_global:
return nir_ior(b, nir_ieq_imm(b, mode_enum, 0x0),
nir_ieq_imm(b, mode_enum, 0x3));
nir_ieq_imm(b, mode_enum, 0x3));
default:
unreachable("Invalid mode check intrinsic");
@ -987,18 +989,30 @@ unsigned
nir_address_format_bit_size(nir_address_format addr_format)
{
switch (addr_format) {
case nir_address_format_32bit_global: return 32;
case nir_address_format_2x32bit_global: return 32;
case nir_address_format_64bit_global: return 64;
case nir_address_format_64bit_global_32bit_offset: return 32;
case nir_address_format_64bit_bounded_global: return 32;
case nir_address_format_32bit_index_offset: return 32;
case nir_address_format_32bit_index_offset_pack64: return 64;
case nir_address_format_vec2_index_32bit_offset: return 32;
case nir_address_format_62bit_generic: return 64;
case nir_address_format_32bit_offset: return 32;
case nir_address_format_32bit_offset_as_64bit: return 64;
case nir_address_format_logical: return 32;
case nir_address_format_32bit_global:
return 32;
case nir_address_format_2x32bit_global:
return 32;
case nir_address_format_64bit_global:
return 64;
case nir_address_format_64bit_global_32bit_offset:
return 32;
case nir_address_format_64bit_bounded_global:
return 32;
case nir_address_format_32bit_index_offset:
return 32;
case nir_address_format_32bit_index_offset_pack64:
return 64;
case nir_address_format_vec2_index_32bit_offset:
return 32;
case nir_address_format_62bit_generic:
return 64;
case nir_address_format_32bit_offset:
return 32;
case nir_address_format_32bit_offset_as_64bit:
return 64;
case nir_address_format_logical:
return 32;
}
unreachable("Invalid address format");
}
@ -1007,18 +1021,30 @@ unsigned
nir_address_format_num_components(nir_address_format addr_format)
{
switch (addr_format) {
case nir_address_format_32bit_global: return 1;
case nir_address_format_2x32bit_global: return 2;
case nir_address_format_64bit_global: return 1;
case nir_address_format_64bit_global_32bit_offset: return 4;
case nir_address_format_64bit_bounded_global: return 4;
case nir_address_format_32bit_index_offset: return 2;
case nir_address_format_32bit_index_offset_pack64: return 1;
case nir_address_format_vec2_index_32bit_offset: return 3;
case nir_address_format_62bit_generic: return 1;
case nir_address_format_32bit_offset: return 1;
case nir_address_format_32bit_offset_as_64bit: return 1;
case nir_address_format_logical: return 1;
case nir_address_format_32bit_global:
return 1;
case nir_address_format_2x32bit_global:
return 2;
case nir_address_format_64bit_global:
return 1;
case nir_address_format_64bit_global_32bit_offset:
return 4;
case nir_address_format_64bit_bounded_global:
return 4;
case nir_address_format_32bit_index_offset:
return 2;
case nir_address_format_32bit_index_offset_pack64:
return 1;
case nir_address_format_vec2_index_32bit_offset:
return 3;
case nir_address_format_62bit_generic:
return 1;
case nir_address_format_32bit_offset:
return 1;
case nir_address_format_32bit_offset_as_64bit:
return 1;
case nir_address_format_logical:
return 1;
}
unreachable("Invalid address format");
}
@ -1036,7 +1062,8 @@ addr_to_index(nir_builder *b, nir_ssa_def *addr,
case nir_address_format_vec2_index_32bit_offset:
assert(addr->num_components == 3);
return nir_trim_vector(b, addr, 2);
default: unreachable("Invalid address format");
default:
unreachable("Invalid address format");
}
}
@ -1108,7 +1135,7 @@ addr_to_global(nir_builder *b, nir_ssa_def *addr,
case nir_address_format_64bit_bounded_global:
assert(addr->num_components == 4);
return nir_iadd(b, nir_pack_64_2x32(b, nir_trim_vector(b, addr, 2)),
nir_u2u64(b, nir_channel(b, addr, 3)));
nir_u2u64(b, nir_channel(b, addr, 3)));
case nir_address_format_32bit_index_offset:
case nir_address_format_32bit_index_offset_pack64:
@ -1136,7 +1163,7 @@ addr_is_in_bounds(nir_builder *b, nir_ssa_def *addr,
assert(addr->num_components == 4);
assert(size > 0);
return nir_ult(b, nir_iadd_imm(b, nir_channel(b, addr, 3), size - 1),
nir_channel(b, addr, 2));
nir_channel(b, addr, 2));
}
static void
@ -1798,7 +1825,7 @@ build_explicit_io_atomic(nir_builder *b, nir_intrinsic_instr *intrin,
nir_pop_if(b, NULL);
return nir_if_phi(b, &atomic->dest.ssa,
nir_ssa_undef(b, 1, atomic->dest.ssa.bit_size));
nir_ssa_undef(b, 1, atomic->dest.ssa.bit_size));
} else {
nir_builder_instr_insert(b, &atomic->instr);
return &atomic->dest.ssa;
@ -1887,7 +1914,9 @@ nir_lower_explicit_io_instr(nir_builder *b,
case nir_intrinsic_load_deref: {
nir_ssa_def *value;
if (vec_stride > scalar_size) {
nir_ssa_def *comps[NIR_MAX_VEC_COMPONENTS] = { NULL, };
nir_ssa_def *comps[NIR_MAX_VEC_COMPONENTS] = {
NULL,
};
for (unsigned i = 0; i < intrin->num_components; i++) {
unsigned comp_offset = i * vec_stride;
nir_ssa_def *comp_addr = nir_build_addr_iadd_imm(b, addr, addr_format,
@ -2137,7 +2166,7 @@ lower_explicit_io_array_length(nir_builder *b, nir_intrinsic_instr *intrin,
offset = addr_to_offset(b, addr, addr_format);
nir_ssa_def *index = addr_to_index(b, addr, addr_format);
unsigned access = nir_intrinsic_access(intrin);
size = nir_get_ssbo_size(b, index, .access=access);
size = nir_get_ssbo_size(b, index, .access = access);
break;
}
@ -2360,9 +2389,9 @@ nir_lower_vars_to_explicit_types_impl(nir_function_impl *impl,
if (progress) {
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance |
nir_metadata_live_ssa_defs |
nir_metadata_loop_analysis);
nir_metadata_dominance |
nir_metadata_live_ssa_defs |
nir_metadata_loop_analysis);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}
@ -2685,18 +2714,18 @@ const nir_const_value *
nir_address_format_null_value(nir_address_format addr_format)
{
const static nir_const_value null_values[][NIR_MAX_VEC_COMPONENTS] = {
[nir_address_format_32bit_global] = {{0}},
[nir_address_format_2x32bit_global] = {{0}},
[nir_address_format_64bit_global] = {{0}},
[nir_address_format_64bit_global_32bit_offset] = {{0}},
[nir_address_format_64bit_bounded_global] = {{0}},
[nir_address_format_32bit_index_offset] = {{.u32 = ~0}, {.u32 = ~0}},
[nir_address_format_32bit_index_offset_pack64] = {{.u64 = ~0ull}},
[nir_address_format_vec2_index_32bit_offset] = {{.u32 = ~0}, {.u32 = ~0}, {.u32 = ~0}},
[nir_address_format_32bit_offset] = {{.u32 = ~0}},
[nir_address_format_32bit_offset_as_64bit] = {{.u64 = ~0ull}},
[nir_address_format_62bit_generic] = {{.u64 = 0}},
[nir_address_format_logical] = {{.u32 = ~0}},
[nir_address_format_32bit_global] = { { 0 } },
[nir_address_format_2x32bit_global] = { { 0 } },
[nir_address_format_64bit_global] = { { 0 } },
[nir_address_format_64bit_global_32bit_offset] = { { 0 } },
[nir_address_format_64bit_bounded_global] = { { 0 } },
[nir_address_format_32bit_index_offset] = { { .u32 = ~0 }, { .u32 = ~0 } },
[nir_address_format_32bit_index_offset_pack64] = { { .u64 = ~0ull } },
[nir_address_format_vec2_index_32bit_offset] = { { .u32 = ~0 }, { .u32 = ~0 }, { .u32 = ~0 } },
[nir_address_format_32bit_offset] = { { .u32 = ~0 } },
[nir_address_format_32bit_offset_as_64bit] = { { .u64 = ~0ull } },
[nir_address_format_62bit_generic] = { { .u64 = 0 } },
[nir_address_format_logical] = { { .u32 = ~0 } },
};
assert(addr_format < ARRAY_SIZE(null_values));
@ -2720,7 +2749,7 @@ nir_build_addr_ieq(nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
case nir_address_format_64bit_global_32bit_offset:
return nir_ball_iequal(b, nir_channels(b, addr0, 0xb),
nir_channels(b, addr1, 0xb));
nir_channels(b, addr1, 0xb));
case nir_address_format_32bit_offset_as_64bit:
assert(addr0->num_components == 1 && addr1->num_components == 1);
@ -2753,7 +2782,7 @@ nir_build_addr_isub(nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
case nir_address_format_2x32bit_global:
return nir_isub(b, addr_to_global(b, addr0, addr_format),
addr_to_global(b, addr1, addr_format));
addr_to_global(b, addr1, addr_format));
case nir_address_format_32bit_offset_as_64bit:
assert(addr0->num_components == 1);
@ -2763,7 +2792,7 @@ nir_build_addr_isub(nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
case nir_address_format_64bit_global_32bit_offset:
case nir_address_format_64bit_bounded_global:
return nir_isub(b, addr_to_global(b, addr0, addr_format),
addr_to_global(b, addr1, addr_format));
addr_to_global(b, addr1, addr_format));
case nir_address_format_32bit_index_offset:
assert(addr0->num_components == 2);
@ -2805,7 +2834,8 @@ is_output(nir_intrinsic_instr *intrin)
intrin->intrinsic == nir_intrinsic_store_per_primitive_output;
}
static bool is_dual_slot(nir_intrinsic_instr *intrin)
static bool
is_dual_slot(nir_intrinsic_instr *intrin)
{
if (intrin->intrinsic == nir_intrinsic_store_output ||
intrin->intrinsic == nir_intrinsic_store_per_vertex_output ||
@ -2903,8 +2933,8 @@ nir_lower_color_inputs(nir_shader *nir)
nir_builder b = nir_builder_create(impl);
nir_foreach_block (block, impl) {
nir_foreach_instr_safe (instr, block) {
nir_foreach_block(block, impl) {
nir_foreach_instr_safe(instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
@ -2969,7 +2999,7 @@ nir_lower_color_inputs(nir_shader *nir)
if (progress) {
nir_metadata_preserve(impl, nir_metadata_dominance |
nir_metadata_block_index);
nir_metadata_block_index);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}
@ -2985,8 +3015,8 @@ nir_io_add_intrinsic_xfb_info(nir_shader *nir)
for (unsigned i = 0; i < NIR_MAX_XFB_BUFFERS; i++)
nir->info.xfb_stride[i] = nir->xfb_info->buffers[i].stride / 4;
nir_foreach_block (block, impl) {
nir_foreach_instr_safe (instr, block) {
nir_foreach_block(block, impl) {
nir_foreach_instr_safe(instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
@ -3007,8 +3037,7 @@ nir_io_add_intrinsic_xfb_info(nir_shader *nir)
continue;
nir_io_semantics sem = nir_intrinsic_io_semantics(intr);
unsigned writemask = nir_intrinsic_write_mask(intr) <<
nir_intrinsic_component(intr);
unsigned writemask = nir_intrinsic_write_mask(intr) << nir_intrinsic_component(intr);
nir_io_xfb xfb[2];
memset(xfb, 0, sizeof(xfb));
@ -3113,13 +3142,14 @@ nir_lower_io_passes(nir_shader *nir, bool renumber_vs_inputs)
*/
NIR_PASS_V(nir, nir_recompute_io_bases,
(nir->info.stage != MESA_SHADER_VERTEX ||
renumber_vs_inputs ? nir_var_shader_in : 0) |
nir_var_shader_out);
renumber_vs_inputs
? nir_var_shader_in
: 0) |
nir_var_shader_out);
/* nir_io_add_const_offset_to_base needs actual constants. */
NIR_PASS_V(nir, nir_opt_constant_folding);
NIR_PASS_V(nir, nir_io_add_const_offset_to_base, nir_var_shader_in |
nir_var_shader_out);
NIR_PASS_V(nir, nir_io_add_const_offset_to_base, nir_var_shader_in | nir_var_shader_out);
/* Lower and remove dead derefs and variables to clean up the IR. */
NIR_PASS_V(nir, nir_lower_vars_to_ssa);

62
src/compiler/nir/nir_lower_io_arrays_to_elements.c
View file

@ -63,11 +63,9 @@ get_io_offset(nir_builder *b, nir_deref_instr *deref, nir_variable *var,
*xfb_offset += index * glsl_get_component_slots((*p)->type) * 4;
unsigned num_elements = glsl_type_is_array((*p)->type) ?
glsl_get_aoa_size((*p)->type) : 1;
unsigned num_elements = glsl_type_is_array((*p)->type) ? glsl_get_aoa_size((*p)->type) : 1;
num_elements *= glsl_type_is_matrix(glsl_without_array((*p)->type)) ?
glsl_get_matrix_columns(glsl_without_array((*p)->type)) : 1;
num_elements *= glsl_type_is_matrix(glsl_without_array((*p)->type)) ? glsl_get_matrix_columns(glsl_without_array((*p)->type)) : 1;
*element_index += num_elements * index;
} else if ((*p)->deref_type == nir_deref_type_struct) {
@ -94,16 +92,14 @@ get_array_elements(struct hash_table *ht, nir_variable *var,
type = glsl_get_array_element(type);
}
unsigned num_elements = glsl_type_is_array(type) ?
glsl_get_aoa_size(type) : 1;
unsigned num_elements = glsl_type_is_array(type) ? glsl_get_aoa_size(type) : 1;
num_elements *= glsl_type_is_matrix(glsl_without_array(type)) ?
glsl_get_matrix_columns(glsl_without_array(type)) : 1;
num_elements *= glsl_type_is_matrix(glsl_without_array(type)) ? glsl_get_matrix_columns(glsl_without_array(type)) : 1;
elements = (nir_variable **) calloc(num_elements, sizeof(nir_variable *));
elements = (nir_variable **)calloc(num_elements, sizeof(nir_variable *));
_mesa_hash_table_insert(ht, var, elements);
} else {
elements = (nir_variable **) entry->data;
elements = (nir_variable **)entry->data;
}
return elements;
@ -139,27 +135,27 @@ lower_array(nir_builder *b, nir_intrinsic_instr *intr, nir_variable *var,
nir_variable *element = elements[elements_index];
if (!element) {
element = nir_variable_clone(var, b->shader);
element->data.location = var->data.location + io_offset;
element = nir_variable_clone(var, b->shader);
element->data.location = var->data.location + io_offset;
if (var->data.explicit_offset)
element->data.offset = var->data.offset + xfb_offset;
if (var->data.explicit_offset)
element->data.offset = var->data.offset + xfb_offset;
const struct glsl_type *type = glsl_without_array(element->type);
const struct glsl_type *type = glsl_without_array(element->type);
/* This pass also splits matrices so we need give them a new type. */
if (glsl_type_is_matrix(type))
type = glsl_get_column_type(type);
/* This pass also splits matrices so we need give them a new type. */
if (glsl_type_is_matrix(type))
type = glsl_get_column_type(type);
if (nir_is_arrayed_io(var, b->shader->info.stage)) {
type = glsl_array_type(type, glsl_get_length(element->type),
glsl_get_explicit_stride(element->type));
}
if (nir_is_arrayed_io(var, b->shader->info.stage)) {
type = glsl_array_type(type, glsl_get_length(element->type),
glsl_get_explicit_stride(element->type));
}
element->type = type;
elements[elements_index] = element;
element->type = type;
elements[elements_index] = element;
nir_shader_add_variable(b->shader, element);
nir_shader_add_variable(b->shader, element);
}
nir_deref_instr *element_deref = nir_build_deref_var(b, element);
@ -263,7 +259,7 @@ create_indirects_mask(nir_shader *shader,
nir_deref_path_finish(&path);
}
}
}
}
}
static void
@ -321,7 +317,7 @@ lower_io_arrays_to_elements(nir_shader *shader, nir_variable_mode mask,
*
* TODO: Add support for struct splitting.
*/
if ((!glsl_type_is_array(type) && !glsl_type_is_matrix(type))||
if ((!glsl_type_is_array(type) && !glsl_type_is_matrix(type)) ||
glsl_type_is_struct_or_ifc(glsl_without_array(type)))
continue;
@ -363,7 +359,7 @@ nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
struct hash_table *split_inputs = _mesa_pointer_hash_table_create(NULL);
struct hash_table *split_outputs = _mesa_pointer_hash_table_create(NULL);
BITSET_DECLARE(indirects, 4 * VARYING_SLOT_TESS_MAX) = {0};
BITSET_DECLARE(indirects, 4 * VARYING_SLOT_TESS_MAX) = { 0 };
lower_io_arrays_to_elements(shader, nir_var_shader_out,
indirects, split_outputs, true);
@ -374,7 +370,7 @@ nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
/* Remove old input from the shaders inputs list */
hash_table_foreach(split_inputs, entry) {
nir_variable *var = (nir_variable *) entry->key;
nir_variable *var = (nir_variable *)entry->key;
exec_node_remove(&var->node);
free(entry->data);
@ -383,7 +379,7 @@ nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
/* Remove old output from the shaders outputs list */
hash_table_foreach(split_outputs, entry) {
nir_variable *var = (nir_variable *) entry->key;
nir_variable *var = (nir_variable *)entry->key;
exec_node_remove(&var->node);
free(entry->data);
@ -401,7 +397,7 @@ nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer)
struct hash_table *split_inputs = _mesa_pointer_hash_table_create(NULL);
struct hash_table *split_outputs = _mesa_pointer_hash_table_create(NULL);
BITSET_DECLARE(indirects, 4 * VARYING_SLOT_TESS_MAX) = {0};
BITSET_DECLARE(indirects, 4 * VARYING_SLOT_TESS_MAX) = { 0 };
create_indirects_mask(producer, indirects, nir_var_shader_out);
create_indirects_mask(consumer, indirects, nir_var_shader_in);
@ -414,7 +410,7 @@ nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer)
/* Remove old input from the shaders inputs list */
hash_table_foreach(split_inputs, entry) {
nir_variable *var = (nir_variable *) entry->key;
nir_variable *var = (nir_variable *)entry->key;
exec_node_remove(&var->node);
free(entry->data);
@ -422,7 +418,7 @@ nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer)
/* Remove old output from the shaders outputs list */
hash_table_foreach(split_outputs, entry) {
nir_variable *var = (nir_variable *) entry->key;
nir_variable *var = (nir_variable *)entry->key;
exec_node_remove(&var->node);
free(entry->data);

31
src/compiler/nir/nir_lower_io_to_scalar.c
View file

@ -98,7 +98,8 @@ lower_load_to_scalar(nir_builder *b, nir_intrinsic_instr *intr)
nir_intrinsic_set_align_offset(chan_intr,
(nir_intrinsic_align_offset(intr) +
i * (intr->dest.ssa.bit_size / 8)) % nir_intrinsic_align_mul(intr));
i * (intr->dest.ssa.bit_size / 8)) %
nir_intrinsic_align_mul(intr));
nir_intrinsic_set_align_mul(chan_intr, nir_intrinsic_align_mul(intr));
if (nir_intrinsic_has_access(intr))
nir_intrinsic_set_access(chan_intr, nir_intrinsic_access(intr));
@ -154,14 +155,13 @@ lower_store_output_to_scalar(nir_builder *b, nir_intrinsic_instr *intr)
unsigned component = nir_intrinsic_component(chan_intr);
for (unsigned c = 0; c <= component; c++) {
nir_io_xfb xfb = c < 2 ? nir_intrinsic_io_xfb(intr) :
nir_intrinsic_io_xfb2(intr);
nir_io_xfb xfb = c < 2 ? nir_intrinsic_io_xfb(intr) : nir_intrinsic_io_xfb2(intr);
if (component < c + xfb.out[c % 2].num_components) {
nir_io_xfb scalar_xfb;
memset(&scalar_xfb, 0, sizeof(scalar_xfb));
scalar_xfb.out[component % 2].num_components = is_64bit ? 2 : 1;
scalar_xfb.out[component % 2].num_components = is_64bit ? 2 : 1;
scalar_xfb.out[component % 2].buffer = xfb.out[c % 2].buffer;
scalar_xfb.out[component % 2].offset = xfb.out[c % 2].offset +
component - c;
@ -209,7 +209,8 @@ lower_store_to_scalar(nir_builder *b, nir_intrinsic_instr *intr)
nir_intrinsic_set_write_mask(chan_intr, 0x1);
nir_intrinsic_set_align_offset(chan_intr,
(nir_intrinsic_align_offset(intr) +
i * (value->bit_size / 8)) % nir_intrinsic_align_mul(intr));
i * (value->bit_size / 8)) %
nir_intrinsic_align_mul(intr));
nir_intrinsic_set_align_mul(chan_intr, nir_intrinsic_align_mul(intr));
if (nir_intrinsic_has_access(intr))
nir_intrinsic_set_access(chan_intr, nir_intrinsic_access(intr));
@ -261,8 +262,8 @@ nir_lower_io_to_scalar_instr(nir_builder *b, nir_instr *instr, void *data)
if ((intr->intrinsic == nir_intrinsic_load_output ||
intr->intrinsic == nir_intrinsic_load_per_vertex_output) &&
(state->mask & nir_var_shader_out) &&
(!state->filter || state->filter(instr, state->filter_data))) {
(state->mask & nir_var_shader_out) &&
(!state->filter || state->filter(instr, state->filter_data))) {
lower_load_input_to_scalar(b, intr);
return true;
}
@ -306,7 +307,7 @@ nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask, nir_instr_fil
return nir_shader_instructions_pass(shader,
nir_lower_io_to_scalar_instr,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
&state);
}
@ -316,10 +317,10 @@ get_channel_variables(struct hash_table *ht, nir_variable *var)
nir_variable **chan_vars;
struct hash_entry *entry = _mesa_hash_table_search(ht, var);
if (!entry) {
chan_vars = (nir_variable **) calloc(4, sizeof(nir_variable *));
chan_vars = (nir_variable **)calloc(4, sizeof(nir_variable *));
_mesa_hash_table_insert(ht, var, chan_vars);
} else {
chan_vars = (nir_variable **) entry->data;
chan_vars = (nir_variable **)entry->data;
}
return chan_vars;
@ -369,7 +370,7 @@ lower_load_to_scalar_early(nir_builder *b, nir_intrinsic_instr *intr,
nir_variable *chan_var = chan_vars[var->data.location_frac + i];
if (!chan_vars[var->data.location_frac + i]) {
chan_var = nir_variable_clone(var, b->shader);
chan_var->data.location_frac = var->data.location_frac + i;
chan_var->data.location_frac = var->data.location_frac + i;
chan_var->type = glsl_channel_type(chan_var->type);
chan_vars[var->data.location_frac + i] = chan_var;
@ -423,7 +424,7 @@ lower_store_output_to_scalar_early(nir_builder *b, nir_intrinsic_instr *intr,
nir_variable *chan_var = chan_vars[var->data.location_frac + i];
if (!chan_vars[var->data.location_frac + i]) {
chan_var = nir_variable_clone(var, b->shader);
chan_var->data.location_frac = var->data.location_frac + i;
chan_var->data.location_frac = var->data.location_frac + i;
chan_var->type = glsl_channel_type(chan_var->type);
chan_vars[var->data.location_frac + i] = chan_var;
@ -555,12 +556,12 @@ nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask)
bool progress = nir_shader_instructions_pass(shader,
nir_lower_io_to_scalar_early_instr,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
&state);
/* Remove old input from the shaders inputs list */
hash_table_foreach(state.split_inputs, entry) {
nir_variable *var = (nir_variable *) entry->key;
nir_variable *var = (nir_variable *)entry->key;
exec_node_remove(&var->node);
free(entry->data);
@ -568,7 +569,7 @@ nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask)
/* Remove old output from the shaders outputs list */
hash_table_foreach(state.split_outputs, entry) {
nir_variable *var = (nir_variable *) entry->key;
nir_variable *var = (nir_variable *)entry->key;
exec_node_remove(&var->node);
free(entry->data);

4
src/compiler/nir/nir_lower_io_to_temporaries.c
View file

@ -261,7 +261,7 @@ fixup_interpolation(struct lower_io_state *state, nir_function_impl *impl,
continue;
nir_intrinsic_instr *interp = nir_instr_as_intrinsic(instr);
if (interp->intrinsic == nir_intrinsic_interp_deref_at_centroid ||
interp->intrinsic == nir_intrinsic_interp_deref_at_sample ||
interp->intrinsic == nir_intrinsic_interp_deref_at_offset ||
@ -368,7 +368,7 @@ nir_lower_io_to_temporaries(nir_shader *shader, nir_function_impl *entrypoint,
emit_output_copies_impl(&state, impl);
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
}
exec_list_append(&shader->variables, &state.old_inputs);

32
src/compiler/nir/nir_lower_io_to_vector.c
View file

@ -21,10 +21,10 @@
* IN THE SOFTWARE.
*/
#include "util/u_dynarray.h"
#include "nir.h"
#include "nir_builder.h"
#include "nir_deref.h"
#include "util/u_dynarray.h"
/** @file nir_lower_io_to_vector.c
*
@ -37,7 +37,7 @@
/* FRAG_RESULT_MAX+1 instead of just FRAG_RESULT_MAX because of how this pass
* handles dual source blending */
#define MAX_SLOTS MAX2(VARYING_SLOT_TESS_MAX, FRAG_RESULT_MAX+1)
#define MAX_SLOTS MAX2(VARYING_SLOT_TESS_MAX, FRAG_RESULT_MAX + 1)
static unsigned
get_slot(const nir_variable *var)
@ -214,7 +214,7 @@ create_new_io_vars(nir_shader *shader, nir_variable_mode mode,
bool flat_vars[MAX_SLOTS],
struct util_dynarray *demote_vars)
{
nir_variable *old_vars[MAX_SLOTS][4] = {{0}};
nir_variable *old_vars[MAX_SLOTS][4] = { { 0 } };
bool has_io_var = false;
nir_foreach_variable_with_modes(var, shader, mode) {
@ -344,7 +344,7 @@ build_array_index(nir_builder *b, nir_deref_instr *deref, nir_ssa_def *base,
return base;
case nir_deref_type_array: {
nir_ssa_def *index = nir_i2iN(b, deref->arr.index.ssa,
deref->dest.ssa.bit_size);
deref->dest.ssa.bit_size);
if (nir_deref_instr_parent(deref)->deref_type == nir_deref_type_var &&
per_vertex)
@ -385,7 +385,7 @@ build_array_deref_of_new_var_flat(nir_shader *shader,
bool vs_in = shader->info.stage == MESA_SHADER_VERTEX &&
new_var->data.mode == nir_var_shader_in;
return nir_build_deref_array(b, deref,
build_array_index(b, leader, nir_imm_int(b, base), vs_in, per_vertex));
build_array_index(b, leader, nir_imm_int(b, base), vs_in, per_vertex));
}
ASSERTED static bool
@ -419,10 +419,10 @@ nir_lower_io_to_vector_impl(nir_function_impl *impl, nir_variable_mode modes)
util_dynarray_init(&demote_vars, NULL);
nir_shader *shader = impl->function->shader;
nir_variable *new_inputs[MAX_SLOTS][4] = {{0}};
nir_variable *new_outputs[MAX_SLOTS][4] = {{0}};
bool flat_inputs[MAX_SLOTS] = {0};
bool flat_outputs[MAX_SLOTS] = {0};
nir_variable *new_inputs[MAX_SLOTS][4] = { { 0 } };
nir_variable *new_outputs[MAX_SLOTS][4] = { { 0 } };
bool flat_inputs[MAX_SLOTS] = { 0 };
bool flat_outputs[MAX_SLOTS] = { 0 };
if (modes & nir_var_shader_in) {
/* Vertex shaders support overlapping inputs. We don't do those */
@ -480,11 +480,8 @@ nir_lower_io_to_vector_impl(nir_function_impl *impl, nir_variable_mode modes)
const unsigned loc = get_slot(old_var);
const unsigned old_frac = old_var->data.location_frac;
nir_variable *new_var = old_var->data.mode == nir_var_shader_in ?
new_inputs[loc][old_frac] :
new_outputs[loc][old_frac];
bool flat = old_var->data.mode == nir_var_shader_in ?
flat_inputs[loc] : flat_outputs[loc];
nir_variable *new_var = old_var->data.mode == nir_var_shader_in ? new_inputs[loc][old_frac] : new_outputs[loc][old_frac];
bool flat = old_var->data.mode == nir_var_shader_in ? flat_inputs[loc] : flat_outputs[loc];
if (!new_var)
break;
@ -568,10 +565,11 @@ nir_lower_io_to_vector_impl(nir_function_impl *impl, nir_variable_mode modes)
if (new_frac + c >= old_frac &&
(old_wrmask & 1 << (new_frac + c - old_frac))) {
comps[c] = nir_get_ssa_scalar(old_value,
new_frac + c - old_frac);
new_frac + c - old_frac);
} else {
comps[c] = nir_get_ssa_scalar(nir_ssa_undef(&b, old_value->num_components,
old_value->bit_size), 0);
old_value->bit_size),
0);
}
}
nir_ssa_def *new_value = nir_vec_scalars(&b, comps, intrin->num_components);
@ -602,7 +600,7 @@ nir_lower_io_to_vector_impl(nir_function_impl *impl, nir_variable_mode modes)
if (progress) {
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
}
return progress;

10
src/compiler/nir/nir_lower_is_helper_invocation.c
View file

@ -46,7 +46,7 @@ nir_lower_load_and_store_is_helper(nir_builder *b, nir_instr *instr, void *data)
return false;
nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
nir_deref_instr *is_helper_deref = (nir_deref_instr*) data;
nir_deref_instr *is_helper_deref = (nir_deref_instr *)data;
switch (intrin->intrinsic) {
case nir_intrinsic_demote: {
@ -106,12 +106,10 @@ nir_lower_is_helper_invocation(nir_shader *shader)
nir_builder b = nir_builder_at(nir_before_cf_list(&entrypoint->body));
nir_variable *is_helper = nir_local_variable_create(entrypoint,
glsl_bool_type(),
"gl_IsHelperInvocationEXT");
glsl_bool_type(),
"gl_IsHelperInvocationEXT");
nir_ssa_def *started_as_helper = shader->options->lower_helper_invocation ?
nir_build_lowered_load_helper_invocation(&b) :
nir_load_helper_invocation(&b, 1);
nir_ssa_def *started_as_helper = shader->options->lower_helper_invocation ? nir_build_lowered_load_helper_invocation(&b) : nir_load_helper_invocation(&b, 1);
nir_deref_instr *is_helper_deref = nir_build_deref_var(&b, is_helper);
nir_store_deref(&b, is_helper_deref, started_as_helper, 1);

2
src/compiler/nir/nir_lower_load_const_to_scalar.c
View file

@ -77,7 +77,7 @@ nir_lower_load_const_to_scalar_impl(nir_function_impl *impl)
if (progress) {
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}

6
src/compiler/nir/nir_lower_locals_to_regs.c
View file

@ -152,7 +152,7 @@ get_deref_reg_location(nir_deref_instr *deref,
* handle this case we just convert it to a direct reference.
*/
if (nir_intrinsic_num_array_elems(decl) == 0)
return (struct reg_location){.reg = reg};
return (struct reg_location){ .reg = reg };
nir_ssa_def *indirect = NULL;
unsigned base_offset = 0;
@ -262,7 +262,7 @@ lower_locals_to_regs_block(nir_block *block,
.write_mask = write_mask);
} else {
nir_build_store_reg(b, val, loc.reg, .base = loc.base_offset,
.write_mask = write_mask);
.write_mask = write_mask);
}
nir_instr_remove(&intrin->instr);
@ -299,7 +299,7 @@ impl(nir_function_impl *impl, uint8_t bool_bitsize)
}
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
_mesa_hash_table_destroy(state.regs_table, NULL);

58
src/compiler/nir/nir_lower_mediump.c
View file

@ -72,8 +72,8 @@ nir_recompute_io_bases(nir_shader *nir, nir_variable_mode modes)
BITSET_ZERO(outputs);
/* Gather the bitmasks of used locations. */
nir_foreach_block_safe (block, impl) {
nir_foreach_instr_safe (instr, block) {
nir_foreach_block_safe(block, impl) {
nir_foreach_instr_safe(instr, block) {
nir_variable_mode mode;
nir_intrinsic_instr *intr = get_io_intrinsic(instr, modes, &mode);
if (!intr)
@ -97,8 +97,8 @@ nir_recompute_io_bases(nir_shader *nir, nir_variable_mode modes)
/* Renumber bases. */
bool changed = false;
nir_foreach_block_safe (block, impl) {
nir_foreach_instr_safe (instr, block) {
nir_foreach_block_safe(block, impl) {
nir_foreach_instr_safe(instr, block) {
nir_variable_mode mode;
nir_intrinsic_instr *intr = get_io_intrinsic(instr, modes, &mode);
if (!intr)
@ -125,7 +125,7 @@ nir_recompute_io_bases(nir_shader *nir, nir_variable_mode modes)
if (changed) {
nir_metadata_preserve(impl, nir_metadata_dominance |
nir_metadata_block_index);
nir_metadata_block_index);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}
@ -156,8 +156,8 @@ nir_lower_mediump_io(nir_shader *nir, nir_variable_mode modes,
nir_builder b = nir_builder_create(impl);
nir_foreach_block_safe (block, impl) {
nir_foreach_instr_safe (instr, block) {
nir_foreach_block_safe(block, impl) {
nir_foreach_instr_safe(instr, block) {
nir_variable_mode mode;
nir_intrinsic_instr *intr = get_io_intrinsic(instr, modes, &mode);
if (!intr)
@ -171,7 +171,7 @@ nir_lower_mediump_io(nir_shader *nir, nir_variable_mode modes,
mode == nir_var_shader_out);
if (is_varying && sem.location <= VARYING_SLOT_VAR31 &&
!(varying_mask & BITFIELD64_BIT(sem.location))) {
!(varying_mask & BITFIELD64_BIT(sem.location))) {
continue; /* can't lower */
}
@ -265,7 +265,7 @@ nir_lower_mediump_io(nir_shader *nir, nir_variable_mode modes,
if (changed) {
nir_metadata_preserve(impl, nir_metadata_dominance |
nir_metadata_block_index);
nir_metadata_block_index);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}
@ -286,8 +286,8 @@ nir_force_mediump_io(nir_shader *nir, nir_variable_mode modes,
nir_function_impl *impl = nir_shader_get_entrypoint(nir);
assert(impl);
nir_foreach_block_safe (block, impl) {
nir_foreach_instr_safe (instr, block) {
nir_foreach_block_safe(block, impl) {
nir_foreach_instr_safe(instr, block) {
nir_variable_mode mode;
nir_intrinsic_instr *intr = get_io_intrinsic(instr, modes, &mode);
if (!intr)
@ -316,7 +316,7 @@ nir_force_mediump_io(nir_shader *nir, nir_variable_mode modes,
/* Only accept generic varyings. */
if (sem.location < VARYING_SLOT_VAR0 ||
sem.location > VARYING_SLOT_VAR31)
continue;
continue;
}
sem.medium_precision = 1;
@ -327,7 +327,7 @@ nir_force_mediump_io(nir_shader *nir, nir_variable_mode modes,
if (changed) {
nir_metadata_preserve(impl, nir_metadata_dominance |
nir_metadata_block_index);
nir_metadata_block_index);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}
@ -346,8 +346,8 @@ nir_unpack_16bit_varying_slots(nir_shader *nir, nir_variable_mode modes)
nir_function_impl *impl = nir_shader_get_entrypoint(nir);
assert(impl);
nir_foreach_block_safe (block, impl) {
nir_foreach_instr_safe (instr, block) {
nir_foreach_block_safe(block, impl) {
nir_foreach_instr_safe(instr, block) {
nir_variable_mode mode;
nir_intrinsic_instr *intr = get_io_intrinsic(instr, modes, &mode);
if (!intr)
@ -373,7 +373,7 @@ nir_unpack_16bit_varying_slots(nir_shader *nir, nir_variable_mode modes)
if (changed) {
nir_metadata_preserve(impl, nir_metadata_dominance |
nir_metadata_block_index);
nir_metadata_block_index);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}
@ -541,7 +541,7 @@ nir_lower_mediump_vars_impl(nir_function_impl *impl, nir_variable_mode modes,
if (progress) {
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}
@ -658,8 +658,8 @@ nir_legalize_16bit_sampler_srcs(nir_shader *nir,
nir_builder b = nir_builder_create(impl);
nir_foreach_block_safe (block, impl) {
nir_foreach_instr_safe (instr, block) {
nir_foreach_block_safe(block, impl) {
nir_foreach_instr_safe(instr, block) {
if (instr->type != nir_instr_type_tex)
continue;
@ -700,12 +700,12 @@ nir_legalize_16bit_sampler_srcs(nir_shader *nir,
switch (bit_size) {
case 16:
convert = is_sint ? nir_i2i16 :
is_uint ? nir_u2u16 : nir_f2f16;
convert = is_sint ? nir_i2i16 : is_uint ? nir_u2u16
: nir_f2f16;
break;
case 32:
convert = is_sint ? nir_i2i32 :
is_uint ? nir_u2u32 : nir_f2f32;
convert = is_sint ? nir_i2i32 : is_uint ? nir_u2u32
: nir_f2f32;
break;
default:
assert(!"unexpected bit size");
@ -724,7 +724,7 @@ nir_legalize_16bit_sampler_srcs(nir_shader *nir,
if (changed) {
nir_metadata_preserve(impl, nir_metadata_dominance |
nir_metadata_block_index);
nir_metadata_block_index);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}
@ -745,14 +745,14 @@ static bool
const_is_u16(nir_ssa_scalar scalar)
{
uint64_t value = nir_ssa_scalar_as_uint(scalar);
return value == (uint16_t) value;
return value == (uint16_t)value;
}
static bool
const_is_i16(nir_ssa_scalar scalar)
{
int64_t value = nir_ssa_scalar_as_int(scalar);
return value == (int16_t) value;
return value == (int16_t)value;
}
static bool
@ -920,7 +920,6 @@ fold_16bit_tex_dest(nir_tex_instr *tex, unsigned exec_mode,
return true;
}
static bool
fold_16bit_tex_srcs(nir_builder *b, nir_tex_instr *tex,
struct nir_fold_tex_srcs_options *options)
@ -1059,8 +1058,9 @@ fold_16bit_tex_image(nir_builder *b, nir_instr *instr, void *params)
return progress;
}
bool nir_fold_16bit_tex_image(nir_shader *nir,
struct nir_fold_16bit_tex_image_options *options)
bool
nir_fold_16bit_tex_image(nir_shader *nir,
struct nir_fold_16bit_tex_image_options *options)
{
return nir_shader_instructions_pass(nir,
fold_16bit_tex_image,

37
src/compiler/nir/nir_lower_mem_access_bit_sizes.c
View file

@ -22,9 +22,9 @@
* IN THE SOFTWARE.
*/
#include "nir_builder.h"
#include "util/u_math.h"
#include "util/bitscan.h"
#include "util/u_math.h"
#include "nir_builder.h"
static nir_intrinsic_instr *
dup_mem_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin,
@ -152,7 +152,7 @@ lower_mem_load(nir_builder *b, nir_intrinsic_instr *intrin,
rev_shifted = nir_vec(b, comps, load->dest.ssa.num_components);
shifted = nir_bcsel(b, nir_ieq_imm(b, shift, 0), &load->dest.ssa,
nir_ior(b, shifted, rev_shifted));
nir_ior(b, shifted, rev_shifted));
}
unsigned chunk_bit_size = MIN2(8 << (ffs(chunk_bytes) - 1), bit_size);
@ -225,8 +225,8 @@ lower_mem_load(nir_builder *b, nir_intrinsic_instr *intrin,
static bool
lower_mem_store(nir_builder *b, nir_intrinsic_instr *intrin,
nir_lower_mem_access_bit_sizes_cb mem_access_size_align_cb,
const void *cb_data, bool allow_unaligned_stores_as_atomics)
nir_lower_mem_access_bit_sizes_cb mem_access_size_align_cb,
const void *cb_data, bool allow_unaligned_stores_as_atomics)
{
nir_ssa_def *value = intrin->src[0].ssa;
@ -308,9 +308,7 @@ lower_mem_store(nir_builder *b, nir_intrinsic_instr *intrin,
uint64_t align_mask = requested.align - 1;
nir_ssa_def *chunk_offset = nir_iadd_imm(b, offset, chunk_start);
nir_ssa_def *pad = chunk_align < 4 ?
nir_iand_imm(b, chunk_offset, align_mask) :
nir_imm_intN_t(b, 0, chunk_offset->bit_size);
nir_ssa_def *pad = chunk_align < 4 ? nir_iand_imm(b, chunk_offset, align_mask) : nir_imm_intN_t(b, 0, chunk_offset->bit_size);
chunk_offset = nir_iand_imm(b, chunk_offset, ~align_mask);
unsigned max_pad = chunk_align < requested.align ? requested.align - chunk_align : 0;
@ -342,25 +340,25 @@ lower_mem_store(nir_builder *b, nir_intrinsic_instr *intrin,
switch (intrin->intrinsic) {
case nir_intrinsic_store_ssbo:
nir_ssbo_atomic(b, 32, intrin->src[1].ssa, chunk_offset, iand_mask,
.atomic_op = nir_atomic_op_iand,
.access = nir_intrinsic_access(intrin));
.atomic_op = nir_atomic_op_iand,
.access = nir_intrinsic_access(intrin));
nir_ssbo_atomic(b, 32, intrin->src[1].ssa, chunk_offset, data,
.atomic_op = nir_atomic_op_ior,
.access = nir_intrinsic_access(intrin));
.atomic_op = nir_atomic_op_ior,
.access = nir_intrinsic_access(intrin));
break;
case nir_intrinsic_store_global:
nir_global_atomic(b, 32, chunk_offset, iand_mask,
.atomic_op = nir_atomic_op_iand);
.atomic_op = nir_atomic_op_iand);
nir_global_atomic(b, 32, chunk_offset, data,
.atomic_op = nir_atomic_op_ior);
.atomic_op = nir_atomic_op_ior);
break;
case nir_intrinsic_store_shared:
nir_shared_atomic(b, 32, chunk_offset, iand_mask,
.atomic_op = nir_atomic_op_iand,
.base = nir_intrinsic_base(intrin));
.atomic_op = nir_atomic_op_iand,
.base = nir_intrinsic_base(intrin));
nir_shared_atomic(b, 32, chunk_offset, data,
.atomic_op = nir_atomic_op_ior,
.base = nir_intrinsic_base(intrin));
.atomic_op = nir_atomic_op_ior,
.base = nir_intrinsic_base(intrin));
break;
default:
unreachable("Unsupported unaligned store");
@ -374,7 +372,6 @@ lower_mem_store(nir_builder *b, nir_intrinsic_instr *intrin,
dup_mem_intrinsic(b, intrin, chunk_offset,
align_mul, chunk_align_offset, packed,
requested.num_components, requested.bit_size);
}
BITSET_CLEAR_RANGE(mask, chunk_start, (chunk_start + chunk_bytes - 1));
}
@ -462,6 +459,6 @@ nir_lower_mem_access_bit_sizes(nir_shader *shader,
{
return nir_shader_instructions_pass(shader, lower_mem_access_instr,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
(void *)options);
}

21
src/compiler/nir/nir_lower_memcpy.c
View file

@ -34,11 +34,16 @@ static const struct glsl_type *
copy_type_for_byte_size(unsigned size)
{
switch (size) {
case 1: return glsl_vector_type(GLSL_TYPE_UINT8, 1);
case 2: return glsl_vector_type(GLSL_TYPE_UINT16, 1);
case 4: return glsl_vector_type(GLSL_TYPE_UINT, 1);
case 8: return glsl_vector_type(GLSL_TYPE_UINT, 2);
case 16: return glsl_vector_type(GLSL_TYPE_UINT, 4);
case 1:
return glsl_vector_type(GLSL_TYPE_UINT8, 1);
case 2:
return glsl_vector_type(GLSL_TYPE_UINT16, 1);
case 4:
return glsl_vector_type(GLSL_TYPE_UINT, 1);
case 8:
return glsl_vector_type(GLSL_TYPE_UINT, 2);
case 16:
return glsl_vector_type(GLSL_TYPE_UINT, 4);
default:
unreachable("Unsupported size");
}
@ -149,7 +154,7 @@ lower_memcpy_impl(nir_function_impl *impl)
glsl_uint8_t_type(), 1);
nir_variable *i = nir_local_variable_create(impl,
glsl_uintN_t_type(size->bit_size), NULL);
glsl_uintN_t_type(size->bit_size), NULL);
nir_store_var(&b, i, nir_imm_intN_t(&b, 0, size->bit_size), ~0);
nir_push_loop(&b);
{
@ -163,7 +168,7 @@ lower_memcpy_impl(nir_function_impl *impl)
nir_ssa_def *value =
memcpy_load_deref_elem(&b, copy_src, index);
memcpy_store_deref_elem(&b, copy_dst, index, value);
nir_store_var(&b, i, nir_iadd_imm(&b, index, 1), ~0);
nir_store_var(&b, i, nir_iadd_imm(&b, index, 1), ~0);
}
nir_pop_loop(&b, NULL);
}
@ -174,7 +179,7 @@ lower_memcpy_impl(nir_function_impl *impl)
nir_metadata_preserve(impl, nir_metadata_none);
} else if (found_const_memcpy) {
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}

5
src/compiler/nir/nir_lower_multiview.c
View file

@ -22,8 +22,8 @@
* IN THE SOFTWARE.
*/
#include "nir_control_flow.h"
#include "nir_builder.h"
#include "nir_control_flow.h"
/**
* This file implements an optimization for multiview. Some GPU's have a
@ -246,7 +246,7 @@ nir_lower_multiview(nir_shader *shader, uint32_t view_mask)
* original shader body.
*/
nir_loop* loop = nir_push_loop(&b);
nir_loop *loop = nir_push_loop(&b);
nir_ssa_def *loop_index = nir_load_deref(&b, loop_index_deref);
nir_ssa_def *cmp = nir_ige_imm(&b, loop_index, view_count);
@ -314,4 +314,3 @@ nir_lower_multiview(nir_shader *shader, uint32_t view_mask)
nir_metadata_preserve(entrypoint, nir_metadata_none);
return true;
}

28
src/compiler/nir/nir_lower_packing.c
View file

@ -38,38 +38,38 @@ static nir_ssa_def *
lower_pack_64_from_32(nir_builder *b, nir_ssa_def *src)
{
return nir_pack_64_2x32_split(b, nir_channel(b, src, 0),
nir_channel(b, src, 1));
nir_channel(b, src, 1));
}
static nir_ssa_def *
lower_unpack_64_to_32(nir_builder *b, nir_ssa_def *src)
{
return nir_vec2(b, nir_unpack_64_2x32_split_x(b, src),
nir_unpack_64_2x32_split_y(b, src));
nir_unpack_64_2x32_split_y(b, src));
}
static nir_ssa_def *
lower_pack_32_from_16(nir_builder *b, nir_ssa_def *src)
{
return nir_pack_32_2x16_split(b, nir_channel(b, src, 0),
nir_channel(b, src, 1));
nir_channel(b, src, 1));
}
static nir_ssa_def *
lower_unpack_32_to_16(nir_builder *b, nir_ssa_def *src)
{
return nir_vec2(b, nir_unpack_32_2x16_split_x(b, src),
nir_unpack_32_2x16_split_y(b, src));
nir_unpack_32_2x16_split_y(b, src));
}
static nir_ssa_def *
lower_pack_64_from_16(nir_builder *b, nir_ssa_def *src)
{
nir_ssa_def *xy = nir_pack_32_2x16_split(b, nir_channel(b, src, 0),
nir_channel(b, src, 1));
nir_channel(b, src, 1));
nir_ssa_def *zw = nir_pack_32_2x16_split(b, nir_channel(b, src, 2),
nir_channel(b, src, 3));
nir_channel(b, src, 3));
return nir_pack_64_2x32_split(b, xy, zw);
}
@ -81,18 +81,18 @@ lower_unpack_64_to_16(nir_builder *b, nir_ssa_def *src)
nir_ssa_def *zw = nir_unpack_64_2x32_split_y(b, src);
return nir_vec4(b, nir_unpack_32_2x16_split_x(b, xy),
nir_unpack_32_2x16_split_y(b, xy),
nir_unpack_32_2x16_split_x(b, zw),
nir_unpack_32_2x16_split_y(b, zw));
nir_unpack_32_2x16_split_y(b, xy),
nir_unpack_32_2x16_split_x(b, zw),
nir_unpack_32_2x16_split_y(b, zw));
}
static nir_ssa_def *
lower_pack_32_from_8(nir_builder *b, nir_ssa_def *src)
{
return nir_pack_32_4x8_split(b, nir_channel(b, src, 0),
nir_channel(b, src, 1),
nir_channel(b, src, 2),
nir_channel(b, src, 3));
nir_channel(b, src, 1),
nir_channel(b, src, 2),
nir_channel(b, src, 3));
}
static bool
@ -101,7 +101,7 @@ lower_pack_instr(nir_builder *b, nir_instr *instr, void *data)
if (instr->type != nir_instr_type_alu)
return false;
nir_alu_instr *alu_instr = (nir_alu_instr *) instr;
nir_alu_instr *alu_instr = (nir_alu_instr *)instr;
if (alu_instr->op != nir_op_pack_64_2x32 &&
alu_instr->op != nir_op_unpack_64_2x32 &&
@ -152,5 +152,5 @@ bool
nir_lower_pack(nir_shader *shader)
{
return nir_shader_instructions_pass(shader, lower_pack_instr,
nir_metadata_block_index | nir_metadata_dominance, NULL);
nir_metadata_block_index | nir_metadata_dominance, NULL);
}

11
src/compiler/nir/nir_lower_passthrough_edgeflags.c
View file

@ -46,7 +46,7 @@ lower_impl(nir_function_impl *impl)
util_bitcount64(shader->info.outputs_written));
/* Load an edge flag. */
nir_io_semantics load_sem = {0};
nir_io_semantics load_sem = { 0 };
load_sem.location = VERT_ATTRIB_EDGEFLAG;
load_sem.num_slots = 1;
@ -58,7 +58,7 @@ lower_impl(nir_function_impl *impl)
.io_semantics = load_sem);
/* Store an edge flag. */
nir_io_semantics semantics = {0};
nir_io_semantics semantics = { 0 };
semantics.location = VARYING_SLOT_EDGE;
semantics.num_slots = 1;
@ -70,7 +70,7 @@ lower_impl(nir_function_impl *impl)
.write_mask = 0x1);
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
return;
}
@ -86,10 +86,11 @@ lower_impl(nir_function_impl *impl)
nir_store_var(&b, out, def, 0xf);
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
}
void nir_lower_passthrough_edgeflags(nir_shader *shader)
void
nir_lower_passthrough_edgeflags(nir_shader *shader)
{
assert(shader->info.stage == MESA_SHADER_VERTEX);

2
src/compiler/nir/nir_lower_patch_vertices.c
View file

@ -93,7 +93,7 @@ nir_lower_patch_vertices(nir_shader *nir,
if (progress) {
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
}
}

6
src/compiler/nir/nir_lower_phis_to_scalar.c
View file

@ -88,7 +88,7 @@ is_phi_src_scalarizable(nir_phi_src *src,
*/
nir_deref_instr *deref = nir_src_as_deref(src_intrin->src[0]);
return !nir_deref_mode_may_be(deref, nir_var_function_temp |
nir_var_shader_temp);
nir_var_shader_temp);
}
case nir_intrinsic_interp_deref_at_centroid:
@ -106,7 +106,7 @@ is_phi_src_scalarizable(nir_phi_src *src,
break;
}
}
FALLTHROUGH;
FALLTHROUGH;
default:
/* We can't scalarize this type of instruction */
@ -272,7 +272,7 @@ lower_phis_to_scalar_impl(nir_function_impl *impl, bool lower_all)
}
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
nir_instr_free_list(&state.dead_instrs);

14
src/compiler/nir/nir_lower_pntc_ytransform.c
View file

@ -30,9 +30,9 @@
typedef struct {
const gl_state_index16 *pntc_state_tokens;
nir_shader *shader;
nir_builder b;
nir_variable *pntc_transform;
nir_shader *shader;
nir_builder b;
nir_variable *pntc_transform;
} lower_pntc_ytransform_state;
static nir_ssa_def *
@ -92,7 +92,7 @@ lower_pntc_ytransform_block(lower_pntc_ytransform_state *state,
var->data.location == VARYING_SLOT_PNTC) ||
(var->data.mode == nir_var_system_value &&
var->data.location == SYSTEM_VALUE_POINT_COORD)) {
lower_load_pointcoord(state, intr);
lower_load_pointcoord(state, intr);
}
}
}
@ -103,8 +103,8 @@ bool
nir_lower_pntc_ytransform(nir_shader *shader,
const gl_state_index16 pntc_state_tokens[][STATE_LENGTH])
{
if (!shader->options->lower_wpos_pntc)
return false;
if (!shader->options->lower_wpos_pntc)
return false;
lower_pntc_ytransform_state state = {
.pntc_state_tokens = *pntc_state_tokens,
@ -121,7 +121,7 @@ nir_lower_pntc_ytransform(nir_shader *shader,
lower_pntc_ytransform_block(&state, block);
}
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
}
return state.pntc_transform != NULL;

5
src/compiler/nir/nir_lower_point_size.c
View file

@ -78,8 +78,9 @@ nir_lower_point_size(nir_shader *s, float min, float max)
assert(min > 0.0f || max > 0.0f);
assert(min <= 0.0f || max <= 0.0f || min <= max);
float minmax[] = {min, max};
float minmax[] = { min, max };
return nir_shader_instructions_pass(s, lower_point_size_instr,
nir_metadata_block_index |
nir_metadata_dominance, minmax);
nir_metadata_dominance,
minmax);
}

3
src/compiler/nir/nir_lower_point_size_mov.c
View file

@ -55,7 +55,6 @@ lower_impl(nir_function_impl *impl,
VARYING_SLOT_PSIZ, glsl_float_type());
}
if (!out) {
b.cursor = nir_before_cf_list(&impl->body);
nir_ssa_def *load = nir_load_var(&b, in);
@ -89,7 +88,7 @@ lower_impl(nir_function_impl *impl,
}
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
return true;
}

8
src/compiler/nir/nir_lower_point_smooth.c
View file

@ -69,7 +69,8 @@ lower_point_smooth(nir_builder *b, nir_instr *instr, UNUSED void *_state)
nir_ssa_def *point_size = nir_frcp(b, nir_fddx(b, nir_channel(b, coord, 0)));
/* radius = point_size * 0.5 */
nir_ssa_def *radius = nir_fmul_imm(b, point_size, 0.5);;
nir_ssa_def *radius = nir_fmul_imm(b, point_size, 0.5);
;
/**
* Compute the distance of point from centre
@ -100,6 +101,7 @@ nir_lower_point_smooth(nir_shader *shader)
assert(shader->info.stage == MESA_SHADER_FRAGMENT);
return nir_shader_instructions_pass(shader, lower_point_smooth,
nir_metadata_loop_analysis |
nir_metadata_block_index |
nir_metadata_dominance, NULL);
nir_metadata_block_index |
nir_metadata_dominance,
NULL);
}

2
src/compiler/nir/nir_lower_poly_line_smooth.c
View file

@ -60,7 +60,7 @@ lower_polylinesmooth(nir_builder *b, nir_instr *instr, void *data)
/* coverage = (coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
coverage = nir_bit_count(b, coverage);
coverage = nir_u2f32(b, coverage);
coverage = nir_fmul_imm(b, coverage, 1.0 / *num_smooth_aa_sample);
coverage = nir_fmul_imm(b, coverage, 1.0 / *num_smooth_aa_sample);
/* Write out the fragment color*vec4(1, 1, 1, alpha) */
nir_ssa_def *one = nir_imm_float(b, 1.0f);

8
src/compiler/nir/nir_lower_printf.c
View file

@ -73,8 +73,7 @@ lower_printf_instr(nir_builder *b, nir_instr *instr, void *_options)
/* Check if we're still in-bounds */
const unsigned default_buffer_size = 1024 * 1024;
unsigned buffer_size = (options && options->max_buffer_size) ?
options->max_buffer_size : default_buffer_size;
unsigned buffer_size = (options && options->max_buffer_size) ? options->max_buffer_size : default_buffer_size;
int max_valid_offset =
buffer_size - args_size - fmt_str_id_size - counter_size;
nir_push_if(b, nir_ilt_imm(b, offset, max_valid_offset));
@ -112,9 +111,8 @@ lower_printf_instr(nir_builder *b, nir_instr *instr, void *_options)
unsigned field_offset = glsl_get_struct_field_offset(args->type, i);
nir_ssa_def *arg_offset =
nir_i2iN(b, nir_iadd_imm(b, offset,
fmt_str_id_size + field_offset),
ptr_bit_size);
nir_i2iN(b, nir_iadd_imm(b, offset, fmt_str_id_size + field_offset),
ptr_bit_size);
nir_deref_instr *dst_arg_deref =
nir_build_deref_array(b, buffer, arg_offset);
dst_arg_deref = nir_build_deref_cast(b, &dst_arg_deref->dest.ssa,

2
src/compiler/nir/nir_lower_readonly_images_to_tex.c
View file

@ -226,6 +226,6 @@ nir_lower_readonly_images_to_tex(nir_shader *shader, bool per_variable)
struct readonly_image_lower_options options = { per_variable };
return nir_shader_instructions_pass(shader, lower_readonly_image_instr,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
&options);
}

4
src/compiler/nir/nir_lower_reg_intrinsics_to_ssa.c
View file

@ -129,7 +129,7 @@ nir_lower_reg_intrinsics_to_ssa_impl(nir_function_impl *impl)
}
nir_metadata_require(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
nir_index_ssa_defs(impl);
void *dead_ctx = ralloc_context(NULL);
@ -168,7 +168,7 @@ nir_lower_reg_intrinsics_to_ssa_impl(nir_function_impl *impl)
ralloc_free(dead_ctx);
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
return true;
}

4
src/compiler/nir/nir_lower_returns.c
View file

@ -71,7 +71,7 @@ predicate_following(nir_cf_node *node, struct lower_returns_state *state)
*/
nir_cf_list list;
nir_cf_extract(&list, nir_after_cf_node(&if_stmt->cf_node),
nir_after_cf_list(state->cf_list));
nir_after_cf_list(state->cf_list));
assert(!exec_list_is_empty(&list.list));
nir_cf_reinsert(&list, nir_before_cf_list(&if_stmt->else_list));
}
@ -168,7 +168,7 @@ lower_returns_in_block(nir_block *block, struct lower_returns_state *state)
/* This block is unreachable. Delete it and everything after it. */
nir_cf_list list;
nir_cf_extract(&list, nir_before_cf_node(&block->cf_node),
nir_after_cf_list(state->cf_list));
nir_after_cf_list(state->cf_list));
if (exec_list_is_empty(&list.list)) {
/* There's nothing here, which also means there's nothing in this

9
src/compiler/nir/nir_lower_robust_access.c
View file

@ -20,7 +20,7 @@ rewrite_offset(nir_builder *b, nir_intrinsic_instr *instr,
nir_iadd_imm(b, instr->src[offset_src].ssa, access_size - 1);
nir_ssa_def *offset =
nir_bcsel(b, nir_uge(b, max_access_offset, size), nir_imm_int(b, 0),
instr->src[offset_src].ssa);
instr->src[offset_src].ssa);
/* Rewrite offset */
nir_instr_rewrite_src_ssa(&instr->instr, &instr->src[offset_src], offset);
@ -38,7 +38,7 @@ wrap_in_if(nir_builder *b, nir_intrinsic_instr *instr, nir_ssa_def *valid)
if (has_dest) {
zero = nir_imm_zero(b, instr->dest.ssa.num_components,
instr->dest.ssa.bit_size);
instr->dest.ssa.bit_size);
}
nir_push_if(b, valid);
@ -211,7 +211,6 @@ bool
nir_lower_robust_access(nir_shader *s,
const nir_lower_robust_access_options *opts)
{
return nir_shader_instructions_pass(s, lower, nir_metadata_block_index |
nir_metadata_dominance,
(void*)opts);
return nir_shader_instructions_pass(s, lower, nir_metadata_block_index | nir_metadata_dominance,
(void *)opts);
}

6
src/compiler/nir/nir_lower_samplers.c
View file

@ -100,9 +100,7 @@ lower_tex_src_to_offset(nir_builder *b,
nir_instr_rewrite_src(&instr->instr, &src->src,
nir_src_for_ssa(index));
src->src_type = is_sampler ?
nir_tex_src_sampler_offset :
nir_tex_src_texture_offset;
src->src_type = is_sampler ? nir_tex_src_sampler_offset : nir_tex_src_texture_offset;
} else {
nir_tex_instr_remove_src(instr, src_idx);
}
@ -149,6 +147,6 @@ nir_lower_samplers(nir_shader *shader)
{
return nir_shader_instructions_pass(shader, lower_sampler,
nir_metadata_block_index |
nir_metadata_dominance,
nir_metadata_dominance,
NULL);
}

17
src/compiler/nir/nir_lower_scratch.c
View file

@ -42,7 +42,7 @@ lower_load_store(nir_builder *b,
nir_ssa_def *offset =
nir_iadd_imm(b, nir_build_deref_offset(b, deref, size_align),
var->data.location);
var->data.location);
unsigned align, UNUSED size;
size_align(deref->type, &size, &align);
@ -50,7 +50,7 @@ lower_load_store(nir_builder *b,
if (intrin->intrinsic == nir_intrinsic_load_deref) {
unsigned bit_size = intrin->dest.ssa.bit_size;
nir_ssa_def *value = nir_load_scratch(
b, intrin->num_components, bit_size == 1 ? 32 : bit_size, offset, .align_mul=align);
b, intrin->num_components, bit_size == 1 ? 32 : bit_size, offset, .align_mul = align);
if (bit_size == 1)
value = nir_b2b1(b, value);
@ -62,21 +62,22 @@ lower_load_store(nir_builder *b,
if (value->bit_size == 1)
value = nir_b2b32(b, value);
nir_store_scratch(b, value, offset, .align_mul=align,
.write_mask=nir_intrinsic_write_mask(intrin));
nir_store_scratch(b, value, offset, .align_mul = align,
.write_mask = nir_intrinsic_write_mask(intrin));
}
nir_instr_remove(&intrin->instr);
nir_deref_instr_remove_if_unused(deref);
}
static bool only_used_for_load_store(nir_deref_instr *deref)
static bool
only_used_for_load_store(nir_deref_instr *deref)
{
nir_foreach_use(src, &deref->dest.ssa) {
if (!src->parent_instr)
return false;
if (src->parent_instr->type == nir_instr_type_deref) {
if (!only_used_for_load_store(nir_instr_as_deref(src->parent_instr)))
if (!only_used_for_load_store(nir_instr_as_deref(src->parent_instr)))
return false;
} else if (src->parent_instr->type != nir_instr_type_intrinsic) {
return false;
@ -165,7 +166,7 @@ nir_lower_vars_to_scratch(nir_shader *shader,
}
set_foreach(set, entry) {
nir_variable* var = (void*)entry->key;
nir_variable *var = (void *)entry->key;
/* Remove it from its list */
exec_node_remove(&var->node);
@ -213,7 +214,7 @@ nir_lower_vars_to_scratch(nir_shader *shader,
if (impl_progress) {
progress = true;
nir_metadata_preserve(impl, nir_metadata_block_index |
nir_metadata_dominance);
nir_metadata_dominance);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}

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