Commit graph

201113 commits

Author SHA1 Message Date
Alyssa Rosenzweig
d4ec0fc381 nir/serialize: add specialized function serialization
with vtn_bindgen2 we only care about a single function at a time, not a whole
nir_shader, and it would be quite wasteful to serialize all the shader info
every time. add a specialized serialize just for 1 function.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33099>
2025-01-31 16:17:59 +00:00
Alyssa Rosenzweig
646903ed7a nir/print: extract nir_print_function_body
this will be used for more concise prints in vtn_bindgen2.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33099>
2025-01-31 16:17:59 +00:00
Alyssa Rosenzweig
7e467daac4 nir/lower_scratch_to_var: handle multi-function shaders
It's not at all clear how this pass should work with real function calls (if at
all), but at least this is enough to handle collections of self-contained
functions which vtn_bindgen2 wants.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33099>
2025-01-31 16:17:59 +00:00
Alyssa Rosenzweig
50428f3c8a nir/lower_scratch_to_var: handle KERNELs
need 64-bit indices or else we blow up.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33099>
2025-01-31 16:17:59 +00:00
Alyssa Rosenzweig
63c94cf755 nir: add nir_function_intrinsics_pass
we already have

* nir_shader_instructions_pass
* nir_shader_intrinsics_pass
* nir_function_instructions_pass

add the missing fourth, it's useful too.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33099>
2025-01-31 16:17:59 +00:00
Alyssa Rosenzweig
3b1166da8c meson: factor out with_driver_using_cl
adding a new bindgen-using driver should not require touching 4 different meson
files! factor out the expression, since it's a pain otherwise.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33099>
2025-01-31 16:17:58 +00:00
Karol Herbst
41c163138d mesa_clc: drop spirv version workaround
Not needed anymore as of the previous commit.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33286>
2025-01-31 14:32:27 +00:00
Karol Herbst
fe8a0d3548 clc: use SetUseHighestVersion when linking spirvs
This allows us to link spirvs with different versions.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33286>
2025-01-31 14:32:27 +00:00
Karol Herbst
6d306f7415 ci/windows: Bump Vulkan SDK for SPIRV-Tools
Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33286>
2025-01-31 14:32:27 +00:00
David Tobolik
457b159383 rusticl/feat: LinkOnce ODR
Reviewed-by: Karol Herbst <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33133>
2025-01-31 13:46:41 +00:00
Valentine Burley
7bf4d6a4db zink/ci: Add a fraction for zink-venus-lvp
With newly added features, especially since KHR_shader_subgroup the base
runtime has crept above the 15 minute timeout. Introduce a fraction to
keep the runtime in check and add a nightly full run to cover the gaps.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12548
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Reviewed-by: Martin Roukala <None>
Reviewed-by: Karol Herbst <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33318>
2025-01-31 12:35:46 +00:00
Lucas Stach
3800ecc029 etnaviv: allow larger shaders with unified instruction memory
When the core supports unified instruction memory, don't clamp individual
shader sizes to 256 instructions. Allow shaders to make full use of the
state instruction memory, as long as both VS and FS fit into the memory
region.

Allows to run the shaders from glmark2 terrain from state instruction
memory, so we don't need to use icache mode on GC3000 and makes the app
work on GC2000, which doesn't have icache but unified instruction memory.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33229>
2025-01-31 09:47:35 +00:00
Lucas Stach
bc83e0b90f etnaviv: place FS right behind VS in unified instruction memory
Currently we statically partition the unified intsruction memory range
into a VS and a FS range, with each of the shader types getting half
of the memory. Change this to place the FS instructions right behind
the VS instructions, which potentially allows larger shaders to be
executed from the instruction memory states when VS are FS are
unbalanced in size, which is quite common.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33229>
2025-01-31 09:47:35 +00:00
Lucas Stach
f1fe4d5961 etnaviv: replace open-coded shifts in shader range registers with macros
Use the generated macros from the HW headers to do the shifting,
which makes it more clear what is being done to those states.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33229>
2025-01-31 09:47:35 +00:00
Lucas Stach
ece07d5d9f etnaviv: correct and rename shader range register check
According to _InitializeContextBuffer() in the downstream kernel driver
all GPUs claiming to support more than 256 shader instructions have unified
instruction memory and the shader range registers to partition usage of
this unified memory region.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33229>
2025-01-31 09:47:34 +00:00
Lucas Stach
70b44a6762 etnaviv: emit PS start and end PC states only on shader changes
There is no reason to emit those states on framebuffer changes. While the
framebuffer format change might change the fragment shader due to R/B
swapping in the shader, this triggers compilation of a new shader variant
which will dirty the shader state as needed.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33229>
2025-01-31 09:47:34 +00:00
Lucas Stach
3b8d0f5dd7 etnaviv: split large multi-state updates into multiple batches
A single LOAD_STATE command can only load a maximum of 1023 32bit states,
limited by the range of the count parameter in the header.
Split the state update into multiple LOAD_STATE commands if necessary.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33229>
2025-01-31 09:47:34 +00:00
Lucas Stach
bfab2ae821 etnaviv: drop double masking in etna_emit_load_state
The VIV_FE_LOAD_STATE_HEADER_COUNT marco already includes the masking
operation, so there is no need to apply the same mask again.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33229>
2025-01-31 09:47:34 +00:00
Lucas Stach
992e9d07c5 etnaviv: drm: fix instruction limit for cores with instruction cache
Some cores with the the instruction cache feature, such as the GC3000 found
on the i.MX6QP, have a wrong instruction limit encoded in hardware. The HWDB
entry for this core has the correct number (512). Fixup all cores with the
instruction cache feature to report at least 512 instructions, which was
already assumed when configuring the VS/FS instruction state memory split in
other parts of the driver.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33229>
2025-01-31 09:47:34 +00:00
Valentine Burley
5c44d70684 amd/ci: Revert to 6.6 kernel on Raven
There's been a high number of GPU resets on Raven that amdgpu couldn't
recover from, leading to jobs timing out.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33317>
2025-01-31 09:19:38 +00:00
Lars-Ivar Hesselberg Simonsen
375116a3a0 panvk: Set missing shader_modifies_coverage flag
The shader_modifies_coverage-flag is currently not set for PanVK. This
might lead to issues down the line, so ensure it's set correctly.

Fixes: 5544d39f44 ("panvk: Add a CSF backend for panvk_queue/cmd_buffer")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33300>
2025-01-31 09:00:19 +00:00
Lars-Ivar Hesselberg Simonsen
2c855c1f4c Revert "panfrost: fix hang by using MALI_PIXEL_KILL_WEAK_EARLY in color preload"
This reverts commit f93a48e4e3.

Backport-to: 25.0
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33300>
2025-01-31 09:00:19 +00:00
Lars-Ivar Hesselberg Simonsen
41cb2e73c2 Revert "panfrost: remove is_blit flag"
This reverts commit 6d6a43518a.

Backport-to: 25.0
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33300>
2025-01-31 09:00:19 +00:00
Lars-Ivar Hesselberg Simonsen
46256f3e39 panfrost: Do not evaluate_per_sample for non-MSAA
Enabling evaluate_per_sample in non-MSAA cases might cause issues and
hangs for subsequent ZS cases.

Therefore, only enable the flag when MSAA is active.

Fixes: 26d339ef8a ("panfrost: Generate Valhall Malloc IDVS jobs")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33300>
2025-01-31 09:00:19 +00:00
Hyunjun Ko
959403cd87 anv/video: clean-up duplicated code.
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33316>
2025-01-31 08:40:32 +00:00
Hyunjun Ko
52d9edbf05 anv: Fix to set CDEF flter flag correctly for AV1 decoding
and relevant tiny clean-up.

Fixes: 8432b8b282 ("anv: add initial support for AV1 decoding")

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33316>
2025-01-31 08:40:32 +00:00
Pierre-Eric Pelloux-Prayer
2b8c3a12c6 winsys/amdgpu: treat cs overflow as context lost
The existing code relies on assert to identify when a cs overlow
occurs. On builds without asserts, a cs overflow won't be detected
and it will likely lead to a hang.

Reporting a preemptively a PIPE_UNKNOWN_CONTEXT_RESET error seems
ok as the context is lost anyway.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33288>
2025-01-31 08:13:34 +00:00
Pierre-Eric Pelloux-Prayer
b3f2435994 radeonsi: update si_need_gfx_cs_space upper bound
radeon_emit_alt_hiz_logic can add 8 extra dw per draw.

Fixes: cdecbee922 ("radeonsi/gfx12: adjust HiZ/HiS logic")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33288>
2025-01-31 08:13:34 +00:00
Caio Oliveira
6c98f006f4 intel/brw: Move some larger functions from brw_inst.h to brw_inst.cpp
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33114>
2025-01-31 00:57:21 +00:00
Caio Oliveira
f7b0c12945 intel/brw: Rename fs_inst_box to brw_inst_box
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33114>
2025-01-31 00:57:21 +00:00
Caio Oliveira
d59bd421a2 intel/brw: Rename fs_inst to brw_inst
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33114>
2025-01-31 00:57:21 +00:00
Caio Oliveira
9b0d359737 intel/brw: Move fs_inst implementation code together
Move them to brw_inst.h/cpp.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33114>
2025-01-31 00:57:20 +00:00
Corentin Noël
dc2b6dfd16 venus/ci: Skip flaky test due to intermittent timeouts
This test has been intermittently timing out for a while now.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33307>
2025-01-31 00:11:31 +00:00
Eric Engestrom
4c46a93593 docs: update calendar for 25.0.0-rc1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33308>
2025-01-31 00:03:58 +00:00
Yiwei Zhang
d73642d9ff venus: scrub disallowed ycbcr features for rgba10x6
This is needed before we passthrough VK_EXT_rgba10x6_formats on
supported platforms.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33296>
2025-01-30 22:30:36 +00:00
Adam Jackson
6f5c227e2c zink: Enable KHR_shader_subgroup
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31228>
2025-01-30 20:59:04 +00:00
Mike Blumenkrantz
cee77ba6ec zink: implement ops for KHR_shader_subgroup
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31228>
2025-01-30 20:59:04 +00:00
Mike Blumenkrantz
b4f3136fea zink: emit SpvCapabilityDemoteToHelperInvocation for IsHelperInvocation
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31228>
2025-01-30 20:59:04 +00:00
Konstantin Seurer
00d17f3dbe nir/lower_vars_to_ssa: Annotate defs with variable names
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33141>
2025-01-30 20:14:01 +00:00
Konstantin Seurer
ce0f30b230 nir: Add variable debug info to instructions
Allows for annotating defs with variable names.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33141>
2025-01-30 20:14:01 +00:00
Konstantin Seurer
ec89f88722 spirv: Handle NonSemantic.Shader.DebugInfo.100
New versions of glslangValidator seem to emit those instructions for
debug info instead of OpLine.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33141>
2025-01-30 20:14:01 +00:00
Konstantin Seurer
60a20bcf3d nir: Stop using instructions for debug info
Annotating ssa defs without affecting compilation is impossible with
debug info instructions since referencing a nir_def from the debug info
instr will add uses.

The old approach also stops worrking if passes reorder instructions.

This patch proposes a solution which should not regress performance just
like the old approach. The difference is that this one allocates a bit
more space for debug info instead of adding a new instruction for it.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33141>
2025-01-30 20:14:01 +00:00
Iván Briano
e73c4ce7c5 anv: handle REMAINING_LAYERS in host image copy cases
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33293>
2025-01-30 19:24:47 +00:00
Eric Engestrom
ea519cc230 docs: reset new_features.txt
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33304>
2025-01-30 19:02:37 +00:00
Eric Engestrom
8b61e9a701 VERSION: bump to 25.1
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33304>
2025-01-30 19:02:37 +00:00
Valentine Burley
8f66efd8ea venus/ci: Skip flaky test due to intermittent timeouts
This test has been intermittently timing out for a while now.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32906>
2025-01-30 17:42:06 +00:00
Mark Collins
c76ef0898b util/u_debug: Ignore newlines in parse_*_string
We now use `parse_debug_string` to parse debug strings from files, which
may have newlines in them. This change ensures that newline characters
are ignored during parsing, a similar change was made to
`parse_enable_string` for consistency.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32906>
2025-01-30 17:42:06 +00:00
Mark Collins
aaf8a8d968 freedreno/docs: Document TU_DEBUG_FILE
Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32906>
2025-01-30 17:42:06 +00:00
Mark Collins
a177788f6a tu/lrz: Check for TU_DEBUG(nolrz) late
Currently the `nolrz` TU_DEBUG options are only checked during
device creation and image creation, respectively. This means that if
the options are enabled after the device/image is created, LRZ
will still be used. Similarly, if the options are disabled after the
device/image is created, LRZ will still be disabled.

This change moves the checks to the point where the LRZ is actually
used, allowing for runtime toggling of LRZ.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32906>
2025-01-30 17:42:06 +00:00
Mark Collins
18ac78e5b4 tu/util: Support toggling TU_DEBUG options at runtime
This adds a new environment variable, TU_DEBUG_FILE, which can be used to
enable/disable various debug options at runtime via writing to a file. This
is useful for switching between different debug options (such as toggling
between SYSMEM/GMEM) without needing to restart the application.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32906>
2025-01-30 17:42:06 +00:00