Commit graph

130174 commits

Author SHA1 Message Date
Yiwei Zhang
d249cff1e7 venus: silence a build warning
Address -Wsometimes-uninitialized

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11342>
2021-06-15 19:50:10 +00:00
Neha Bhende
532472da0b aux/indices: include provoking vertex check in prim type conversion
Include provoking vertex checking in u_index_prim_type_convert() to make sure
the right primitive type is returned from the generator function.

Fixes google earth running on VMware svga device on hw version 11.

Fixes: cad2026b72 ("aux/indices: break out primitive type conversion to separate function")

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11367>
2021-06-15 19:27:50 +00:00
Rob Clark
fd23a54c71 freedreno: Fallback to sw for copy_image with compressed
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11371>
2021-06-15 19:09:24 +00:00
Rob Clark
c64f217495 freedreno: Flush batches on shadow/uncompress
Normally when we shadow a resource (whether it is changing the modifier
or not) we do not need to flush existing batches, since they reference
the original version of the resource.  There is a special case for
resources that are referenced by a batches framebuffer state, because
this state is emitted when the batch is flushed.  Because of this, we
need those batches to be flushed before we shadow the resource.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11371>
2021-06-15 19:09:24 +00:00
Rob Clark
de91d07927 freedreno/a6xx: Also validate format in blitter path
Since we can be blitting using a format that is different from the
resource's native format, we also need to validate and demote if
necessary, similar to sampler-views, image-views, and fb state.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11371>
2021-06-15 19:09:24 +00:00
Rob Clark
b97e3bb2e1 freedreno/a6xx: Handle R8G8 sharp edges in validate_format()
Because R8G8 has a different layout from R16, we not only need to demote
to uncompressed to (for example) sample R8G8 as R16 (or visa versa) but
we also need to demote further to linear.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11371>
2021-06-15 19:09:24 +00:00
Rob Clark
1061a68644 freedreno: Avoid recursive re-entry of u_blitter
Normally when demotion to uncompressed is required, it is handled when
various state is attached (sampler-view, framebuffer, etc).  But in this
one path into u_blitter we need to handle it up front, to avoid
recursing back into u_blitter for a decompress blit.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11371>
2021-06-15 19:09:24 +00:00
Rob Clark
6d01c17805 freedreno: Add debugging for blitter fallback recursion
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11371>
2021-06-15 19:09:24 +00:00
Rob Clark
fb8fe017ee freedreno: Don't try staging blit for non-renderable formats
If a format is not supported as a render target, there is no point in
trying a staging blit, as it will end up in a CPU copy fallback.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11371>
2021-06-15 19:09:24 +00:00
Rob Clark
e2f9ef9ce9 freedreno: Drop obsolete comment
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11371>
2021-06-15 19:09:24 +00:00
Chia-I Wu
17375c5d2d venus: be verbose about which physical devices are skipped
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11369>
2021-06-15 18:20:41 +00:00
Chia-I Wu
c496dc1120 venus: fix compatibility with older host drivers
Unlike on Android, KHR_swapchain may be advertised even when the host
driver does not support EXT_image_drm_format_modifier and
EXT_queue_family_foreign.  Do not request those extensions when they are
not supported.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11369>
2021-06-15 18:20:41 +00:00
Chia-I Wu
84ec64c4e4 venus: clean up vn_physical_device_get_native_extensions
Separate Android and non-Android paths.  No real change.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11369>
2021-06-15 18:20:41 +00:00
Rhys Perry
35e54abc67 nir/cse: resize the instruction set
ministat (CSE only):
Difference at 95.0% confidence
	-3357.54 +/- 32.5177
	-25.267% +/- 0.24098%
	(Student's t, pooled s = 33.909)

ministat (entire run):
Difference at 95.0% confidence
	-3414.27 +/- 270.628
	-2.76477% +/- 0.217647%
	(Student's t, pooled s = 282.207)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6390>
2021-06-15 17:57:07 +00:00
Rhys Perry
964f59d20e nir: use a single set during CSE
Use a single set and ensure dominance by checking after a equivalent
instruction is found.

Besides removing the need to copy a set, this also lets us resize the set
at the start of the pass in the next commit.

ministat (CSE only):
Difference at 95.0% confidence
	-984.956 +/- 28.8559
	-6.90075% +/- 0.190231%
	(Student's t, pooled s = 26.9052)

ministat (entire run):
Difference at 95.0% confidence
	-1246.1 +/- 257.253
	-0.998972% +/- 0.205094%
	(Student's t, pooled s = 239.863)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Co-authored-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6390>
2021-06-15 17:57:07 +00:00
Jonathan Marek
cb1ddff350 freedreno/registers: define REG_DSI_CPHY_MODE_CTRL
For use by the kernel driver.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11381>
2021-06-15 12:42:57 -04:00
Marcin Ślusarz
49c01da589 iris: fix error message on I915_GEM_[GS]ET_TILING failure
The first problem was noticed by Coverity (CID 1485970).

Fixes: ab49063f44 ("iris: Only use SET/GET_TILING when exporting/importing BOs")
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11357>
2021-06-15 15:07:42 +00:00
Erik Faye-Lund
db5f895dab zink: use correct type for u_bit_scan
Since we're going to iterate over each bit of this variable using
u_bit_scan, we should make sure we use an unsigned int for the variable.

While this works on GCC, it's not guaranteed to work, and produces a
warning on MSVC.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11358>
2021-06-15 14:49:25 +00:00
Felix DeGrood
a49b145e8d anv: Replace DC Flush with HDC Pipeline Flush
HDC Pipeline Flush is the correct method for flushing HDC
pipeline on Gfx12+ HW. Continue using DC Flush for earlier HW.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9834>
2021-06-15 12:57:42 +00:00
Felix DeGrood
ef70388a3a anv: Add ANV_PIPE_HDC_PIPELINE_FLUSH_BIT
Gfx12+ PIPE_CONTROL bit for flushing HDC cache and memory
transactions to L3 cache.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9834>
2021-06-15 12:57:42 +00:00
Felix DeGrood
82952deb8b anv: Only flush Tile Cache on VK_ACCESS_HOST_R/W
Tile Cache flush flushes all Color/Depth values from L3 cache
to memory in Unified Cache mode. This is only required when
CPU access is required.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9834>
2021-06-15 12:57:42 +00:00
Felix DeGrood
6f26a51f47 anv: remove unnecessary Tile Cache flushes
On Gfx12+, flushing tile cache ensures color/depth values are
globally visible, but that's expensive.  Most operations only
need values to be GT-visible which can be achieved with depth
or rt flush.  Remove a bunch of unnecessary Tile Cache flushes.
Fast clears and slow depth clears still require Tile Cache flush.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9834>
2021-06-15 12:57:42 +00:00
Felix DeGrood
a7bb74db7b anv: Remove Tile Cache flush from SBA, Pipe Select
Tile Cache flushing not required for State Base Address or
Pipe Select instructions.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9834>
2021-06-15 12:57:42 +00:00
Felix DeGrood
1da9ff047e anv: Clear all pending stall after pipe flush
Was only clearing CS stalls after emitting pending pipe
controls.  Need to clear all stalls.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9834>
2021-06-15 12:57:42 +00:00
Felix DeGrood
fc5cb54008 anv: Add debug messages for DEBUG_PIPE_CONTROL
Enable with INTEL_DEBUG=pc.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9834>
2021-06-15 12:57:42 +00:00
Felix DeGrood
6c345ddbe4 anv: Cache VB/IB in L3$ for Gfx12
Gfx12 enables caching of Vertex and Index Buffers in L3.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9834>
2021-06-15 12:57:42 +00:00
Hoe Hao Cheng
00f01f5226 zink: standardize zero-init code style
quick grepping shows that the amount of {0} (there were 8) is higher
than { 0 } (only 5), so {0} it is!

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11376>
2021-06-15 12:33:03 +00:00
Hoe Hao Cheng
65c8ae6bbd zink: zero-init structs with ISO C
zero-initing with empty braces is a GNU extension, MSVC does not like
it.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11376>
2021-06-15 12:33:03 +00:00
Daniel Stone
a8c1155209 ci/bare-metal: Set CPU and GPU governors to max, disable GPU runtime PM
Give us a bit more predictable performance by making sure we always run
at full tilt.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Acked-by: Martin Peres <martin.peres@mupuf.org>
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11337>
2021-06-15 14:02:44 +02:00
Daniel Stone
a1e734a874 ci: Unify {BARE_METAL,LAVA}_TEST_SCRIPT environment
Should also probably never have been different.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Acked-by: Martin Peres <martin.peres@mupuf.org>
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11337>
2021-06-15 14:02:44 +02:00
Daniel Stone
0d6dd44818 ci: Unify {BM,LAVA}_START_XORG environment
Why were they ever different ... ?

Signed-off-by: Daniel Stone <daniels@collabora.com>
Acked-by: Martin Peres <martin.peres@mupuf.org>
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11337>
2021-06-15 14:02:44 +02:00
Daniel Stone
0fcb53e8f4 ci/lava: Use HWCI_KERNEL_MODULES to load modules
One fewer difference to bare-metal.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Acked-by: Martin Peres <martin.peres@mupuf.org>
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11337>
2021-06-15 14:02:44 +02:00
Daniel Stone
b04e826e33 ci/bare-metal: Rename BM_KERNEL_MODULES to HWCI_KERNEL_MODULES
To try to make init more common.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Acked-by: Martin Peres <martin.peres@mupuf.org>
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11337>
2021-06-15 14:02:44 +02:00
Daniel Stone
aefb2a70d4 ci/lava: Explicitly start Xorg for Iris EGL tests
These tests relies on Xorg being started, so let's explicitly declare
that.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Acked-by: Martin Peres <martin.peres@mupuf.org>
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11337>
2021-06-15 14:02:44 +02:00
Daniel Stone
4e581b0202 ci/lava: Set PIGLIT_NO_WINDOW
This got lost in the move away from hardcoded environment variables, and
fixes the Iris EGL tests.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Acked-by: Martin Peres <martin.peres@mupuf.org>
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11337>
2021-06-15 14:02:44 +02:00
Pierre-Eric Pelloux-Prayer
b78a38bd02 radeonsi: use si_nir_is_output_const_if_tex_is_const
When a blending mode producing "color = src * dst" is used and we
can determine that dst is 1, then the draw call can dropped completely.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10979>
2021-06-15 11:18:02 +02:00
Pierre-Eric Pelloux-Prayer
83250036be radeonsi/nir: add si_nir_is_output_const_if_tex_is_const
Determine if a given shader write the same constant value to its output
if a specific input texture is replaced by constant load.

It's done by checking if the store_output intrinsics only depends on
constant and a texture. If it's true, the given texture is replaced by
a constant load in cloned shader and this clone is optimized.

Then the output is checked (= is it constant or not).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10979>
2021-06-15 11:18:02 +02:00
Pierre-Eric Pelloux-Prayer
9675de4c18 radeonsi: use si_install_draw_wrapper for tmz handling
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10979>
2021-06-15 10:19:07 +02:00
Pierre-Eric Pelloux-Prayer
b2bd9c5ccd radeonsi: add si_install_draw_wrapper
This allows to implement custom draw_vbo code-path without
touching si_draw_vbo.

As an example, skipped all draw calls with an odd new_draws
could be done like this:

   void mywrapper(...) {
   	   if (new_draws % 2)
   	      return;
   	   return sctx->real_draw_vbo(...);
   }

   if (some_condition_is_met)
      si_install_draw_wrapper(sctx, mywrapper);

Instead of having to add the "if ()" condition inside si_draw_vbo.

Note that a single wrapper may be installed so care must be taken
to not override an existing wrapper.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10979>
2021-06-15 10:19:04 +02:00
Pierre-Eric Pelloux-Prayer
ff8a930cf7 radeonsi: add _once suffix to depth_cleared_level_mask
And add a new variable to disambiguate between "has been cleared once" and
"is cleared".

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10979>
2021-06-15 10:19:02 +02:00
Marek Olšák
eb0fa78b68 gallium/u_threaded: merge draws faster by merging indexbuf unreferencing
Instead of N times decrementing the index buffer refcount by 1, decrement
it by N once.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11349>
2021-06-15 04:12:44 +00:00
Hyunjun Ko
639579d116 turnip: Copy command buffers to deferred submit request
To make sure the index of global bo table in drm_msm_gem_submit_cmd is
valid at actual submit time.

v1. Move the entry_count calculation into the submit request creation
function.

Fixes: #4877
Fixes: 3f229e34 ("turnip: Implement VK_KHR_timeline_semaphore.")

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11260>
2021-06-15 02:16:21 +00:00
Dave Airlie
cebbdf5de3 crocus: fix scanout tiling so glamor/modesetting can work.
This fixes the scanout tiling to be like iris, with this X/glamor
can run.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11354>
2021-06-15 10:58:09 +10:00
Dave Airlie
a7d95bfd5f crocus: enable GL_EXT_memory_object feature on gen7
This is enabled by enabling gallium's memobj capability.

Ports 05cf1e7f36 from iris

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11352>
2021-06-15 00:02:06 +00:00
Dave Airlie
4a9da4dade crocus: plumb device/driver UUID generators
Ports 456fa9b838 from iris.

    Use the same generators as used in anv driver so both Vulkan and OpenGL
    drivers can share the same external memory objects.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11352>
2021-06-15 00:02:06 +00:00
Dave Airlie
bc9af971d2 crocus: hook up resource creation from memory object
Port 772dc50d16 from iris

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11352>
2021-06-15 00:02:06 +00:00
Dave Airlie
8bf662df52 crocus: hook up memory object creation from handle
Port cdb5a72764 from iris

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11352>
2021-06-15 00:02:06 +00:00
Dave Airlie
9be4eb1688 crocus: Drop buffer support in resource_from_handle
Port 9d503b36ca from iris

   The callers don't seem to pass targets of PIPE_BUFFER. Stop nesting an
   if-else block by dropping support for this target.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11352>
2021-06-15 00:02:06 +00:00
Dave Airlie
32728dc66e crocus: introduce main resource configuration helper.
Along the lines of what iris does.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11352>
2021-06-15 00:02:06 +00:00
Dave Airlie
1e6e87a3c9 crocus: Make iris_bo_import_dmabuf take a modifier
Port 493298528a from iris

    Replace the tiling parameter with a modifier parameter. I find it more
    straightforward to have this function figure out the tiling from the
    modifier than to have its caller do it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11352>
2021-06-15 00:02:06 +00:00