Commit graph

120819 commits

Author SHA1 Message Date
Daniel Stone
cddf1bf5f9 freedreno: Add missing dependency to build
computerator depends on ir3_parser.h, which is a generated file, but
this dependency is not expressed in the build.

Fixes: 1e8808a4a0 ("freedreno/ir3: refactor out helper to compile shader from asm")
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7870>
(cherry picked from commit 9eee405484)
2020-12-02 15:08:42 -08:00
James Park
12c40b0477 radv: Fix leak in radv_amdgpu_winsys_destroy()
Fixes: fa97061a82 ("radv/winsys: Add binary syncobj ABI changes for timeline semaphores.")

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7866>
(cherry picked from commit 6ec0953e22)
2020-12-02 15:08:41 -08:00
Marek Olšák
1578dde278 radeonsi: disable WGP mode on gfx10.3 to prevent hangs
I think that reducing the CU mask to 1 disabled CU per SA broke the WGP mode
on VanGogh, causing a hang. To be sure, disable it on all chips.

Fixes: 9538b9a68e - radeonsi: add support for Sienna Cichlid

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7721>
(cherry picked from commit 69c927debe)
2020-12-02 15:08:41 -08:00
Marek Olšák
2b9da404c1 radeonsi: fix a nasty bug in si_pm4.c
If you did:
  si_pm4_set_reg(pm4, reg, val0);
  si_pm4_cmd_add(pm4, val1);
  si_pm4 set_reg(pm4, reg + 4, val1);

it wrote val0 to reg, val1 to reg + 4, and val2 to reg + 8.

This fixes it by clearing last_opcode in si_pm4_cmd_add, so that
si_pm4_set_reg doesn't try to combine set_reg calls across si_pm4_cmd_add.

Fixes: da78d50bc8 - radeonsi: make si_pm4_cmd_begin/end static and simplify all usages

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7721>
(cherry picked from commit 0d4f1dcd15)
2020-12-02 15:08:40 -08:00
Marek Olšák
b7659c5ed7 radeonsi: fix a memory leak in si_create_dcc_retile_cs
Fixes: 1f21396431 - radeonsi: add support for displayable DCC for multi-RB chips

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7721>
(cherry picked from commit e64d5cc4d6)
2020-12-02 15:08:39 -08:00
Kenneth Graunke
bcbc20bf6e nir/algebraic: Avoid creating new fp64 ops when using softfp64
In commit 00b28a50b2, Marek extended
a number of optimizations that had been 32-bit specific to work on
other bit-sizes.

Most optimizations preserve the data type across the transformation.
In other words, an optimization which generates e.g. fp64 operations
only does so when the source expression also contains fp64 operations.
These transformations are fine with respect to lowering, because we
will lower away all expressions that would trigger the search portion
of the expression, and so we'd never apply those rules.

However, a few of the rules create new operations that run afoul of
lowering passes.  For example,

    ('bcsel', a, 1.0, 0.0) => ('b2f', a)

where the result is a double would simply be a selection between two
different 64-bit constants.  The replacement expression, on the other
hand, involves a nir_op_b2f64 ALU operation.  If we're run after
nir_lower_doubles, then it may not be legal to generate such an
expression anymore (at least without running lowering again, which we
don't do today).

Regressions due to this are blocking the 20.3 release, so for now, we
take the easy route and simply disallow those few rules when doing full
softfp64 lowering, which fixes the immediate problem.  But it doesn't
solve the long-term problem in an extensible manner.

In the future, we may want to add a `lowered_alu_ops` bitfield to the
NIR shader, and as lowering passes are run, mark them as taboo.  Then,
we could have each algebraic transformation track which operations it
creates in the replacement expression.  With both of those in place,
nir_replace_instr could compare the transformation's list of ALU ops
against `lowered_alu_ops` and implicitly skip rules that generate
forbidden ALU operations.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3504
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7841>
(cherry picked from commit 531843cf2e)
2020-12-01 10:06:17 -08:00
Timur Kristóf
7a4f33b1f5 aco: Fix NGG GS assert failure from the WG scan.
There was a temp which was defined in a branch but used outside,
without a phi.

Fixes: 62b5012ec3
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7817>
(cherry picked from commit 94f8cb29ee)
2020-12-01 09:12:41 -08:00
Christian Gmeiner
f4a059eb98 etnaviv/drm: fix evil-twin etna_drm_table_lock
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7832>
(cherry picked from commit aad0c7c6b8)
2020-12-01 09:12:41 -08:00
Marek Olšák
b52bb0dc5c st/mesa: fix uninitialized/random clip plane state vars in lower_ucp
Fixes: 584f27326c - st/mesa: factor ucp-lowering logic into helper

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6946>
(cherry picked from commit fdd3a448ae)
2020-12-01 09:12:40 -08:00
Marek Olšák
770f46c781 mesa: call FLUSH_VERTICES before changing sampler uniforms
Fixes: 9545139ce5 "mesa: skip FLUSH_VERTICES() if no samplers were changed"

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6946>
(cherry picked from commit 0a2117bc9e)
2020-12-01 09:12:40 -08:00
Bas Nieuwenhuizen
ded8b21e2a radv: Deal with unused attachments in mip flush
Fixes: 4cce4d22a7 ("radv: Fix a hang on CB change by adding flushes.")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7813>
(cherry picked from commit aed8d30b50)
2020-12-01 09:12:39 -08:00
Gert Wollny
db68b97f25 r600/sfn: fix component loading from fixed buffer ID
Fixes: 18e9781714
    r600/sfn: Use load_ubo_vec4 lowering pass

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7715>
(cherry picked from commit c41d0d0c3d)
2020-12-01 09:12:38 -08:00
Bas Nieuwenhuizen
5355ff3744 radv: Fix a hang on CB change by adding flushes.
This workaround fixes a hang while loading a renderdoc trace for me.

Since the workload does 1 mip per cmdbuffer it is quite hard to confirm
what exactly the conditions for the hang are but this is the most
restrictive set I found and it corresponds to a workaround in AMDVLK as
well.

CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7210>
(cherry picked from commit 4cce4d22a7)
2020-12-01 09:12:38 -08:00
Rhys Perry
3e2a3b402b nir: fix sampler_lod_parameters_pan indices
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: deaebc82a7 "nir: Add load_sampler_lod_paramaters_pan intrinsic"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6587>
(cherry picked from commit f6407b9b7d)
2020-12-01 09:12:36 -08:00
Danylo Piliaiev
1891d30031 freedreno/a6xx: Fix typo in height alignment calculation in a6xx layout
Fixes KHR-GL31.texture_size_promotion.functional

Fixes: e49748521e
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7792>
(cherry picked from commit a569ffeb83)
2020-12-01 09:12:36 -08:00
Lionel Landwerlin
bf76f2b21c anv: fix descriptor pool leak in VMA object
Quoting the spec :

   "When a pool is destroyed, all descriptor sets allocated from the
    pool are implicitly freed and become invalid. Descriptor sets
    allocated from a given pool do not need to be freed before
    destroying that descriptor pool."

This implies we might leak nodes allocated in the vma object.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0a6d2593b8 ("anv: Allocate descriptor buffers from the BO cache")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7796>
(cherry picked from commit 5d55ca9c30)
2020-12-01 09:12:35 -08:00
Timur Kristóf
099804865a aco/optimizer: Only set scc_needed when it is actually needed.
Not every p_cbranch uses the SCC, but our optimizer thought so.

Fixes: 8a32f57fff
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7677>
(cherry picked from commit 8bd3fefb74)
2020-12-01 09:12:34 -08:00
Andrii Simiklit
6e72700f84 glsl: avoid an out-of-bound access while setting up a location for variable
It fixes the following valgrind issue:
==141996== Invalid read of size 4
==141996==    at 0x61F8806: gl_nir_link_uniforms (gl_nir_link_uniforms.c:1788)
==141996==    by 0x60F17AA: gl_nir_link_glsl (gl_nir_linker.c:672)
==141996==    by 0x5C1AEDF: st_link_nir (st_glsl_to_nir.cpp:739)
==141996==    by 0x5C15574: st_link_shader (st_glsl_to_ir.cpp:172)
==141996==    by 0x5C673B0: _mesa_glsl_link_shader (ir_to_mesa.cpp:3117)
==141996==    by 0x5E7B61C: link_program (shaderapi.c:1311)
==141996==    by 0x5E7B61C: link_program_error (shaderapi.c:1419)
==141996==    by 0x5E7CF8A: _mesa_LinkProgram (shaderapi.c:1911)
==141996==    by 0x4923D13: stub_glLinkProgram (piglit-dispatch-gen.c:33956)
==141996==    by 0x1142C0: link_and_use_shaders (shader_runner.c:1636)
==141996==    by 0x1205A6: init_test (shader_runner.c:5347)
==141996==    by 0x121555: piglit_init (shader_runner.c:5725)
==141996==    by 0x4991C84: run_test (piglit_fbo_framework.c:50)

It can be reproduced on `iris` using the following piglit test:
instance-matching-shader-storage-blocks-align-qualifier-mismatch.shader_test

Closes: #3818
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Fixes: 47c35823 ("glsl: fix up location setting for variables pointing to a UBO's base")
Signed-off-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7376>
(cherry picked from commit a941618a1f)
2020-12-01 09:12:34 -08:00
Pierre-Eric Pelloux-Prayer
0eabed30a4 radeonsi/gfx10: flush gfx cs on ngg -> legacy transition
with a sequence like this:

  glClear(STENCIL)
  glBeginTransformFeedback()
  ...
  glEndTransformFeedback()
  glClear(STENCIL)

The second clear sometimes may produce an unexpected result.

Calling si_flush_gfx_cs() when doing ngg -> legacy transition seems to be a
valid workaround (both for the synthetic reproducer and the real Blender bug).

Using flush flags or events (BOTTOM_OF_PIPE_TS, RESET_TO_LOWEST_VGT) didn't help.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2941
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7750>
(cherry picked from commit 0b3bd7c516)
2020-12-01 09:12:33 -08:00
Rhys Perry
bfb711b209 nir/unsigned_upper_bound: fix buffer overflow in search_phi_bcsel
It should only recurse if there's enough space to add the phi sources.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 72ac3f6026 ("nir: add nir_unsigned_upper_bound and nir_addition_might_overflow")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7748>
(cherry picked from commit 65fbae16e3)
2020-12-01 09:12:32 -08:00
Rhys Perry
9c6e0fb476 aco: fix v_mul_hi_u32_u24 format
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 57c152af9c ("aco: select v_mul_{hi}_u32_u24 for 24-bit multiplications")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3874
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7759>
(cherry picked from commit cf0b54cdc1)
2020-12-01 09:12:32 -08:00
Bas Nieuwenhuizen
e1e31f6126 radv: Fix RB+ blending for VK_FORMAT_E5B9G9R9_UFLOAT_PACK32.
Fixes: e893102bcf ("radv: Add VK_FORMAT_E5B9G9R9_UFLOAT_PACK32 rendering support.")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7716>
(cherry picked from commit 025cb90042)
2020-11-24 22:10:09 -08:00
Jason Ekstrand
b2c70c3b11 spirv: Call repair SSA for OpTerminateInvocation
Fixes: 886d2d1a9a "spirv: Handle SpvOpTerminateInvocation"

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7734>
(cherry picked from commit 66685679b7)
2020-11-24 22:08:25 -08:00
Erik Faye-Lund
deccfbc0d7 zink: fall back to util_blitter for scaled resolves
Vulkan can't scale while resolving using vkCmdResolveImage. For this we
need to use util_blitter.

The reason this wasn't a problem in the past, was that glBlitFramebuffer
always set pipe_blit_info::render_condition_enable, and we always used
that to bail out to util_blitter. When the latter changed, this broke.

Fixes: 19906022e2 ("zink: more accurately track supported blits")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7745>
(cherry picked from commit c0286fc09b)
2020-11-24 22:08:24 -08:00
Dave Airlie
0464d64d6c gallium: fix missing bit field in p_state.h
Marek pointed this out, not sure how we missed it.

Fixes: 3dc6da1ac1 ("gallium: add a non-multisample sample mask out behaviour flag.")

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7741>
(cherry picked from commit 105fc1c615)
2020-11-24 22:08:24 -08:00
Dave Airlie
e9cdf398fa lavapipe: enable pipeline stats queries
These pass CTS, but I think are missing some stuff CTS doesn't test.

This is one of the base Vulkan 1.0 features and I'd like to support
it for conformance.

Cc: "20.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7705>
(cherry picked from commit 87c70f1984)
2020-11-24 22:08:23 -08:00
Dave Airlie
10a9d8a10f lavapipe: fixup mipmap precsion bits
8 seems more correct, however it fixes a bunch of explict lod
tests but breaks some lod query tests.

Cc: "20.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7705>
(cherry picked from commit 4263162839)
2020-11-24 22:08:23 -08:00
Dave Airlie
092a65b0d1 llvmpipe: fix multisample lines.
This also needs another lines fix, but at least align the code
with tri and points

Cc: "20.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7705>
(cherry picked from commit 2c0a078fdb)
2020-11-24 22:08:22 -08:00
Dave Airlie
7e90c4d148 llvmpipe: fix multisample point rendering.
Fixes one case in
dEQP-VK.rasterization.primitives_multisample_4_bit.no_stipple.points

Cc: "20.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7705>
(cherry picked from commit d932720ff7)
2020-11-24 22:08:21 -08:00
Dave Airlie
ad4d87a537 llvmpipe/setup: move point stats collection earlier.
You have to count the stats pre-culling here.

Just like dc261cdd42 did for lines.

VK-GL-CTS dEQP-VK.query_pool.statistics_query.clipping_primitives*point_list

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7705>
(cherry picked from commit 2ed54033de)
2020-11-24 22:08:21 -08:00
Dave Airlie
904811faac lavapipe: fix wsi acquire fences
Fixes:
dEQP-VK.wsi.xcb.swapchain.acquire.too_many

Cc: "20.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7705>
(cherry picked from commit f246456538)
2020-11-24 22:08:20 -08:00
Dave Airlie
6e3894d52d lavapipe: fixup device allocate + enable private data
I'd only half ported private memory support, finish the job.

Cc: "20.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7705>
(cherry picked from commit 0d90c7cbc4)
2020-11-24 22:08:20 -08:00
Erik Faye-Lund
c7fdc10cba zink: fix layered resolves
Until recently, we ended up using u_blitter here, because
info->render_condition_enable was always true here. But when we recently
fixed that overly broad check, this broke.

So let's fix layered-resolves, by actually checking if the resource has
layers respect them in that case, similar to what we do in blit_native.

Fixes: 19906022e2 ("zink: more accurately track supported blits")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3843
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7737>
(cherry picked from commit 2ac396e2e5)
2020-11-24 22:08:18 -08:00
Samuel Pitoiset
162a0678ac aco: fix combining add/sub to b2i if a new dest needs to be allocated
The uses vector needs to be expanded to avoid out of bounds access
and to make sure the number of uses is initialized to 0.

This fixes combining more v_and(a, v_subbrev_co_u32).

fossilds-db (Vega10):
Totals from 4574 (3.28% of 139517) affected shaders:
SGPRs: 291625 -> 292217 (+0.20%); split: -0.01%, +0.21%
VGPRs: 276368 -> 276188 (-0.07%); split: -0.07%, +0.01%
SpillSGPRs: 455 -> 533 (+17.14%)
SpillVGPRs: 76 -> 78 (+2.63%)
CodeSize: 23327500 -> 23304152 (-0.10%); split: -0.17%, +0.07%
MaxWaves: 22044 -> 22066 (+0.10%)
Instrs: 4583064 -> 4576301 (-0.15%); split: -0.15%, +0.01%
Cycles: 47925276 -> 47871968 (-0.11%); split: -0.13%, +0.01%
VMEM: 1599363 -> 1597473 (-0.12%); split: +0.08%, -0.19%
SMEM: 331461 -> 331126 (-0.10%); split: +0.08%, -0.18%
VClause: 80639 -> 80696 (+0.07%); split: -0.02%, +0.09%
SClause: 155992 -> 155993 (+0.00%); split: -0.02%, +0.02%
Copies: 333482 -> 333318 (-0.05%); split: -0.12%, +0.07%
Branches: 70967 -> 70968 (+0.00%)
PreSGPRs: 187078 -> 187711 (+0.34%); split: -0.01%, +0.35%
PreVGPRs: 244918 -> 244785 (-0.05%)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7513>
(cherry picked from commit ec347ee9bc)
2020-11-23 10:05:06 -08:00
Alejandro Piñeiro
8464a6e3d7 v3dv/cmd_buffer: missing (uint8_t *) casting when calling memcmp
Caused to return early wrongly on CmdPushConstants with some tests
using several calls to that method. As we are here we are also
replacing the (void *) casting at the memcpy below.

Fixes: e1c8041cde ("v3dv: try harder to skip emission of redundant state")

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7718>
(cherry picked from commit ce5c23eb00)
2020-11-23 09:07:36 -08:00
Marek Olšák
60bf76735c ac/nir: fix a typo in ac_are_tessfactors_def_in_all_invocs
I think it only made the pass return false if there was a barrier

Fixes: 2832bc972b - ac/nir_to_llvm: add ac_are_tessfactors_def_in_all_invocs()

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7623>
(cherry picked from commit 9659384744)
2020-11-23 09:07:34 -08:00
Gert Wollny
6adf918d34 r600/sfn: lower bool to int32 only after common optimizations
Fixes: f79b7fcf7c
   r600/sfn: use 32 bit bools

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7714>
(cherry picked from commit 335c48ab33)
2020-11-23 09:07:34 -08:00
Marek Olšák
29f1078c18 nir: fix gathering patch IO usage with lowered IO
Fixes: 17af07024d - nir: gather all IO info from IO intrinsics

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7622>
(cherry picked from commit e78c089aae)
2020-11-23 09:07:33 -08:00
Marek Olšák
33d7087682 nir: fix gathering TCS cross invocation access with lowered IO
Fixes: abe9588ff0 - nir: gather tess.tcs_cross_invocation info from lowered IO intrinsics

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7622>
(cherry picked from commit aadfdb962f)
2020-11-23 09:07:33 -08:00
Ian Romanick
43697f6c5f intel/compiler: Rotate instructions ROR and ROL cannot have source modifiers
I checked the Bspec for both Gen11 and Gen12, and it appears that rotate
instructions cannot have source modifiers or saturate modifer.  Saturate
was already handled.

Fixes: 1e92e83856 ("intel/compiler: Emit ROR and ROL instruction")
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7650>
(cherry picked from commit 6edc2a3d40)
2020-11-20 12:37:34 -08:00
Michel Dänzer
d8e73329de ac: Don't negate strstr return values in ac_query_gpu_info
strstr returns a pointer to the needle sub-string within the haystack
string if the latter contains the former, or NULL otherwise. So this
essentially always set info->is_pro_graphics = true, since probably no
marketing name ever contains all of these sub-strings.

Fixes: b635dff256 "ac: fix detection of Pro graphics"
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7675>
(cherry picked from commit 13b2beb415)
2020-11-19 10:42:25 -08:00
Kenneth Graunke
84e77da244 intel/fs: Fix sampler message headers on Gen11+ when using scratch
Icelake's sampler message header introduces a field in m0.3 bit 0
which controls whether the sampler state pointer should be relative
to bindless sampler state base address or dynamic state base address.

g0.3 bit 0 is part of the per-thread scratch space field.  On older
hardware, we were able to copy that along because the sampler ignored
bits 4:0.  Now, however, we need to mask them out.

Fixes various textureGatherOffsets piglit tests when forcing the FS
to run with 2048 bytes of per-thread scratch space (which is a
per-thread scratch space encoding of 1, meaning bit 0 will be set).

Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6735>
(cherry picked from commit 31290f9806)
2020-11-19 10:42:25 -08:00
Eric Anholt
e169782710 freedreno: Fix warning about uninit size for the size==0 special case.
The size==0 query case would have just used uninitialized stack data for
sizing its BOs.

Fixes: 536ec9d7f5 ("freedreno: Refactor fd_resource_create_with_modifiers() into a helper")
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7664>
(cherry picked from commit 239bae7b94)
2020-11-19 10:42:25 -08:00
Marek Olšák
650e2a15ad radeonsi: fix scan_instruction for bindless inc_wrap/dec_wrap atomics
Fixes: 25fff591c1 - radeonsi: add support for nir atomic_inc_wrap/atomic_dec_wrap

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7542>
(cherry picked from commit ff22fcf450)
2020-11-19 10:42:25 -08:00
Marek Olšák
2ce2c22d1a radeonsi: fix NGG streamout regression
num_stream_output_components has to be set for non-GS too.

Fixes: 81d106d6ec - radeonsi: lower IO intrinsics - complete rewrite of input/output scanning

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7542>
(cherry picked from commit d0657ee837)
2020-11-19 10:42:25 -08:00
Marek Olšák
5bf5eb452f ac: fix min/max_good_num_cu_per_sa on gfx10.3 with disabled SEs
Fixes: 9538b9a68e - radeonsi: add support for Sienna Cichlid

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7542>
(cherry picked from commit f2977a162a)
2020-11-19 10:42:25 -08:00
Marek Olšák
32b5779ade ac: fix detection of Pro graphics
Fixes: bfb928759 "ac: add radeon_info::is_pro_graphics"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7542>
(cherry picked from commit b635dff256)
2020-11-19 10:42:25 -08:00
Marek Olšák
f396e154f1 radeonsi: add options.inline_uniforms to the shader cache key
It affects how shaders are finalized before caching.

Fixes: b7501184b9 ("radeonsi: implement inlinable uniforms")

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7542>
(cherry picked from commit 025bc9e50e)

Conflicts:
	src/gallium/drivers/radeonsi/si_state_shaders.c
2020-11-19 10:42:25 -08:00
Marek Olšák
d247a0720a radeonsi: determine correctly if switching from normal launch to fast launch
Fixes: 3da91b3327 - radeonsi/ngg: add VGT_FLUSH when enabling fast launch

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7542>
(cherry picked from commit e29e41a3cd)
2020-11-19 10:42:24 -08:00
Marek Olšák
cd3cd16783 radeonsi: only do VGT_FLUSH for fast launch if previous draw was normal launch
Fixes: 3da91b3327 - radeonsi/ngg: add VGT_FLUSH when enabling fast launch

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7542>
(cherry picked from commit 8d2876a343)
2020-11-19 10:42:24 -08:00