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Author SHA1 Message Date
Yonggang Luo
d827d433ce util: Fixes typo in test_util_get_process_exec_path 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16723>
 2022-05-26 23:27:50 +00:00
Yonggang Luo
aa7446b17e util: Fixes test_util_get_process_exec_path on windows host with msys2/mingw 
```
stderr:
Error: Test 'test_util_get_process_exec_path' failed:
        Expected="C:/work/xemu/xemu-opengl/mesa/build/windows-mingw64/src/util/process_test.exe", Actual="C:\work\xemu\xemu-opengl\mesa\build\windows-mingw64\src\util\process_test.exe"
――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――
```

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16723>
 2022-05-26 23:27:50 +00:00
Alejandro Piñeiro
746287d221 v3dv/format: Add support for VK_KHR_format_feature_flags2 
VK_KHR_format_feature_flags2 is mostly about define a new 64-bit
VkFormatFeatureFlagBits2KHR format feature flag type, as 29 bits of
the 32-bit VkFormatFeatureFlagBits are already in use.

So all the bits from VkFormatFeatureFlagBits are being replicated, and
most of the work here consist on switch to the new flags.

From the new (not replicated from VkFormatFeatureFlagBits) flag bits,
we don't support
VK_FORMAT_FEATURE_2_STORAGE_READ_WITHOUT_FORMAT_BIT_KHR or
VK_FORMAT_FEATURE_2_STORAGE_WRITE_WITHOUT_FORMAT_BIT_KHR, as right now
we require the format on the shader for doing the read and stores.

We use now VK_FORMAT_FEATURE_2_SAMPLED_IMAGE_DEPTH_COMPARISON_BIT_KHR,
but only applying it for depth formats.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16718>
 2022-05-26 21:20:50 +00:00
Alejandro Piñeiro
11a0ea76a2 v3dv/format: no need for GetPhysicalDeviceFormatProperties 
The common Mesa Vulkan framework already provides a common
implementation based on GetPhysicalDeviceFormatProperties2.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16718>
 2022-05-26 21:20:50 +00:00
Mike Blumenkrantz
0c4a65ef34 zink: update radv piglit fails 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16727>
 2022-05-26 18:43:16 +00:00
Alyssa Rosenzweig
6450037b32 panfrost: Use tiled AFBC textures 
On GPUs that support AFBC with tiled headers, try to use tiled headers instead
of linear headers. This should be a bit more efficient for the caches.
Additionally, on Mali, tiled headers are tied to solid colour blocks, so this
has the effect of enabling AFBC with solid colour blocks where supported.

Unfortunately, results are disappointing. Mali-G52:

-btexture from 856fps to 859fps
-bdesktop from 292fps to 294fps

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
0255f554f3 panfrost: Advertise 16x16 tiled AFBC 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
1f1da58ed1 panfrost: Gate tiled AFBC on GPUs that support it 
Introduced with v7.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
3fbfd356af panfrost: Add helper checking tiled AFBC support 
Tiled AFBC support was introduced with v7. Add a helper encoding this fact.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
5fa274fee4 panfrost: Handle AFBC Tiled 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
b63dad3ce5 panfrost: Put comment in correct #ifdef 
Minor fix to make the code less confusing.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
bd529b7983 panfrost: Fix AFBC flags on v6 
Tiled headers and bounds checking were introduced with v7. The flags don't exist
on v6. Fix the XML accordingly so we don't accidentally use features too new for
the hardware.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
166d879ff0 panfrost: Add 1x1 layout unit tests 
These check the alignments are correct. Of course, ideally these cases aren't
hit in practice, since it's a waste of memory.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
65ba39f84c panfrost: Add a tiled 16x16 layout unit test 
To exercise the layout code introduced in this series.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
d11945cd85 panfrost: Calculate header_size based on row_stride 
The header size is the header stride times the number of rows in the header
(number of tiles of superblocks). We already calculate the header stride, so
eliminate the separate header size calculation.

Delete the old header size calculation. It has no notion of wide blocks, let
alone tiled AFBC headers.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
0cf6091bd0 panfrost: Add 3D texture layout unit test 
3D AFBC is pretty subtle, let's make sure we have adequate unit test coverage.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
5944bbfa94 panfrost: Add AFBC stride unit tests 
Demonstrating correctness of the low level calculations.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
544a8894fc panfrost: Align layouts to tiles of superblocks 
Required to satisfy the alignment constraints on tiled AFBC.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
9c9b7f7a42 panfrost: Support tiled AFBC in stride helpers 
Part 1 of tiled AFBC. This requires modifier information.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
5c86f53112 panfrost: Add pan_afbc_tile_size helper 
To unify calculations with linear and tiled AFBC formats.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
b7c18160d3 panfrost: Fix is_wide return type 
By inspection.

Fixes: e4ee2c213a ("panfrost: Extract panfrost_afbc_is_wide helper")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
6b0ff7da48 panfrost: Extract pan_afbc_row_stride helper 
Extract a helper for calculating AFBC strides. This is used in two places in
pan_layout. It will need extension for tiled AFBC, and the extended version
could benefit from unit testing.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
d8a4c9b505 panfrost: Extract afbc_stride_blocks helper 
Let's keep all the AFBC computations inside the layout code, to keep pan_cs
dumb. This helper will need some extension for tiled AFBC.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
 2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig
9773ed1dc7 panfrost: Fix crash with GALLIUM_HUD 
Due to the order of binding shaders, GALLIUM_HUD triggered a NULL pointer
dereference in the new shader variants code.

Fixes: 0fcddd4d2c ("pan/bi: Rework varying linking on Valhall")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16707>
 2022-05-26 14:01:42 +00:00
SureshGuttula
ef76b83633 radeonsi: Set display_remote for non-refernced frames 
When we do SVC temporal encoding, we see output bitsream is not proper. To fix
this , incase of SVC passing session init varaible display_remote as enable.

Signed-off-by: SureshGuttula <suresh.guttula@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16468>
 2022-05-26 12:26:53 +00:00
Danylo Piliaiev
713f504033 ir3: handle gl_Layer and gl_ViewportIndex when there is TES + GS 
Fixes CTS tests:
 KHR-GL46.shader_viewport_layer_array.ShaderViewportIndexTestCase
 KHR-GL46.shader_viewport_layer_array.ShaderLayerFramebufferLayeredTestCase
 KHR-GL46.shader_viewport_layer_array.ShaderLayerFramebufferNonLayeredTestCase

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6497

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16696>
 2022-05-26 08:47:02 +00:00
Samuel Pitoiset
1046c2a1c0 radv: fix writing buffer markers with non-zero memory offset 
Found by insepction.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16698>
 2022-05-26 08:23:52 +00:00
Samuel Pitoiset
6f854ac2f2 radv: use pipeline->slab_bo in more places 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16687>
 2022-05-26 08:03:33 +00:00
Samuel Pitoiset
0393cba27b radv: disable attachementFragmentShadingRate on GFX11 
The VRS image no longer uses HTILE like on GFX10.3 and I don't know
yet how to program it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16557>
 2022-05-26 07:43:38 +00:00
Samuel Pitoiset
4ffc7a50cb radv: disable VK_AMD_shader_fragment_mask on GFX11 
No FMASK on GFX11 which means I don't think we can expose this ext.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16557>
 2022-05-26 07:43:38 +00:00
Samuel Pitoiset
779e09639b radv: configure DB_Z_INFO.NUM_SAMPLES correctly on GFX11 
It affects VRS and occlusion queries.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16557>
 2022-05-26 07:43:38 +00:00
Samuel Pitoiset
00c649339b radv: fix VK_BLEND_FACTOR_CONSTANT_COLOR translation on GFX11 
This one was missing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16557>
 2022-05-26 07:43:38 +00:00
Samuel Pitoiset
97dc28b177 radv: fix configuring COLOR_INVALID on GFX11 
It's a different bitfield but this one was missing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16557>
 2022-05-26 07:43:38 +00:00
Samuel Pitoiset
aa439d7f46 radv: report adjusted LDS size for fragment shaders on GFX11 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16557>
 2022-05-26 07:43:38 +00:00
Samuel Pitoiset
2fd5aa79b2 radv: use the fragment resolve path by default on GFX11 
GFX11 doesn't support CB_RESOLVE which means it doesn't support the
hardware resolve path. If necessary (for arrays or integer formats)
the driver will select the compute path.

No CTS regressions by forcing the fragment resolve path on GFX10.3

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16557>
 2022-05-26 07:43:38 +00:00
Samuel Pitoiset
f7b1ad7c06 radv: update VRS rates on GFX11 
GFX11 uses enum instead of 2-bit integer numbers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
iReviewed-by: Timur Kristóf <timur.kristof@gmail.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16557>
 2022-05-26 07:43:38 +00:00
Samuel Pitoiset
e210ffb4d0 radv: update framebuffer registers on GFX11 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16557>
 2022-05-26 07:43:38 +00:00
Samuel Pitoiset
d88c859b4e radv: do not emit more non-existent registers on GFX11 
Found these by diffing the list of registers between GFX10_3 and GFX11.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16557>
 2022-05-26 07:43:38 +00:00
Samuel Pitoiset
c5d8ef97fa radv: rename VERT_GRP_SIZE to VERTS_PER_SUBGRP on GFX11 
Same bitfield but it has been renamed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16557>
 2022-05-26 07:43:38 +00:00
Lionel Landwerlin
e1811af75d util/perf: add options to enable/disable tracepoints 
We want to add more tracepoints for intel drivers. Having them all
enabled at the same time can be both costly and unreadable.

This allows a driver to specify an environment variable and values to
enable/disable tracepoints.

v2: s/TRACEPOINTS_ENABLES/TRACEPOINTS_TOGGLES/ (Danylo)
    s/config_name/toggle_name/

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16717>
 2022-05-26 07:14:45 +00:00
Lionel Landwerlin
4192747737 util/debug: add an enable parsing helper 
This allows to parse something like :

 ENV_VAR=+a,-b

which will enable a and disable b.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16717>
 2022-05-26 07:14:45 +00:00
Lionel Landwerlin
e666089082 intel/disasm: add missing handling of <1;1,0> 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 7cd9adeb41 ("intel/compiler: In XeHP prefer <1;1,0> regions before compacting")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16704>
 2022-05-26 06:42:16 +00:00
Dave Airlie
c219ca3fb7 llvmpipe: flush resources for kms swrast path. 
The kms_swrast path calls this callback via the dri2 paths,
not flushing caused artifacts when running inside a VM or on hw
in weston/gnome-shell.

Fixes: 6bbbe15a78 ("Reinstate: llvmpipe: allow vertex processing and fragment processing in parallel")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16715>
 2022-05-26 02:45:45 +00:00
Mike Blumenkrantz
8fef8ed1b0 zink: add renderpass bits for color/depth r/w 
these are different renderpasses according to compatibility rules

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16621>
 2022-05-26 01:49:43 +00:00
Mike Blumenkrantz
f4aa727e44 zink: use a zink_render_pass_pipeline_state bit for fbfetch 
improve compatibility detection

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16621>
 2022-05-26 01:49:43 +00:00
Yonggang Luo
54b7227f15 egl/wgl: On win32, there is no support for EGL_EXT_device and EGL_EXT_platform_device 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16537>
 2022-05-26 00:00:55 +00:00
Vinson Lee
b7e22864aa dri2: Fix memory leak. 
Fix defect reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_storage: Variable psp going out of scope leaks the storage it points to.

Fixes: 68aa2099fa ("dri2: Require a loader with working buffer invalidation")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16680>
 2022-05-25 16:25:23 -07:00
Alyssa Rosenzweig
96d9093c19 pan/bi: Allow CSEing LEA_BUF_IMM 
Cleans up the code gen a lot in varying shaders. Instruction count regression
due to how we handle 64-bit on Valhall. (TODO: A better solution for that...)

total instructions in shared programs: 2730186 -> 2736193 (0.22%)
instructions in affected programs: 775825 -> 781832 (0.77%)
helped: 2010
HURT: 4433
helped stats (abs) min: 1.0 max: 18.0 x̄: 2.16 x̃: 2
helped stats (rel) min: 0.16% max: 26.67% x̄: 3.75% x̃: 2.22%
HURT stats (abs)   min: 1.0 max: 10.0 x̄: 2.33 x̃: 2
HURT stats (rel)   min: 0.20% max: 23.08% x̄: 4.79% x̃: 2.79%
95% mean confidence interval for instructions value: 0.87 1.00
95% mean confidence interval for instructions %-change: 1.98% 2.27%
Instructions are HURT.

total cycles in shared programs: 161178.77 -> 144303.77 (-10.47%)
cycles in affected programs: 85720 -> 68845 (-19.69%)
helped: 6910
HURT: 0
helped stats (abs) min: 1.0 max: 18.0 x̄: 2.44 x̃: 2
helped stats (rel) min: 1.05% max: 41.18% x̄: 19.72% x̃: 20.00%
95% mean confidence interval for cycles value: -2.48 -2.41
95% mean confidence interval for cycles %-change: -19.86% -19.58%
Cycles are helped.

total cvt in shared programs: 13655.45 -> 14013 (2.62%)
cvt in affected programs: 2978.06 -> 3335.61 (12.01%)
helped: 381
HURT: 5242
helped stats (abs) min: 0.015625 max: 0.0625 x̄: 0.02 x̃: 0
helped stats (rel) min: 0.37% max: 50.00% x̄: 7.61% x̃: 3.85%
HURT stats (abs)   min: 0.015625 max: 0.296875 x̄: 0.07 x̃: 0
HURT stats (rel)   min: 0.00% max: 400.00% x̄: 28.51% x̃: 16.00%
95% mean confidence interval for cvt value: 0.06 0.06
95% mean confidence interval for cvt %-change: 25.13% 27.00%
Cvt are HURT.

total ls in shared programs: 147856 -> 130980 (-11.41%)
ls in affected programs: 85725 -> 68849 (-19.69%)
helped: 6911
HURT: 0
helped stats (abs) min: 1.0 max: 18.0 x̄: 2.44 x̃: 2
helped stats (rel) min: 1.05% max: 41.18% x̄: 19.72% x̃: 20.00%
95% mean confidence interval for ls value: -2.48 -2.41
95% mean confidence interval for ls %-change: -19.86% -19.58%
Ls are helped.

total quadwords in shared programs: 1483576 -> 1486872 (0.22%)
quadwords in affected programs: 73816 -> 77112 (4.47%)
helped: 286
HURT: 698
helped stats (abs) min: 8.0 max: 8.0 x̄: 8.00 x̃: 8
helped stats (rel) min: 2.38% max: 50.00% x̄: 16.83% x̃: 16.67%
HURT stats (abs)   min: 8.0 max: 8.0 x̄: 8.00 x̃: 8
HURT stats (rel)   min: 2.78% max: 100.00% x̄: 37.38% x̃: 16.67%
95% mean confidence interval for quadwords value: 2.89 3.80
95% mean confidence interval for quadwords %-change: 19.02% 24.22%
Quadwords are HURT.

total threads in shared programs: 53186 -> 53189 (<.01%)
threads in affected programs: 3 -> 6 (100.00%)
helped: 3
HURT: 0
helped stats (abs) min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%

total fills in shared programs: 2172 -> 2163 (-0.41%)
fills in affected programs: 11 -> 2 (-81.82%)
helped: 1
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16710>
 2022-05-25 15:51:15 +00:00
Alessandro Astone
f2a6535901 kopper: Only include XCB headers on supported platforms 
Fixes: 054bd2d38f ("kopper: copy a bunch of code for texture_from_pixmap")

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16675>
 2022-05-25 15:26:09 +00:00
Alyssa Rosenzweig
569e5dc745 pan/bi: Schedule for pressure pre-RA 
Add a bottom-up pre-RA list scheduler that aims to reduce register pressure,
roughly the same as we use on Midgard to great effect. It uses a simple
heuristic: greedily select instructions that have reduce liveness.  To avoid
regressions, the algorithm throws away schedules that increase maximum number of
lives (used as an estimate of register pressure -- if we had SSA form, this
would be exact).

We might be better off using Sarkar. But for something I could type out in an
afternoon, I'll happily accept a >50% reduction in spills. Instruction count is
regressed due to extra moves around the blend shader ABI in some cases, at least
on Bifrost this is mostly hidden by the clause scheduler. Thread count and
spills/fills are both much improved here.

There are numerous opportunities for future improvements to pre-RA scheduling:

* Better heuristics? (Something more global than liveness alone)
* Reducing false dependencies with memory access
* Improve ILP for message-passing instructions? This is a tradeoff.
* Simplify the code if we have SSA in the future.

But for now, I think this is well worth it already.

v2: Various clean-ups and memory leak fix (Icecream95). Reduce false
dependencies to eliminate spilling in more shaders.

shader-db stats on Mali-G52:

total instructions in shared programs: 2438841 -> 2439698 (0.04%)
instructions in affected programs: 1206421 -> 1207278 (0.07%)
helped: 3113
HURT: 4011
helped stats (abs) min: 1.0 max: 50.0 x̄: 3.25 x̃: 2
helped stats (rel) min: 0.13% max: 44.83% x̄: 4.09% x̃: 2.11%
HURT stats (abs)   min: 1.0 max: 18.0 x̄: 2.73 x̃: 2
HURT stats (rel)   min: 0.11% max: 57.14% x̄: 3.86% x̃: 2.07%
95% mean confidence interval for instructions value: 0.02 0.22
95% mean confidence interval for instructions %-change: 0.23% 0.54%
Instructions are HURT.

total tuples in shared programs: 1927077 -> 1946583 (1.01%)
tuples in affected programs: 1118627 -> 1138133 (1.74%)
helped: 2874
HURT: 6295
helped stats (abs) min: 1.0 max: 82.0 x̄: 3.51 x̃: 2
helped stats (rel) min: 0.17% max: 33.33% x̄: 4.60% x̃: 3.57%
HURT stats (abs)   min: 1.0 max: 47.0 x̄: 4.70 x̃: 3
HURT stats (rel)   min: 0.20% max: 50.00% x̄: 5.16% x̃: 4.32%
95% mean confidence interval for tuples value: 2.00 2.25
95% mean confidence interval for tuples %-change: 1.97% 2.23%
Tuples are HURT.

total clauses in shared programs: 356053 -> 357793 (0.49%)
clauses in affected programs: 151578 -> 153318 (1.15%)
helped: 2196
HURT: 3813
helped stats (abs) min: 1.0 max: 49.0 x̄: 2.16 x̃: 1
helped stats (rel) min: 0.18% max: 69.01% x̄: 10.26% x̃: 8.33%
HURT stats (abs)   min: 1.0 max: 25.0 x̄: 1.70 x̃: 1
HURT stats (rel)   min: 0.57% max: 66.67% x̄: 10.64% x̃: 8.33%
95% mean confidence interval for clauses value: 0.22 0.36
95% mean confidence interval for clauses %-change: 2.68% 3.33%
Clauses are HURT.

total cycles in shared programs: 167761.17 -> 167922.04 (0.10%)
cycles in affected programs: 24494.21 -> 24655.08 (0.66%)
helped: 862
HURT: 3054
helped stats (abs) min: 0.041665999999999315 max: 53.0 x̄: 0.69 x̃: 0
helped stats (rel) min: 0.28% max: 76.81% x̄: 5.65% x̃: 3.03%
HURT stats (abs)   min: 0.041665999999999315 max: 2.0416659999999993 x̄: 0.25 x̃: 0
HURT stats (rel)   min: 0.26% max: 41.18% x̄: 4.91% x̃: 3.92%
95% mean confidence interval for cycles value: -0.04 0.12
95% mean confidence interval for cycles %-change: 2.36% 2.81%
Inconclusive result (value mean confidence interval includes 0).

total arith in shared programs: 73875.37 -> 74393.17 (0.70%)
arith in affected programs: 43142.42 -> 43660.21 (1.20%)
helped: 3632
HURT: 5443
helped stats (abs) min: 0.041665999999999315 max: 1.2083360000000027 x̄: 0.15 x̃: 0
helped stats (rel) min: 0.22% max: 100.00% x̄: 6.70% x̃: 4.76%
HURT stats (abs)   min: 0.041665999999999315 max: 2.0416659999999993 x̄: 0.19 x̃: 0
HURT stats (rel)   min: 0.00% max: 166.67% x̄: 5.91% x̃: 4.08%
95% mean confidence interval for arith value: 0.05 0.06
95% mean confidence interval for arith %-change: 0.65% 1.07%
Arith are HURT.

total texture in shared programs: 11936 -> 11936 (0.00%)
texture in affected programs: 0 -> 0
helped: 0
HURT: 0

total vary in shared programs: 4180.88 -> 4180.88 (0.00%)
vary in affected programs: 0 -> 0
helped: 0
HURT: 0

total ldst in shared programs: 137551 -> 137028 (-0.38%)
ldst in affected programs: 834 -> 311 (-62.71%)
helped: 13
HURT: 0
helped stats (abs) min: 15.0 max: 53.0 x̄: 40.23 x̃: 53
helped stats (rel) min: 19.15% max: 100.00% x̄: 68.11% x̃: 76.81%
95% mean confidence interval for ldst value: -50.49 -29.98
95% mean confidence interval for ldst %-change: -84.37% -51.84%
Ldst are helped.

total quadwords in shared programs: 1684883 -> 1692021 (0.42%)
quadwords in affected programs: 949463 -> 956601 (0.75%)
helped: 3981
HURT: 5098
helped stats (abs) min: 1.0 max: 86.0 x̄: 3.53 x̃: 3
helped stats (rel) min: 0.18% max: 33.33% x̄: 5.82% x̃: 4.48%
HURT stats (abs)   min: 1.0 max: 50.0 x̄: 4.15 x̃: 3
HURT stats (rel)   min: 0.17% max: 50.00% x̄: 5.11% x̃: 3.85%
95% mean confidence interval for quadwords value: 0.67 0.90
95% mean confidence interval for quadwords %-change: 0.17% 0.47%
Quadwords are HURT.

total threads in shared programs: 53276 -> 53653 (0.71%)
threads in affected programs: 581 -> 958 (64.89%)
helped: 445
HURT: 68
helped stats (abs) min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
HURT stats (abs)   min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
95% mean confidence interval for threads value: 0.68 0.79
95% mean confidence interval for threads %-change: 75.70% 84.53%
Threads are helped.

total preloads in shared programs: 116312 -> 116312 (0.00%)
preloads in affected programs: 0 -> 0
helped: 0
HURT: 0

total loops in shared programs: 128 -> 128 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

total spills in shared programs: 92 -> 37 (-59.78%)
spills in affected programs: 55 -> 0
helped: 13
HURT: 0

total fills in shared programs: 658 -> 190 (-71.12%)
fills in affected programs: 468 -> 0
helped: 13
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16378>
 2022-05-25 14:40:12 +00:00