Commit graph

131615 commits

Author SHA1 Message Date
Iago Toral Quiroga
ca44b3edd7 v3dv: batch buffer to image copies with the texel buffer path if possible
When copying multiple regions that have the same image subresource we are
effectively copying various rects across the same layer range, so we can
batch together all the rects to copy for each layer in a single job.

This allows us to significantly reduce CPU overhead when recording the
command, as we need to produce less jobs and allocate less descriptor
sets. It also offers smaller gains in execution time due to the reduced
job count.

A stress test where we copy 10 subrects of an image in a loop 100 time,
choosing regions that will involve the texel buffer path, we get these
results:

                  | Recording Time | Execution Time |
        ----------|----------------|----------------|
        master    |     3.021s     |    0.112s      |
        ----------|----------------|----------------|
        patch     |     0.163s     |    0.080s      |
        ----------|----------------|----------------|

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7782>
2020-11-27 07:47:19 +01:00
Iago Toral Quiroga
2809e2e816 v3dv: fix leak in the buffer to image copy via texel buffer
Fixes: ba69c36ada ("v3dv: add a buffer to image copy path using a texel buffer")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7782>
2020-11-27 07:47:13 +01:00
Marek Olšák
aaed7a29be radeonsi: implement GS fast launch for indexed triangle strips
This increases performance for indexed triangle strips up to +100%.
In practice, it's limited by memory bandwidth and compute power,
so 256-bit memory bus and a lot of CUs are recommended.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7681>
2020-11-27 06:16:59 +00:00
Bas Nieuwenhuizen
4cce4d22a7 radv: Fix a hang on CB change by adding flushes.
This workaround fixes a hang while loading a renderdoc trace for me.

Since the workload does 1 mip per cmdbuffer it is quite hard to confirm
what exactly the conditions for the hang are but this is the most
restrictive set I found and it corresponds to a workaround in AMDVLK as
well.

CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7210>
2020-11-27 00:31:47 +00:00
Erik Faye-Lund
8564715253 docs: document new zink-flag
We forgot to document this previously, so let's add it now.

Fixes: feb9462bb1 ("zink: Added inbuilt debug logging from the VK_LAYER_LUNARG_standard_validation layer.")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7802>
2020-11-26 20:38:07 +01:00
Rhys Perry
313db572b7 nir: make intrinsic order in nir_print consistent
Make it consistent with nir_intrinsics.py, the unlabelled indices just
before it and the intrinsic builders.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6587>
2020-11-26 17:50:38 +00:00
Rhys Perry
fb0385b57c radv: use intrinsic builders
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6587>
2020-11-26 17:50:38 +00:00
Rhys Perry
9b040737d3 nir: use intrinsic builders
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6587>
2020-11-26 17:50:38 +00:00
Rhys Perry
ddb81f5da3 glsl_to_nir: use intrinsic builders
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6587>
2020-11-26 17:50:38 +00:00
Rhys Perry
eafc7eee57 spirv: use intrinsic builders
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6587>
2020-11-26 17:50:38 +00:00
Rhys Perry
c9bcad2573 nir: add generated intrinsic builders
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6587>
2020-11-26 17:50:38 +00:00
Rhys Perry
b3c65f97ad nir: move nir_load_system_value() to nir_builder.h
To make review easier.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6587>
2020-11-26 17:50:38 +00:00
Rhys Perry
f8ee599dfb nir: remove useless nir_builder_opcodes.h include
This is included earlier in the file.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6587>
2020-11-26 17:50:38 +00:00
Rhys Perry
a2b9e3f715 nir: add destination bit-size information to more intrinsics
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6587>
2020-11-26 17:50:38 +00:00
Rhys Perry
3ec217a849 nir: add bit_size_src for when the destination bit size matches a source
If bit_size_src is not -1, then it's the index of the source the
destination bit size can be expected to match. This will be useful for
generating intrinsic builders

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6587>
2020-11-26 17:50:38 +00:00
Rhys Perry
898d7c1f49 nir: use a single canonical list of intrinsic indices
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6587>
2020-11-26 17:50:38 +00:00
Rhys Perry
f6407b9b7d nir: fix sampler_lod_parameters_pan indices
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: deaebc82a7 "nir: Add load_sampler_lod_paramaters_pan intrinsic"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6587>
2020-11-26 17:50:38 +00:00
Danylo Piliaiev
a569ffeb83 freedreno/a6xx: Fix typo in height alignment calculation in a6xx layout
Fixes KHR-GL31.texture_size_promotion.functional

Fixes: e49748521e
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7792>
2020-11-26 17:37:37 +00:00
Danylo Piliaiev
f7b2165b19 freedreno/a6xx: add support for dual-source blending
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7708>
2020-11-26 17:24:39 +00:00
Rhys Perry
efba865c4c nir/lower_non_uniform: improve code with the same texture, sampler indices
NIR can't CSE the read_first_invocation intrinsics, so we can end up
creating iand(read_first_invocation(a) == a, read_first_invocation(a) == a)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3813>
2020-11-26 16:07:37 +00:00
Lionel Landwerlin
5d55ca9c30 anv: fix descriptor pool leak in VMA object
Quoting the spec :

   "When a pool is destroyed, all descriptor sets allocated from the
    pool are implicitly freed and become invalid. Descriptor sets
    allocated from a given pool do not need to be freed before
    destroying that descriptor pool."

This implies we might leak nodes allocated in the vma object.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0a6d2593b8 ("anv: Allocate descriptor buffers from the BO cache")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7796>
2020-11-26 16:01:20 +00:00
Timur Kristóf
df940760f9 aco/optimizer: Propagate scc_needed label through p_wqm.
Without this, RA is confused and adds a bunch of unnecessary moves.

Fossil-db results (Navi 10):

Totals from 7658 (5.55% of 137887) affected shaders:
SGPRs: 752488 -> 752392 (-0.01%)
CodeSize: 74046720 -> 73924368 (-0.17%); split: -0.17%, +0.00%
Instrs: 14293916 -> 14263350 (-0.21%); split: -0.21%, +0.00%
Cycles: 1455556728 -> 1438466536 (-1.17%); split: -1.17%, +0.00%
VMEM: 1096736 -> 1094962 (-0.16%); split: +0.03%, -0.19%
SMEM: 448436 -> 448418 (-0.00%); split: +0.00%, -0.01%
SClause: 485501 -> 485495 (-0.00%); split: -0.00%, +0.00%
Copies: 1383769 -> 1353029 (-2.22%); split: -2.22%, +0.00%
Branches: 568247 -> 568451 (+0.04%); split: -0.01%, +0.05%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7677>
2020-11-26 15:51:16 +00:00
Timur Kristóf
8bd3fefb74 aco/optimizer: Only set scc_needed when it is actually needed.
Not every p_cbranch uses the SCC, but our optimizer thought so.

Fixes: 8a32f57fff
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7677>
2020-11-26 15:51:16 +00:00
Andrii Simiklit
a941618a1f glsl: avoid an out-of-bound access while setting up a location for variable
It fixes the following valgrind issue:
==141996== Invalid read of size 4
==141996==    at 0x61F8806: gl_nir_link_uniforms (gl_nir_link_uniforms.c:1788)
==141996==    by 0x60F17AA: gl_nir_link_glsl (gl_nir_linker.c:672)
==141996==    by 0x5C1AEDF: st_link_nir (st_glsl_to_nir.cpp:739)
==141996==    by 0x5C15574: st_link_shader (st_glsl_to_ir.cpp:172)
==141996==    by 0x5C673B0: _mesa_glsl_link_shader (ir_to_mesa.cpp:3117)
==141996==    by 0x5E7B61C: link_program (shaderapi.c:1311)
==141996==    by 0x5E7B61C: link_program_error (shaderapi.c:1419)
==141996==    by 0x5E7CF8A: _mesa_LinkProgram (shaderapi.c:1911)
==141996==    by 0x4923D13: stub_glLinkProgram (piglit-dispatch-gen.c:33956)
==141996==    by 0x1142C0: link_and_use_shaders (shader_runner.c:1636)
==141996==    by 0x1205A6: init_test (shader_runner.c:5347)
==141996==    by 0x121555: piglit_init (shader_runner.c:5725)
==141996==    by 0x4991C84: run_test (piglit_fbo_framework.c:50)

It can be reproduced on `iris` using the following piglit test:
instance-matching-shader-storage-blocks-align-qualifier-mismatch.shader_test

Closes: #3818
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Fixes: 47c35823 ("glsl: fix up location setting for variables pointing to a UBO's base")
Signed-off-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7376>
2020-11-26 15:03:23 +00:00
Michel Zou
df143fa1ef glsl: Drop mingw -O1 workaround for GCC>=7.3
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7770>
2020-11-26 12:55:54 +00:00
Vinson Lee
bf2bcfe445 scons: Fix build with llvm-12.
This patch fixes these SCons build errors.

/usr/bin/ld: build/linux-x86_64-debug/gallium/auxiliary/libgallium.a(lp_bld_misc.os): in function `llvm::InitializeNativeTarget()':
llvm/Support/TargetSelect.h:118: undefined reference to `LLVMInitializeX86TargetInfo'
/usr/bin/ld: llvm/Support/TargetSelect.h:119: undefined reference to `LLVMInitializeX86Target'
/usr/bin/ld: llvm/Support/TargetSelect.h:120: undefined reference to `LLVMInitializeX86TargetMC'
/usr/bin/ld: build/linux-x86_64-debug/gallium/auxiliary/libgallium.a(lp_bld_misc.os): in function `llvm::InitializeNativeTargetAsmPrinter()':
llvm/Support/TargetSelect.h:132: undefined reference to `LLVMInitializeX86AsmPrinter'
/usr/bin/ld: build/linux-x86_64-debug/gallium/auxiliary/libgallium.a(lp_bld_misc.os): in function `llvm::InitializeNativeTargetDisassembler()':
llvm/Support/TargetSelect.h:156: undefined reference to `LLVMInitializeX86Disassembler'

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7722>
2020-11-26 12:49:11 +00:00
Samuel Pitoiset
954739fd18 radv/winsys: fix the sysmem submission path for GFX6
Oops.

Fixes: cba6ec309a ("radv: Fix -Wshadow warnings")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7790>
2020-11-26 12:38:14 +00:00
James Park
05799844df radv: Const aco_compiler_statistic_info usage
Necessary for upcoming const correctness change to aco struct.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7787>
2020-11-26 12:26:43 +00:00
Samuel Pitoiset
bb9b7d0a68 radv: fix missing initialization of the predication value
It's expected to be 0.

Fixes: 62d9ca696e ("radv: use 32-bit predication for conditional rendering on GFX10.3+")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7789>
2020-11-26 12:30:27 +01:00
Alejandro Piñeiro
d1ff00cb76 v3dv: remove non-conformant warning
The driver is now Vulkan 1.0 conformant.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7758>
2020-11-26 10:59:40 +00:00
Alejandro Piñeiro
4adb643a0a docs/features: update list of v3dv supported features
We have been implementing some features without updating the file, and
we even had some that were supported for a while.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

v2: include VK_KHR_wayland_surface as !7303 got merged

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7758>
2020-11-26 10:59:40 +00:00
Pierre-Eric Pelloux-Prayer
e5ff2a357e ac: use bigger storage for ac_arg::arg_index / ac_shader_args::arg_count
AC_MAX_ARGS is now 384 so uint8_t isn't enough.

Fixes: 6f13034265 ("ac/llvm: prepare for passing VS->TCS IO via VGPRs")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7750>
2020-11-26 10:19:26 +01:00
Pierre-Eric Pelloux-Prayer
0b3bd7c516 radeonsi/gfx10: flush gfx cs on ngg -> legacy transition
with a sequence like this:

  glClear(STENCIL)
  glBeginTransformFeedback()
  ...
  glEndTransformFeedback()
  glClear(STENCIL)

The second clear sometimes may produce an unexpected result.

Calling si_flush_gfx_cs() when doing ngg -> legacy transition seems to be a
valid workaround (both for the synthetic reproducer and the real Blender bug).

Using flush flags or events (BOTTOM_OF_PIPE_TS, RESET_TO_LOWEST_VGT) didn't help.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2941
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7750>
2020-11-26 10:19:26 +01:00
James Park
33a7894828 util,radv: Cross-platform monotonic condition variable
cnd_t operates on REALTIME clock, and isn't suitable for MONOTONIC use.

Clone the API, and implement using a monotonic clock.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7138>
2020-11-26 07:58:56 +00:00
James Park
4a94527ca1 util/os_time: Safe os_time_get_nano for Windows
Avoid small possibility of reading torn write on 32-bit platforms.

If frequency caching is desired, it's probably better to initialize from
C++ and extern "C" instead. It's not a tremendous optimization though.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7138>
2020-11-26 07:58:56 +00:00
James Park
192d721e3b c11/threads: Remove Windows XP support
Enable and remove EMULATED_THREADS_USE_NATIVE_CV. Delete legacy code.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7138>
2020-11-26 07:58:56 +00:00
James Park
e317103753 c11/threads: Remove Win32 null checks
Nonsensical to pass null. glibc doesn't check, and neither should we.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7138>
2020-11-26 07:58:56 +00:00
James Park
1afb8e23c7 c11/threads: Fix Win32 timed functions
mtx_timedlock and cnd_timedwait now use relative milliseconds.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7138>
2020-11-26 07:58:56 +00:00
Thong Thai
f09456361c frontends/va/postproc: Convert destination when deinterlacing
When the VAAPI deinterlacing filter is chained with other VAAPI
post-processing filters, the image might get deinterlaced multiple
times, as the filters after the deinterlacing filter might still see an
interlaced buffer.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6803>
2020-11-25 20:08:15 +00:00
Thong Thai
49465babdb frontends/va/postproc: Use the actual image height when blitting
Updates the height of the blitting parameter to use the actual image
height instead of the buffer height, otherwise when scaling, garbage
lines are shown in the output.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6803>
2020-11-25 20:08:15 +00:00
Caio Marcelo de Oliveira Filho
ff9ea469f6 intel/disasm: Don't rely on FALLTHROUGHTs to print unsupported SFID
The code works but is a bit fragile if we ever add a case that has a
less strict requirement (a smaller gen) than the case above.  To avoid
having to reason about this, refactor code to use a variable to
indicate whether the SFID is supported or not.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7742>
2020-11-25 16:46:16 +00:00
Boris Brezillon
ae27d7faae panfrost: Fix stride calculation for Z32_S8X24/X32_S8X24 formats
Z32_S8X24 variants are actually stored in 2 planes (one per component),
we have to adjust the bytes_per_pixel value accordingly.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25 17:04:26 +01:00
Boris Brezillon
00360cd5c8 panfrost: Calculate the row stride at resource creation time
So we don't have to calculate it again when we create a texture or
framebuffer descriptor.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25 17:04:20 +01:00
Boris Brezillon
690232c90f panfrost: Fix panfrost_needs_explicit_stride() for block-based formats
The expected stride calculation does not take the block width into
account, thus creating an expected line stride that's bigger than
required. Fix that by dividing the width by the block width.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25 16:25:22 +01:00
Boris Brezillon
543ad77e6f panfrost: Expose panfrost_block_dim()
So we can use it from pan_resource.c to retrieve the tile size based on
a modifier.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25 16:25:12 +01:00
Boris Brezillon
4d0cd48fab panfrost: Enable MSAA on bifrost when deqp debug option is set
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25 16:25:12 +01:00
Boris Brezillon
fc93eb7281 panfrost: Unconditionally align strides on 64 bytes for linear resources
If we don't do that we end up with DATA_INVALID faults when accessing
3D textures on Bifrost.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25 16:24:39 +01:00
Boris Brezillon
402cabf1ef panfrost: Set the layer stride
Needed for 3D textures.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25 16:22:19 +01:00
Boris Brezillon
176ce2b952 panfrost: Add two helpers to calculate the surface pointer and strides
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25 16:22:19 +01:00
Boris Brezillon
84c4b232ea panfrost: Clarify bit 2:28 meaning in the Midgard texture descriptor
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25 16:22:19 +01:00