Commit graph

39514 commits

Author SHA1 Message Date
Rob Clark
c6fab232c8 freedreno/all: move more emit helpers to screen
framebuffer_barrier() still depends on the ctx, but the rest can move to
screen.

Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-08-13 08:11:26 -07:00
Rob Clark
684f4b5843 freedreno/a3xx-a6xx+ir3: move emit_const* to screen
These don't need to be in context, and we'll need them in screen in a
later patch.  Plus it's a good cleanup.

Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-08-13 08:11:26 -07:00
Rob Clark
566f2281c5 freedreno/a6xx: add fd6_emit_init_screen()
Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-08-13 08:11:26 -07:00
Rob Clark
e89255b0a5 freedreno/a5xx: add fd5_emit_init_screen()
Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-08-13 08:11:25 -07:00
Rob Clark
d256e3f34a freedreno/a3xx: add fd3_emit_init_screen()
Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-08-13 08:11:25 -07:00
Rob Clark
b9d3f39728 freedreno/a2xx: add fd2_emit_init_screen()
Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-08-13 08:08:07 -07:00
Rob Clark
ec0ec641d8 freedreno/a4xx: add fd4_emit_init_screen()
Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-08-13 08:08:07 -07:00
Rob Clark
2f94de2372 freedreno/a2xx: call fd2_emit_ib() directly from fd2
Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-08-13 08:08:07 -07:00
Rob Clark
eb45422c5f freedreno/a5xx: call fd5_emit_ib() directly from fd5
Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-08-13 08:08:07 -07:00
Rob Clark
50e15e1c6f freedreno/a4xx: call fd4_emit_ib() directly from fd4
Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-08-13 08:08:07 -07:00
Rob Clark
4326eeac97 freedreno/a3xx: call fd3_emit_ib() directly from fd3
No reason for the indirection when called from a3xx specific code.

Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-08-13 08:08:07 -07:00
Rob Clark
32014afa44 freedreno/ir3: move VS driver-param emit
Move DP emit to it's own function.  No functional change, just code
motion to prepare for splitting up const state into multiple state-
objs on a6xx.

Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-08-13 08:08:07 -07:00
Boris Brezillon
65ae86b854 panfrost: Add support for KHR_partial_update()
Implement ->set_damage_region() region to support partial updates.

This is a dummy implementation in that it does not try to merge
damage rects. It also does not deal with distinct regions and instead
pick the largest quad as the only damage rect and generate up to 4
reload rects out of it (the left/right/top/bottom regions surrounding
the biggest damage rect).

We also do not try to reduce the number of draws by passing all quad
vertices to the blit request (would require extending u_blitter)

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-13 14:41:10 +02:00
Daniel Stone
492ffbed63 st/dri2: Implement DRI2bufferDamageExtension
Add a pipe_screen->set_damage_region() hook to propagate
set-damage-region requests to the driver, it's then up to the driver to
decide what to do with this piece of information.

If the hook is left unassigned, the buffer-damage extension is
considered unsupported.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-08-13 14:40:45 +02:00
Jordan Justen
fc12fd05f5
iris: Implement pipe_screen::resource_get_param
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-08-13 01:12:30 -07:00
Jordan Justen
3198c5b7bf
gallium/dri2: Use pipe_screen::resource_get_param in image queries
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
2019-08-13 01:12:29 -07:00
Jordan Justen
2decad495f
gallium/dri2: Support images with multiple planes for modifiers
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
2019-08-13 01:12:29 -07:00
Jordan Justen
6e749a6b2b
gallium/dri2: Refactor image property queries
This refactor will let us more easily use
pipe_screen::resource_get_param as an alternative to
pipe_screen::resource_get_handle.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
2019-08-13 01:12:29 -07:00
Jordan Justen
c5c2365455
state_tracker/winsys_handle: Add plane input field
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
2019-08-13 01:12:29 -07:00
Jordan Justen
2066966c10
gallium/dri2: Support creating multi-planar modifier images
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
2019-08-13 01:12:29 -07:00
Jordan Justen
fe06655e86
gallium/dri2: Implement dri2ImageExtension.queryDmaBufFormatModifierAttribs
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
2019-08-13 01:12:29 -07:00
Jordan Justen
0346b70083
gallium/screen: Add pipe_screen::resource_get_param
This function retrieves individual parameters selected by enum
pipe_resource_param. It can be used as a more direct alternative to
pipe_screen::resource_get_handle.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
2019-08-13 01:12:24 -07:00
Iago Toral Quiroga
2353f7f7ef vc4: clamp gl_PointSize to a minimum of 1.0
The OpenGL ES spec requires that the value of gl_PointSize is clamped
to an implementation-dependent range matching what is advertised by
GL_ALIASED_POINT_SIZE_RANGE. For VC4 this is [1.0, 512.0], but the
hardware won't clamp to the minimum side of the range and won't render
points with a size strictly smaller than 1.0 either, so we need to
clamp manually. For points larger than the maximum size of the range
the hardware clamps automatically.

Fixes piglit test:
spec/!opengl 2.0/vs-point_size-zero

Reviewed-by: Eric Anholt <eric@anholt.net>
2019-08-13 09:44:54 +02:00
Iago Toral Quiroga
b594796f1b v3d: do not automatically flush current job for SSBOs and shader images
If the current job has a sequence of draw calls involving SSBOs and/or
shader images, we would flush the job in between each draw call.
With this change, we won't flush the current job and we rely on the
application inserting correct barriers by issuing glMemoryBarrier()
when needed.

v2 (Eric):
 - When mapping a buffer for writing, we always need to flush.

Reviewed-by: Eric Anholt <eric@anholt.net>
2019-08-13 08:25:15 +02:00
Iago Toral Quiroga
f1cf1153e8 v3d: only process glMemoryBarrier() for SSBOs and images
PIPE_BARRIER_UPDATE is defined as:
PIPE_BARRIER_UPDATE_BUFFER | PIPE_BARRIER_UPDATE_TEXTURE

Which means we were flushing for any flags other than these two, but
this was intended to only flush for ssbos and images.

Actually, the driver automatically flushes jobs as we need, including
writes/reads involving SSBOs and images, so we don't really need to
flush anything when the program emits a barrier. However, this may
lead to excessive flushing in some cases, so we will soon change this
to avoid atutomatic flushing of the current job for SSBOs and images,
meaning that we will rely on the application to emit correct memory
barriers for these that we should make sure to process here.

Reviewed-by: Eric Anholt <eric@anholt.net>
2019-08-13 08:25:15 +02:00
Iago Toral Quiroga
f1559ca922 v3d: fix flushing of SSBOs and shader images
If the current draw call includes SSBOs, then we must flush any jobs
that are writing to the same SSBOs (so that our SSBOs reads are correct),
as well as jobs reading from the same SSBO (so that our SSBO writes don't
stomp previous SSBO reads).

The exact same logic applies to shader images. In this case we were already
flushing previous writes, but we should also flush previous reads.

Note that We don't need to call v3d_flush_jobs_reading_resource() and
v3d_flush_jobs_writing_resource() separately though, since flushing
jobs that read a resource also flushes those writing to it.

Suggested-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-08-13 08:25:15 +02:00
Rafael Antognolli
a1a499e7fe iris/gen11: Emit SLICE_HASH_TABLE when pipes are unbalanced.
If the pixel pipes have a different number of subslices, emit a slice
hashing table that will ensure proper workload distribution.

v2: Don't need to set the mask - it's mbo (Ken).
v3: Don't keep a reference to the resource used for emitting the table
(Ken).
2019-08-12 16:19:08 -07:00
Jason Ekstrand
134607760a intel/compiler: Fill a compiler statistics struct
This commit is all annoying plumbing work which just adds support for a
new brw_compile_stats struct.  This struct provides a binary driver
readable form of the same statistics we dump out to stderr when we
INTEL_DEBUG is set with a shader stage.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-08-12 22:56:07 +00:00
Khaled Emara
2720ad5fd9 freedreno: disable tiling for cubemaps
Tiling doesn't work quite well with cubemaps.
Revert to linear textures, until it's fixed.
2019-08-12 22:30:54 +00:00
Khaled Emara
0ae16fb565 freedreno: add tiling parameters for 2D/2DArray/3D 2019-08-12 22:30:54 +00:00
Khaled Emara
aeaba3e4a6 freedreno: simplified slices setup for a3xx
a3xx doesn't support ASTC and layout_first always returns false
2019-08-12 22:30:54 +00:00
Khaled Emara
e11a239e8c freedreno: enable tiled textures for debug builds 2019-08-12 22:30:54 +00:00
Rhys Perry
7740149852 nir: merge and extend nir_opt_move_comparisons and nir_opt_move_load_ubo
v2: add to series
v3: update Makefile.sources
v4: don't remove a comment and break statement
v4: use nir_can_move_instr

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-08-12 22:01:30 +00:00
Rhys Perry
da8ed68aca nir: replace nir_move_load_const() with nir_opt_sink()
This is mostly the same as nir_move_load_const() but can also move
undef instructions, comparisons and some intrinsics (being careful with
loops).

v2: actually delete nir_move_load_const.c
v3: fix nir_opt_sink() usage in freedreno
v3: update Makefile.sources
v4: replace get_move_def with nir_can_move_instr and nir_instr_ssa_def
v4: handle if uses
v4: fix handling of nested loops
v5: re-write adjust_block_for_loops
v5: re-write setting of use_block for if uses

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Co-authored-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-08-12 22:01:30 +00:00
Andreas Baierl
1c45541c7f lima/ppir: Add fddx and fddy
Lower fddx and fddy and set the right bits in codegen.

Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
2019-08-12 23:20:04 +02:00
Francisco Jerez
026773397b iris/gen9: Optimize slice and subslice load balancing behavior.
See "i965/gen9: Optimize slice and subslice load balancing behavior."
for the rationale.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-08-12 13:17:58 -07:00
Alyssa Rosenzweig
15954ab6ca pan/midgard: Implement nir_intrinsic_load_num_work_groups
Just a sysval to route through.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-12 12:43:02 -07:00
Alyssa Rosenzweig
60d80157d1 panfrost: Force flush every compute job
This is of course suboptimal for performance, forcing each
glDispatchCompute call to be submitted separately to the kernel and
finish to completion. However, for the initial bring-up of compute jobs,
this simplifies quite a bit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-12 12:42:59 -07:00
Alyssa Rosenzweig
2efa025b05 panfrost: Add SSBO system value
For each SSBO index we get from Gallium/NIR, we need two pieces of
information in the shader:

1. The address of the SSBO in GPU memory. Within the shader, we'll be
accessing it with raw memory load/store, so we need the actual address,
not just an index.

2. The size of the SSBO. This is not strictly necessary, but at some
point, we may like to do bounds checking on SSBO accesses.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-12 12:42:59 -07:00
Alyssa Rosenzweig
e881aa8c12 gallium/util: Add u_stream_outputs_for_vertices helper
This u_prim.h helper determines the number of outputs for stream output,
given a particular primitive type and a vertex count. This is useful for
statically calculating sizes of stream output buffers (i.e. when there
is no geometry/tessellation shader in use).

This helper will be used in Panfrost's transform feedback
implementation, as you can probably guess since why else would I be
submitting it....

See also dEQP's getTransformFeedbackOutputCount routine.

v2: Simplify definition using new helpers, which also extends to non-ES2
primitive types (Eric).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-08-12 12:22:54 -07:00
Marek Olšák
8ce4f9bbc3 radeonsi: remove the always_nir option
tgsi_to_nir is no longer optional if NIR is enabled.
2019-08-12 14:52:17 -04:00
Marek Olšák
4e545f934f radeonsi/nir: implement default tess level system values
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-08-12 14:52:17 -04:00
Marek Olšák
9c7746ceae compiler: add SYSTEM_VALUE_TESS_LEVEL_OUTER/INNER_DEFAULT
TCS system values for internal passthru TCS, needed by radeonsi NIR support

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-08-12 14:52:17 -04:00
Marek Olšák
5167ca27fa gallium: add TGSI_SEMANTIC_DEFAULT_OUTER/INNER_LEVEL
for radeonsi NIR support.
2019-08-12 14:52:17 -04:00
Marek Olšák
f8d4198998 tgsi_to_nir: handle tess level inner/outer varyings
for internal radeonsi shaders

Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-08-12 14:52:17 -04:00
Marek Olšák
8ac2583cd8 tgsi_to_nir: add support for the stencil FS output
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-08-12 14:52:17 -04:00
Marek Olšák
f3f1d0dfd0 tgsi_to_nir: add support for TEX_LZ
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-08-12 14:52:17 -04:00
Marek Olšák
1b881852bc compiler: add SYSTEM_VALUE_USER_DATA_AMD
for internal radeonsi shaders
2019-08-12 14:52:17 -04:00
Marek Olšák
f0ccc5457a compiler: add shader_info.cs.user_data_components_amd 2019-08-12 14:52:17 -04:00
Marek Olšák
155789c8e7 tgsi_to_nir: add basic compute shader support
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-08-12 14:52:17 -04:00