Commit graph

47096 commits

Author SHA1 Message Date
Brian Paul
c60eb632b7 docs: document known issues with Viewperf 11 2011-10-20 15:13:17 -06:00
Eric Anholt
31874f074c i965/vs: Fix comparisons with uint negation.
The condmod instruction ends up generating garbage condition codes,
because apparently the comparison happens on the accumulator value (33
bits for UD), not the truncated value that would be written.

Fixes vs-op-neg-*

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2011-10-20 09:51:58 -07:00
Eric Anholt
73b0a28ba8 i965/fs: Fix comparisions with uint negation.
The condmod instruction ends up generating garbage condition codes,
because apparently the comparison happens on the accumulator value (33
bits for UD), not the truncated value that would be written.

Fixes fs-op-neg-*

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2011-10-20 09:50:49 -07:00
Christoph Bumiller
55c5ad8dfa d3d1x: make use of new query types 2011-10-20 18:03:54 +02:00
Christoph Bumiller
1f4f0c41db softpipe: implement/fix TIMESTAMP queries 2011-10-20 18:03:49 +02:00
Christoph Bumiller
10f67c070b gallium: add new query types and missing documentation 2011-10-20 18:03:23 +02:00
Eric Anholt
c0cd947117 mesa: Fix detection of whether an ARB_vp is enabled for two sided lighting.
When there is no ARB_vertex_program program enabled, the Current
pointer points at a default program, so we were always using
VERTEX_PROGRAM_TWO_SIDE, even for fixed function lighting.

Fixes piglit two-sided-lighting*

Reviewed-by: Brian Paul <brianp@vmware.com>
2011-10-20 08:45:20 -07:00
Eric Anholt
f80e1e7d1d mesa: Round the argument to PixelStoref instead of truncating.
From the GL 2.1 specification, page 114 (page 128 of the PDF):

    "The version of PixelStore that takes a floating-point value
     may be used to set any type of parameter; if the parameter is
     boolean, then it is set to FALSE if the passed value is 0.0
     and TRUE otherwise, while if the parameter is an integer, then
     the passed value is rounded to the nearest integer."

Fixes piglit roundmode-pixelstore.
Note: This is a candidate for the 7.11 branch.

Reviewed-by: Brian Paul <brianp@vmware.com>
2011-10-20 08:45:07 -07:00
Yuanhan Liu
46d5fb576a mesa: handle PBO access error in display list mode
Simply generate GL_INVALID_OPERATION error at display list mode. As
explained by Brian, we are going to access PBO data at compile time.
No need to defer the error at execution time.

Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2011-10-20 11:42:54 +08:00
Brian Paul
3560027977 i965: silence signed/unsigned comparison warning
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2011-10-19 13:54:42 -06:00
Brian Paul
d89c6689df st/mesa: remove primitive restart assertion
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
2011-10-19 10:24:52 -06:00
Jakob Bornecrantz
07c3e752f8 st/mesa: Don't have indices buffers map when calling draw 2011-10-19 10:12:38 -06:00
Jakob Bornecrantz
72bd2b603b st/mesa: Implement primitive restart in software 2011-10-19 10:10:12 -06:00
Brian Paul
d3561bd0bc swrast: fix float->uint conversion of gl_FragDepth
Using IROUND() to convert a float depth value to a 32-bit uint Z value.
didn't work (it returns a signed value).  Just use a cast instead

Fixes piglit fbo-depth-array failure with swrast.

Note: this is a candidate for the 7.11 branch.
2011-10-19 09:32:30 -06:00
Brian Paul
ab9136ef75 mesa: better debug messages in _mesa_test_texobj_completeness()
And use a gl_texture_image var to simplify the code a bit.
2011-10-19 09:32:02 -06:00
José Fonseca
35ffe94a34 mesa/st: Backport WPOS adjustment fixes from st_mesa_to_tgsi.c to st_glsl_to_tgsi.cpp.
This is a trivial verbatim copy of the code from Christoph Bumiller's commit
f986a6560f.

Fixes fdo 39939 and 39942.
2011-10-19 16:59:47 +02:00
Thomas Hellstrom
60f67cd1f1 winsys/svga: Remove some unneeded debug code
This code isn't really relevant since the kernel takes care not
to destroy busy GMR buffers.

Also with the advent of fence objects, the code was incorrect since
it didn't refcount fence handles.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
2011-10-19 15:33:26 +02:00
Vinson Lee
116b7bb5ea scons: Add uniform_query.cpp to SConscript. 2011-10-18 18:39:11 -07:00
Yuanhan Liu
02b801c1ed mesa: handle the pbo case for save_Bitmap
Wrap _mesa_unpack_bitmap to handle the case that data is stored in pixel
buffer object.

This would make calling Bitmap with data stored in PBO by display list work.

Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2011-10-19 09:29:44 +08:00
Yuanhan Liu
403cf7c56f mesa: fix inverted pbo test error at _mesa_GetnCompressedTexImageARB
It seems like a typo.

Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2011-10-19 09:28:51 +08:00
Yuanhan Liu
9024d8af0a mesa: generate error if pbo offset is not aligned with the size of specified type
v2: quote the spec; explicitly exclude the GL_BITMAP case to make code
    more readable. (comments from Ian)

v3: Cast the offset by GLintptr to remove the compile warning(comments
    from Brian).

    I also found that I should use _mesa_sizeof_packed_type() instead,
    as it includes packed pixel type, like GL_UNSIGNED_SHORT_5_6_5.

Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2011-10-19 09:25:30 +08:00
Yuanhan Liu
76669381c0 i965: setup address rounding enable bits
The patch(based on the reading of the emulator) came from while I was
trying to fix the oglc pbo texImage.1PBODefaults fail. This case
generates a texture with the width and height equal to window's width
and height respectively, then try to texture it on the whole window.
So, it's exactly one texel for one pixel.  And, the min filter and mag
filter are GL_LINEAR. It runs with swrast OK, as expected. But it failed
with i965 driver.

Well, you can't tell the difference from the screen, as the error is
quite tiny. From my digging, it seems that there are some tiny error
happened while getting tex address. This will break the one texel for
one pixel rule in this case. Thus the linear result is taken, with tiny
error.

This patch would fix all oglc pbo subcase fail with the same issue on
both ILK, SNB and IVB.

v2: comments from Ian, make the address_round filed assignment consistent.
    (the sampler is alread memset to 0 by the xxx_update_samper_state
     caller, so need to assign 0 first)

Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2011-10-19 09:24:54 +08:00
Brian Paul
483ea0a76f i915: make i830/i915_hiz_resolve_noop() static 2011-10-18 19:12:27 -06:00
Brian Paul
5485192fc8 mesa: use format string in _mesa_error() call to silence warning 2011-10-18 19:00:07 -06:00
Brian Paul
973b4ddd0e i965: remove unused vars in brw_set_ff_sync_message() 2011-10-18 19:00:07 -06:00
Ian Romanick
58a7461e16 glsl_to_tgsi: Use _mesa_generate_parameters_list_for_uniforms
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Bryan Cain <bryancain3@gmail.com>
2011-10-18 17:26:38 -07:00
Ian Romanick
b2572928a5 ir_to_mesa: Generate gl_program_parameter list by walking the GLSL IR.
Generate the program parameters list by walking the IR instead of by
walking the list of linked uniforms.  This simplifies the code quite a
bit, and is probably a bit more correct.  The list of linked uniforms
should really only be used by the GL API to interact with the
application.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: Bryan Cain <bryancain3@gmail.com>
Cc: Eric Anholt <eric@anholt.net>
2011-10-18 17:26:38 -07:00
Ian Romanick
bbbb8345ab ir_to_mesa: Move some things outside the 'extern "C"' blocks
Having a few of these includes or forward declarations inside the
'extern "C"' block can cause problems later.  Specifically, it
prevents C++ linkage functions from being added to ir_to_mesa.h and
makes G++ angry if 'struct foo' is seen both inside and outside an
'extern "C"'.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-10-18 17:26:38 -07:00
Ian Romanick
1375d67984 mesa: Use glsl_type::gl_type in glGetActiveUniform
This has the same value has gl_program_parameter::DataType field.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-10-18 17:26:38 -07:00
Ian Romanick
a541ff3fb9 mesa: Move _mesa_GetActiveUniformARB to uniform_query.cpp
Fold _mesa_get_active_uniform into its only caller in the process.
More changes are coming soon.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-10-18 17:26:37 -07:00
Ian Romanick
118fd08b58 mesa: Simplify uniform debug logging logic
This simplificiation was enabled by the earlier refactors that
eliminated the references to the assembly shaders stored in the
gl_shader_program structure.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-10-18 17:26:37 -07:00
Kenneth Graunke
188f074255 i965: Disassemble Ivybridge Data Port/Data Cache messages.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-18 15:57:56 -07:00
Kenneth Graunke
dcf03e7c09 i965: Document most of the brw_instruction message structs.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-18 15:57:55 -07:00
Kenneth Graunke
53798f90e8 i965: Rename pixel_scoreboard_clear to last_render_target for clarity.
Finding this bit in the documentation proved challenging.  It wasn't in
the SEND instruction's message descriptor section, nor the data port
message descriptor section.  It turns out to be part of the Render
Target Write message's control bits, and in the documentation is named
"Last Render Target Select".

Shaders that use Multiple Render Targets should set this bit on the last
RT write, but not on any prior ones.

The GPU does update the Pixel Scoreboard appropriately, but doesn't
document this bit as directly causing a scoreboard clear.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-18 15:57:55 -07:00
Kenneth Graunke
feaff3aeeb i965: Remove duplicate copies of mlen & rlen from instruction decode.
After printing the details of a specific message, we always print out
the message length and response length with nice "mlen" and "rlen"
labels.

For Gen5+ URB writes, we were dumping mlen and rlen a second time:
urb 0 urb_write interleave used complete mlen 5, rlen 0 mlen 5 rlen 0

Also, for Gen6 data port messages, we were including mlen and rlen in
the tuple of undecipherable integers.

Both of these are completely redundant.  So, remove them.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-18 15:57:55 -07:00
Kenneth Graunke
fa0aa3796d i965: Factor out code for setting Message Descriptors.
Every brw_set_???_message function had duplicated code, per-generation,
to set the Message Descriptor and Extended Message Descriptor bits
(SFID, message length, response length, header present, end of thread).

However, these fields are actually specified as part of the SEND
instruction itself; individual types of messages don't even specify
them (except for header present, but that's in the same bit location).

Since these are exactly the same regardless of the message type, just
create a function to set them, using the generic message structs.  This
not only shortens the code, but hides a lot of the per-generation
complexity (like the SFID being in destreg__conditionalmod) in one spot.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-18 15:57:55 -07:00
Kenneth Graunke
43ccd3200c i965: Remove EOT parameter from brw_SAMPLE and brw_set_sampler_message.
The existing code asserted that eot == 0, as it doesn't make sense for
a thread to sample a texture as the last thing it does.

It doesn't make much sense to pass around a dead parameter either.
Especially for a function which already has a long parameter list.

So, remove the parameter and just set EOT to 0.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-18 15:57:55 -07:00
Kenneth Graunke
0ec04c5a33 i965: Document the brw_instruction Message Descriptor structures.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-18 15:57:55 -07:00
Kenneth Graunke
2e124388a4 i965: Rename BRW_MESSAGE_TARGET_* to BRW_SFID_* and document them.
When reading the data port code, it was not clear to me what these
values meant, nor where I could find them in the documentation.
Especially since the latest BSpec and older PRMs document them in
radically different places...neither of which are near the descriptions
of individual messages.

Cite the documentation, and rename them to SFID to signify that these
are Shared Function IDs that one can read about in the GPU overview,
rather than arbitrary bitfields.  While we're add it, make them an enum.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-18 15:57:55 -07:00
Kenneth Graunke
bbea5c5a5a i965: Clarify check for which cache to use on Gen6 data port reads.
Currently, we use the Render Cache for scratch access (read/write data)
and the Sampler Cache for all read only data (pull constants).

Reversing the condition here is clearer: if the caller requested the
Render Cache, use that.  Otherwise, they requested the Data Cache
(which does not exist on Gen6) or Sampler Cache, so use the Sampler
Cache.

This should not change behavior in any way.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2011-10-18 15:57:55 -07:00
Kenneth Graunke
0d4a9ba9b2 i965: Use Ivybridge's "Legacy Data Port" for reads/writes.
Using the constant cache for reads isn't going to work for scratch
reads (variably-indexed arrays or register spills), as these aren't
constant at all.

Also, in the new VS backend, use the proper message number for OWord
Dual Block Write messages.  It's now 10, instead of 9.

+205 piglits.

NOTE: This is a candidate for the 7.11 branch.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-18 15:57:47 -07:00
Brian Paul
9a8791c889 softpipe: remove unused vars in softpipe_clear() 2011-10-18 15:43:22 -06:00
Kenneth Graunke
3c22e35165 glsl: Stop tree grafting if a variable is overwritten as an 'out' param.
While reviewing some compiler cleanups I'd sent out, Paul noticed that
tree grafting wasn't taking "out" parameters into account.

Further investigation revealed that it isn't strictly necessary: ir_call
ends basic blocks, and tree grafting currently only operates on basic
blocks.  So calls already kill grafts.

However, just to be safe, this patch makes "out" parameters explicitly
kill grafts.  Paul and I both prefer this.  It's a bit clearer.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2011-10-18 12:24:48 -07:00
Chad Versace
f8377b411d intel: Add 'mode' param to intel_region_map
The 'mode' param is a bitset of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT.

A future commit will perform buffer resolves in intel_region_map().  So,
even though the access mode is irrelevant to the GTT, the extra
information allows us to intelligently avoid unneccessary buffer resolves.

Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-10-18 11:42:54 -07:00
Chad Versace
7b0f748efa intel: Add HiZ operations to intel_context::vtbl for all drivers
Add the following to the vtbl:
    hiz_resolve_depthbuffer
    hiz_resolve_hizbuffer

For all drivers for which HiZ is not enabled, the methods are set to be
no-ops. If HiZ is enabled, the methods are currently to set to empty
stubs.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-10-18 11:42:54 -07:00
Chad Versace
b393fa9167 i965: Initialize intel_context::vtbl after calling intelInitContext()
intel_context::gen field is set by intelInitContext(). So, by calling
intelInitContext() before initializing the vtable, we can can construct
different vtables for different gens.

Specifically, this allows us to set the HiZ operations to be no-ops for
contexts for which HiZ is not enabled.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-10-18 11:42:54 -07:00
Chad Versace
ef6de0141c intel: Fix scatter/gather for depthstencil textures
During anholt's MapTextureImage refactoring, the call to
intel_tex_image_s8z24_create_renderbuffers was missplaced. It needs to
occur *after* the miptree is allocated.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-10-18 11:42:54 -07:00
Chad Versace
b48e02383e i965/gen6: Fix segfault in prepare_blend_state()
Don't dereference the color buffer if one isn't attached.

This fixes the following Piglit tests in my experimental HiZ branch:
    glean/logicOp
    glean/paths

Note: This is a candidate for the stable branches.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-10-18 11:42:54 -07:00
Chad Versace
8c7c589c4e vbo: Redeclare bind_array() as non-static vbo_bind_array()
This is necessary because i965 will need to call vbo_bind_array() when
cleaning up after a buffer resolve meta-op.

Detailed Explanation
--------------------
The vbo module tracks vertex attributes separately from the gl_context.
Specifically, the vbo module maintins vertex attributes in
vbo_exec_context::array::inputs, which is synchronized with
gl_context::Array::ArrayObj::VertexAttrib by vbo_bind_array().
vbo_draw_arrays() calls vbo_bind_array() to perform the synchronization
before calling the real draw call, vbo_context::draw_arrays.

Intel hardware accomplishes buffer resolves with a meta-op. Frequently,
that meta-op must be performed within glDraw* in the moment immediately
before the draw occurs (The hardware designers hate us...). After
performing the meta-op, but before calling vbo_bind_array(), the
gl_context's vertex attributes will have been restored to their original
state (that is, their state before the meta-op began), but the vbo
module's vertex attribute are those used in the last meta-op. Therefore we
must manually synchronize the two with vbo_bind_array() before continuing
with the original draw command (that is, the one requested with glDraw*).

See brw_predraw_resolve_buffers(), which will be added in a future commit.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-10-18 11:42:54 -07:00
Chad Versace
fd7c46f53f mesa: Add dd_function_table::PrepareExecBegin
This hook allows the driver to prepare for a glBegin/glEnd.

i965 will use the hook to avoid avoid recursive calls to FLUSH_VERTICES
during a buffer resolve meta-op.

Detailed Justification
----------------------
When vertices are queued during a glBegin/glEnd block, those vertices must
of course be drawn before any rendering state changes. To enusure this,
Mesa calls FLUSH_VERTICES as a prehook to such state changes. Therefore,
FLUSH_VERTICES itself cannot change rendering state without falling into
a recursive trap.

This precludes meta-ops, namely i965 buffer resolves, from occuring while
any vertices are queued. To avoid that situation, i965 must satisfy the
following condition: that it queues no vertex if a buffer needs resolving.
To satisfy this, i965 will use the PrepareExecBegin hook to resolve all
buffers on entering a glBegin/glEnd block.

--------
v2: Don't add dd_function_table::CleanupExecEnd. Anholt and I discovered
    that hook to be unnecessary.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-10-18 11:42:53 -07:00