Commit graph

160941 commits

Author SHA1 Message Date
Rob Clark
c0cdc148f4 freedreno: Add perf-debug trace
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18926>
2022-10-08 14:25:29 +00:00
Rob Clark
f6f72b5629 freedreno/drm: Don't call kernel with no ops
When called with FD_BO_PREP_FLUSH as the only op bit set, the intention
is to only sync with the submit-queue.. we shouldn't be calling down to
the kernel (where op==0 gets interpreted as MSM_PREP_READ).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18926>
2022-10-08 14:25:29 +00:00
Rob Clark
6dcc524035 freedreno: Use TC cpu-storage to shadow buffers
We still use the shadow path for non-buffer updates, where TC isn't
playing any tricks.  But for correctness we need to use the cpu-
storage approach, instead of buffer shadowing, otherwise we can race
with the frontend thread for PIPE_MAP_UNSYNCHRONIZED access.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7262
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18926>
2022-10-08 14:25:28 +00:00
Thomas Debesse
3aa76e6a05 r600: info.stage MESA_SHADER_KERNEL as MESA_SHADER_COMPUTE
Fixes:

src/gallium/drivers/r600/sfn/sfn_nir.cpp:832: int r600_shader_from_nir(r600_context*, r600_pipe_shader*, r600_shader_key*): Assertion `shader' failed.

karolherbst said:

> long term r600 should implement PIPE_CAP_SHAREABLE_SHADERS

Signed-off-by: Thomas Debesse <dev@illwieckz.net>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18963>
2022-10-08 11:44:52 +00:00
Thomas Debesse
98cace5224 r600: set clear_buffer = u_default_clear_buffer
Fixes:

thread '<unnamed>' panicked at 'Context missing features. This should never happen!', ../src/gallium/frontends/rusticl/mesa/pipe/context.rs:44:13

Signed-off-by: Thomas Debesse <dev@illwieckz.net>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18962>
2022-10-08 11:36:41 +00:00
Konstantin Seurer
505dd284c1 radv: Remove main_loop_case_visited
Totals from 7 (14.00% of 50) affected shaders:
CodeSize: 219168 -> 216732 (-1.11%)
Instrs: 40211 -> 40040 (-0.43%)
Latency: 963520 -> 961498 (-0.21%)
InvThroughput: 221435 -> 220974 (-0.21%)
Copies: 5634 -> 5562 (-1.28%)
PreSGPRs: 387 -> 380 (-1.81%)

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18929>
2022-10-08 09:44:50 +00:00
Konstantin Seurer
d4345ec4d2 radv: Use cache_uuid for accel struct compatibility
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18938>
2022-10-08 09:23:55 +00:00
Dave Airlie
12efb83ae8 gallivm/sample: refactor multisample offset calcs code.
Just consoldiate this

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18264>
2022-10-08 09:56:50 +10:00
Dave Airlie
b4f132b2dd gallivm/nir: drop some unused struct members.
These weren't used in the nir paths.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18264>
2022-10-08 09:56:46 +10:00
Dave Airlie
c457e1f0e4 gallivm/sample: move some first_level/last_level calcs out
There were a fair few instances of first/level dynamic state getting,
these could be moved up a level or two and made more common.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18264>
2022-10-08 09:56:18 +10:00
Daniel Stone
3052d30dc2 CI: Re-enable Collabora devices
Friday maintenance is done.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18998>
2022-10-07 18:38:45 +00:00
Erik Faye-Lund
b666c203ee gallium/u_threaded_context: remove stale comment
We're now using PIPE_SHADER_MAX_SAMPLER_VIEWS, so this advice is
outdated.

Fixes: 620c5e9dd0 ("gallium/u_threaded_context: Use PIPE_MAX_SHADER_SAMPLER_VIEWS for sampler_buffers")
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18973>
2022-10-07 17:06:58 +00:00
Sathishkumar S
12acee17fa frontends/va: reallocate surface for yuv400/yuv444 picture
reallocate the surface appropriately based on the mjpeg sampling factor

v2:
use macros for mjpeg sampling factors (Ruijing Dong)
indentation fix (Thong Thai)

v3:
add comments to mention workaround of reallocation (Boyuan Zhang)

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18914>
2022-10-07 15:14:39 +00:00
James Zhu
3e2f7905a6 radeonsi/vcn: enable jpeg decode of yuv444 and yuv400
v2: set third plane offset only for 3 plane formats (Boyuan Zhang)

Signed-off-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18914>
2022-10-07 15:14:39 +00:00
Sathishkumar S
6b933676cc frontends/va: support yuv 400/444 rt_formats in vaconfig
check if vaprofile supports decode of yuv400 and yuv444 formats
and enable the corresponding rt_formats in vaconfig.

v2: use config->entrypoint as param instead of BITSTREAM (Sil Vilerino)

Signed-off-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18914>
2022-10-07 15:14:39 +00:00
James Zhu
d2c0ff1caf frontends/va: add support for yuv400 and yuv444
v2: indentation fixes (Saleem)

Signed-off-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18914>
2022-10-07 15:14:39 +00:00
James Zhu
9055ab9de3 util/format: add util format y8_400_unorm
Signed-off-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18914>
2022-10-07 15:14:39 +00:00
Rajnesh Kanwal
791f187405 pvr: Add vulkan shader factory headers for Query and clear APIs.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18976>
2022-10-07 14:23:05 +00:00
Rajnesh Kanwal
0923de04ba pvr: Split pds compute shader create and upload code for reuse.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18976>
2022-10-07 14:23:05 +00:00
Rajnesh Kanwal
b8d9afe75c pvr: Remove double error reporting.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18976>
2022-10-07 14:23:05 +00:00
Rajnesh Kanwal
b03e73a024 pvr: Fix allocation size passed in pvr_cmd_buffer_alloc_mem.
pvr_cmd_buffer_alloc_mem takes size in bytes. This change
fixes the invocations which assume it to be size in dwords.

Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18976>
2022-10-07 14:23:05 +00:00
Rajnesh Kanwal
0b694c2eb3 pvr: Fix heap type of availability_buffer allocation.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18976>
2022-10-07 14:23:05 +00:00
Rajnesh Kanwal
c229916e38 pvr: Update buffer type macro names for consistency.
Also changing struct pvr_descriptor_program_input to
struct pvr_pds_descriptor_program_input for consistency with
other similar structs defined in pvr_pds.h.

Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18976>
2022-10-07 14:23:05 +00:00
Simon Zeni
9e84fc73be mesa: unlock texture on error path in glEGLImageTargetTexStorageEXT
The texture mutex was not properly unlocked on error path, leading to deadlocks

Fixes: 6a3f5c65 ("mesa: simplify st_egl_image binding process for texture storage")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7422

Signed-off-by: Simon Zeni <simon@bl4ckb0ne.ca>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18964>
2022-10-07 09:52:31 -04:00
Diogo Ivo
941c70a28a nouveau: treat DRM_FORMAT_INVALID as implicit modifier
Failing to allocate resources when DRM_FORMAT_INVALID
is passed as a modifier breaks tegra. Change this behaviour
so that this modifier is instead interpreted as a don't care,
allowing for the driver to choose an appropriate modifier internally.

v2: change nouveau instead of tegra (Thierry Rieding)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6693
Fixes: 129d83cac2 ("nouveau: Use format modifiers in buffer allocation")
Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18649>
2022-10-07 13:35:52 +00:00
Gert Wollny
5cd3e39503 r600/sfn: Make sure all components are usable when lowering TF inputs
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18983>
2022-10-07 11:33:57 +02:00
Gert Wollny
a34003d472 r600/sfn: Always enforce LDS operation order
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18983>
2022-10-07 11:33:57 +02:00
Gert Wollny
6b767f83c3 r600/sfn: Unroll loops after doing some optimizations
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18983>
2022-10-07 11:33:57 +02:00
Gert Wollny
3290978053 r600/sfn: assert on use of abs modifier in op3
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18983>
2022-10-07 11:33:57 +02:00
Gert Wollny
e840645bb7 r600/sfn:explicitly initialize the memory pool
This reduces the overhead of checking with each allocation
whether the pool is already initialized.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18983>
2022-10-07 11:33:57 +02:00
Gert Wollny
04aea1c0ba r600/sfn: Use the correct allocator for loop lists
This fixes a memory leak.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18983>
2022-10-07 11:33:57 +02:00
Gert Wollny
4b7ae72c46 r600/sfn: Fix typo
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18983>
2022-10-07 11:33:57 +02:00
Gert Wollny
5bdbbe5399 r600/sfn: Delete final lowered nir shader early
Since this is no longer needed we can as well free the
memory right away instead of waiting until the parent
shader is freed.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18983>
2022-10-07 11:33:57 +02:00
Gert Wollny
47bd2b7afc r600/sfn: Add peephole optimization for kill instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18983>
2022-10-07 11:33:57 +02:00
Gert Wollny
6de40d17ba r600/sfn: don't propagate registers into conditional test
We don't check whether the register is overwritten between the actual
conditional test and the test of the used result, so don't try to
optimize the evaluation of the conditional.

Fixes: 79ca456b48
   r600/sfn: rewrite NIR backend

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18983>
2022-10-07 11:33:57 +02:00
Gert Wollny
99b7a12ec1 r600/sfn: Always start a new CF after a KILL instruction
Docu says:

   Ensure that the KILL* instruction is the last instruction
   in an ALU clause, because the remaining instructions executed
   in the clause do not reflect the updated valid state after
   the kill operation.

Fixes: 79ca456b48
    r600/sfn: rewrite NIR backend

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18983>
2022-10-07 11:33:57 +02:00
Gert Wollny
82b22e7fb9 r600/sfn: Only run 64 bit ops lowering passes when really needed
If the shader doesn't do 64 bit then there is no need to run these
lowering passes.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18983>
2022-10-07 11:33:57 +02:00
Lucas Stach
ed3caf4866 etnaviv: pass shader key by reference
The shader key has grown substancially since the introduction of the
shadow sampler lowering to the point where passing it by value when
looking for the right variant matching the current state is showing
up in the CPU profiles. Pass the key by reference to get rid of this
overhead.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18968>
2022-10-07 08:36:31 +00:00
Lucas Stach
a1af7ae96a etnaviv: slim down etna_shader_key
The max number of exposed fragment samplers and views on any hardware is 16,
so there is no point in having arrays of 128 entries to track information
for the shadow sampler lowering in the shader key. Most of them will never
be used. Reduce the size of the arrays to what is actually necessary and add
a assert to make sure the sampler (view) limit isn't bumped without a
matching change in the shader key.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18968>
2022-10-07 08:36:31 +00:00
Lionel Landwerlin
1964899c28 intel: add INTEL_DEBUG=capture-all to capture everything upon hang
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewd-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18977>
2022-10-07 07:45:22 +00:00
Jason Ekstrand
650880105e vulkan,lavapipe: Use a tri-state enum for depth clip enable
This should make it a lot more clear how depth clip enables work.
Annoyingly, because of the way they originally worked in Vulkan 1.0,
it's dependent on the depth clamp if the state isn't set in the pipeline
and isn't declared dynamic.  The enum is explicitly set up so that
drivers don't need to be aware of this change unless they already
implement VK_EXT_extended_dynamic_state3.  If depth clamp/clamp are not
dynamic, depth clip will be either TRUE or FALSE which map to 1/0 so the
field can still be treated as a boolean.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18889>
2022-10-07 06:22:32 +00:00
Pavel Ondračka
0d3bc8c5b9 r300: be more careful when pair merging with presubtract
and when some argument reads both from rgb and apha. We would fail to
properly rewrite the sources in such case.

Consider the following instructions:
2: src0.xyz = const[3], src1.xyz = temp[6], srcp.xyz = (src1 - src0)
   CMP temp[8].x, src0.0__, src0.1__, srcp.x__
   ...
5: src0.xyz = const[1], src0.w = const[1]
   MAX temp[10].xy, |src0.xz_|, |src0.yw_|

We can merge them together into pair like
 2: src0.xyz = const[3], src1.xyz = temp[6], src2.xyz = const[1], src2.w = const[1], srcp.xyz = (src1 - src0)
    MAX temp[10].xy, |src2.xz_|, |src2.yw_|
    CMP temp[8].w, src0.0, src0.1, srcp.x

However the current code fails to do so properly and we end with this:
  2: src0.xyz = const[3], src0.w = const[1], src1.xyz = temp[6], src2.xyz = const[1], srcp.xyz = (src1 - src0)
     MAX temp[10].xy, |src2.xz_|, |src2.yw_|
     CMP temp[8].w, src0.0, src0.1, srcp.x
where the src2.w is undefined.

Just check for the the case where the arguments reads both from rgb and
alpha and bail out from the merge.

Fixes the following dEQPs:
dEQP-GLES2.functional.uniform_api.random.47
dEQP-GLES2.functional.uniform_api.value.initial.render.array_in_struct.float_vec4_both
dEQP-GLES2.functional.uniform_api.value.initial.render.basic_array.vec4_both

Only a minor change in shader-db with RV530:
total instructions in shared programs: 180847 -> 180864 (<.01%)
instructions in affected programs: 3178 -> 3195 (0.53%)
helped: 2
HURT: 16

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18991>
2022-10-07 05:40:00 +00:00
Daniel Stone
bd74a6fc18 CI: Collabora farm down for maintenance
We have major maintenance planned tomorrow, so let's just disable LAVA
until it comes back.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18987>
2022-10-07 03:36:39 +00:00
Christian Gmeiner
1ebd3fb3ad ci/etnaviv: add GC7000 support
Will be used in combination with Nitrogen8M boards.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13691>
2022-10-06 07:30:34 +02:00
Christian Gmeiner
37cddadf29 ci/bare-metal: introduce BM_MKBOOT_PARAMS
Make it possible to provide per device mkimage.py params.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13691>
2022-10-06 07:30:34 +02:00
Christian Gmeiner
13c6d7e97d ci: switch to mkbootimg.py
On ARM64 appending the dtb does not work with U-Boot and fastbooting
with such an image failes like:

  ## Booting Android Image at 0x40480000 ...
  Kernel load addr 0x00000000 size 30514 KiB
  Kernel command line: ip=dhcp console=ttymxc0,115200n8 root=/dev/nfs rw nfsrootdebug init=/init nfsroot=10.10.10.17:/mnt/disks/testing-nfs-root/gc7000-00,vers=3,tcp
  RAM disk load addr 0x00000000 size 1 KiB
  Error: header_version must be >= 2 to get dtb
     Loading Kernel Image
  "Error" handler, esr 0xbf000002
  elr: 000000004029ce70 lr : 000000004029cf0c (reloc)
  elr: 00000000be59ae70 lr : 00000000be59af0c
  x0 : 0000000000100000 x1 : 0000000040580800
  x2 : 0000000000010000 x3 : 00000000000020c0
  x4 : f9402063f9400463 x5 : 0000000000000000
  x6 : 0000000000100000 x7 : 0000000006000000
  x8 : 00000000b64f1488 x9 : 0000000000000008
  x10: 00000000b651c450 x11: 00000000b653df68
  x12: 0000000000000000 x13: 0000000000000200
  x14: 0000000000000000 x15: 0000000000000020
  x16: 00000000be55acc8 x17: 0000000000004530
  x18: 00000000b64fddc0 x19: 0000000000100000
  x20: 0000000040580800 x21: 0000000001ccc4af
  x22: 0000000000010000 x23: 0000000000010000
  x24: 0000000040480800 x25: 00000000b64f15c8
  x26: 0000000000000000 x27: 0000000000000000
  x28: 0000000040480800 x29: 00000000b64f1470

  Code: d65f03c0 f8636824 f8236804 91002063 (cb030044)
  Resetting CPU ...

  resetting ...

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13691>
2022-10-06 07:30:34 +02:00
Christian Gmeiner
1cba34d8d5 ci: include etnaviv support in ARM64 container
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13691>
2022-10-06 07:30:32 +02:00
Timur Kristóf
df3fdbdeb5 aco: Fix build error with std::max on GCC 12
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18969>
2022-10-05 20:22:04 +00:00
Timur Kristóf
3ca8402ec7 ac/nir/ngg: Fix cross-invocation indices and cull outputs.
The layout calculation accidentally thought these would be
stored in variables, but that's not the case.

Fixes: 697ea02202
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18846>
2022-10-05 19:47:25 +00:00
Brian Paul
458fc9ce81 cso: asst. clean-ups in cso_context.[ch]
Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18954>
2022-10-05 19:03:27 +00:00