Commit graph

1728 commits

Author SHA1 Message Date
Samuel Pitoiset
0eb30d81c4 ac: add 'const' qualifiers to the shader info pass
For clarification purposes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-12 12:25:21 +01:00
Samuel Pitoiset
20f7f9a328 ac: remove unused ac_nir_compiler_options from gather_info_input_decl()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-12 12:25:19 +01:00
Dave Airlie
e37db93246 radv: trim buffer load result (fixes dota2)
Running dota2 since the below commit crashes with an llvm assert.

Trim the vector like the other user. This possible could also be
avoided by not padding inside the load vec3->vec4.

Fixes: 41c36c4549 (amd/common: use ac_build_buffer_load() for emitting UBO loads)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-01-12 00:41:55 +00:00
Dylan Baker
2083a14179 meson: Use dependencies for nir
This creates two new internal dependencies, idep_nir_headers and
idep_nir. The former encapsulates the generation of nir_opcodes.h and
nir_builder_opcodes.h and adding src/compiler/nir as an include path.
This ensures that any target that needs nir headers will have the
includes and that the generated headers will be generated before the
target is build. The second, idep_nir, includes the first and
additionally links to libnir.

This is intended to make it easier to avoid race conditions in the build
when using nir, since the number of consumers for libnir and it's
headers are quite high.

Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
2018-01-11 15:40:02 -08:00
Dylan Baker
fbf192a67e meson: Use consistent style
Currently the meosn build has a mix of two styles:
arg : [foo, ...
       bar],

and
arg : [
  foo, ...,
  bar,
]

For consistency let's pick one. I've picked the later style, which I
think is more readable, and is more common in the mesa code base.

v2: - fix commit message

Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
2018-01-11 15:40:02 -08:00
Timothy Arceri
30c1a93f6d ac/nir: fix translation of nir_op_fsign for doubles
Without this we end up with the llvm error message:

"Both operands to a binary operator are not of the same type!"

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-12 09:29:18 +11:00
Timothy Arceri
d7b6b8ba52 ac: add f64_0 to the llvm build context
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-12 09:29:18 +11:00
Timothy Arceri
7b971c828a ac/nir: fix translation of nir_op_frcp for doubles
Without this we end up with the llvm error message:

"Both operands to a binary operator are not of the same type!"

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-12 09:29:18 +11:00
Timothy Arceri
24575c815c ac/nir: fix translation of nir_op_frsq for doubles
Without this we end up with the llvm error message:

"Both operands to a binary operator are not of the same type!"

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-12 09:29:17 +11:00
Timothy Arceri
c0eb304acd ac: add f64_1 to the llvm build context
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-12 09:29:17 +11:00
Timothy Arceri
c797cd605a ac: add load_patch_vertices_in() to the abi
Fixes the follow test for radeonsi nir:

tests/spec/arb_tessellation_shader/execution/quads.shader_test

Also stops 8 other tests from crashing, they now just fail e.g.

tcs-output-array-float-index-rd-after-barrier.shader_test

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-11 14:28:37 +11:00
Bas Nieuwenhuizen
67e09c8b45 ac/nir: Sanitize location_frac for local variables.
If they were promoted from inputs/outputs, they could have a
non-zero value left over, which messed with our store handling.

Fixes: 06f05040eb "radv: Link shaders."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-01-11 00:56:52 +01:00
Samuel Pitoiset
41c36c4549 amd/common: use ac_build_buffer_load() for emitting UBO loads
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-10 19:02:27 +01:00
Samuel Pitoiset
7239e265eb amd/common: import get_{load,store}_intr_attribs() from RadeonSI
v2: move those helpers to the header and use static inline

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (v1)
2018-01-10 19:02:23 +01:00
Samuel Pitoiset
7145b20afb amd/common: bump the number of available user SGPRS to 32 on GFX9
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-10 12:35:08 +01:00
Samuel Pitoiset
d43f50c00b amd/common: do not rely on the pipeline for the push constants logic
It makes more sense to rely on nir_intrinsic_load_push_constant
instead of the pipeline layout.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-10 12:31:54 +01:00
Samuel Pitoiset
9e2395faf5 amd/common: determine the ES type (VS or TES) for the GS on GFX9
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-10 12:31:49 +01:00
Timothy Arceri
f04d2ca0d9 ac: rework emit_barrier() to not segfault on radeonsi
nir_to_llvm_context will always be NULL for radeonsi so we need
work around this.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-09 10:21:32 +11:00
Timothy Arceri
19f3141e6a ac: add load_tess_level() to the abi
Fixes the following piglit tests in radeonsi:

vs-tcs-tes-tessinner-tessouter-inputs-quads.shader_test
vs-tcs-tes-tessinner-tessouter-inputs-tris.shader_test
vs-tes-tessinner-tessouter-inputs-quads.shader_test
vs-tes-tessinner-tessouter-inputs-tris.shader_test

v2: make use of si_shader_io_get_unique_index_patch()
    via the helper in the previous patch rather than
    shader_io_get_unique_index()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-09 10:21:32 +11:00
Samuel Pitoiset
08a5f4412a radv: get InstanceID from VGPR1 (or VGPR2 for tess) instead of VGPR3
VGPR1 = InstanceID / StepRate0; // StepRate0 can be set to 1

Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-08 21:30:01 +01:00
Marek Olšák
a140aeb619 ac: add ac_build_fmin/fmax helpers
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-06 09:51:43 +01:00
Samuel Pitoiset
ec63ab39be radv: enable denorms for 64-bit and 16-bit floats
Similar to RadeonSI.

This fixes:
dEQP-VK.image.texel_view_compatible.graphic.basic.attachment_read.bc*r16g16b16a16_sfloat
dEQP-VK.image.extended_usage_bit.attachment_write.r16_sfloat

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-05 09:51:33 +01:00
Samuel Pitoiset
7643c71527 amd/common: correctly detect if we need ring buffers
When allocate_user_sgprs() was called, ctx->stage was actually
unset and 0 is for the vertex shader. This doesn't change
anything for now because of the spill support thing.

Though, the number of user SGPRs has to be fixed for merged
shaders on GFX9. It was broken before anyway.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-05 09:49:51 +01:00
Samuel Pitoiset
50cfad0298 amd/common: use ac_image_load when lod is zero
This might decrease VGPR spilling, because we no longer
have to use v4i32 for 2D fetches when level == 0. We now
use v2i32 for those cases.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-05 09:49:45 +01:00
Timothy Arceri
4a0c24f2dd ac: rework ac_llvm_extract_elem()
Simplifies the logic a little and asserts index is 0.

Suggested-by: Nicolai Hähnle <nhaehnle@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-05 12:20:38 +11:00
Timothy Arceri
14adf7853a ac/radeonsi: add load_tess_coord() to the abi
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-05 11:58:55 +11:00
Timothy Arceri
9e1a3caf32 ac/radeonsi: add tcs_rel_ids to the abi
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-05 11:58:55 +11:00
Timothy Arceri
f93740efc1 ac: add {tcs,tes}_patch_id to the abi
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-05 11:58:55 +11:00
Timothy Arceri
b99ebaa4fd ac: move some helpers to ac_llvm_build.c
We will call these from the radeonsi NIR backend.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-05 11:58:55 +11:00
Timothy Arceri
2deb822075 ac: add store_tcs_outputs() to the abi
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-05 11:58:55 +11:00
Timothy Arceri
b104e7e172 ac: call load_tcs_input() via the abi
This also enables some code sharing with tes.

V2: drop type param and just use ctx->i32

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-05 11:58:55 +11:00
Timothy Arceri
b09a3196e0 ac: add load_tes_inputs() to the abi
V2: drop type param and just use ctx->i32

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-05 11:58:55 +11:00
Samuel Pitoiset
a4d2782664 amd/common: scan if gl_PrimitiveID is used before translating to LLVM
It makes more sense to move all scan stuff in the same place.
Also, we don't really need to duplicate the uses_primid field
for each stages.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-04 18:43:09 +01:00
Samuel Pitoiset
3b2cb2f99a amd/common: scan if gl_InvocationID is used
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-04 18:43:07 +01:00
Bas Nieuwenhuizen
79724c89f8 ac: rename has_sync_file to has_fence_to_handle.
sync_files are in linux since 4.7, while the amdgpu fence_to_handle
ioctl is only in 4.15.

In particular we don't need it for sync_file in radv, because
everything happens via syncobjs, which got support earlier than
fence_to_handle.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-04 01:12:09 +01:00
Bas Nieuwenhuizen
c99426ea83 ac/nir: Handle loading data from compact arrays.
Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-01-04 00:14:23 +01:00
Marek Olšák
4f19cc82f9 ac: rename has_syncobj_wait -> has_syncobj_wait_for_submit
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-04 00:07:45 +01:00
Samuel Pitoiset
3260a96c17 amd/common: rework set_userdata_location() and rename to set_loc()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-12-27 10:25:17 +01:00
Samuel Pitoiset
4221a816e2 amd/common: rename set_userdata_location_shader() to set_loc_shader()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-12-27 10:25:15 +01:00
Samuel Pitoiset
5081fd398e amd/common: replace set_userdata_location_indirect() by set_loc_desc()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-12-27 10:25:13 +01:00
Samuel Pitoiset
f8202ef683 amd/common: rename radv_define_vs_user_sgprs_phase2()
... to set_vs_specific_input_locs().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-12-27 10:25:11 +01:00
Samuel Pitoiset
9d5a1787ee amd/common: rename radv_define_common_user_sgprs_phase2()
... to set_global_input_locs().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-12-27 10:25:08 +01:00
Samuel Pitoiset
9a2393a510 amd/common: rename add_user_sgpr_array_argument() to add_array_arg()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-12-27 10:25:06 +01:00
Samuel Pitoiset
b6217bdbee amd/common: replace add_sgpr_argument() by add_arg()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-12-27 10:25:04 +01:00
Samuel Pitoiset
32bbc9eb0f amd/common: replace add_user_sgpr_argument() by add_arg()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-12-27 10:25:02 +01:00
Samuel Pitoiset
e946b5360d amd/common: replace add_vgpr_argument() by add_arg()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-12-27 10:24:59 +01:00
Samuel Pitoiset
f1242a8976 amd/common: add new add_arg() helper for SGPRs/VGPRs arguments
The idea is to clean up the add arguments logic.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-12-27 10:24:57 +01:00
Samuel Pitoiset
bedfa06eaf amd/common: rename radv_define_common_user_sgprs_phase1()
... to declare_global_input_sgprs().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-12-27 10:24:55 +01:00
Samuel Pitoiset
0f58f67abe amd/common: rename radv_define_vs_user_sgprs_phase1()
... to declare_vs_specific_inputs_sgprs().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-12-27 10:24:53 +01:00
Samuel Pitoiset
5c91c1614c amd/common: do not try to declare input VS SGPRs for GS
It's a no-op anyway but it looked strange to me, remove it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-12-27 10:24:51 +01:00