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Author SHA1 Message Date
Rhys Perry
be6f30a0db ac/llvm: let ring_offsets be accessed like a normal arg 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19202>
 2023-02-06 14:25:16 +00:00
Konstantin Seurer
10ac51a52b ac/llvm: Fix validation error with global io 
Fixes: afd645f057 ("ac/llvm: remove LLVMBuildGEP usages")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20521>
 2023-02-05 12:16:05 +00:00
Ian Romanick
ea413e826b nir: Eliminate nir_op_f2b 
Builds on the work of !15121.  This gets to delete even more code
because many drivers shared a lot of code for i2b and f2b.

No shader-db or fossil-db changes on any Intel platform.

v2: Rebase on 1a35acd8d9.

v3: Update a comment in nir_opcodes_c.py. Suggested by Konstantin.

v4: Another rebase. Remove f2b stuff from Midgard.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20509>
 2023-02-03 22:39:57 +00:00
Qiang Yu
f6b194b648 nir,ac/llvm,aco,radv,radeonsi: remove nir_export_vertex_amd 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
 2023-02-03 12:27:44 +00:00
Qiang Yu
f44872c7b6 nir,ac/llvm,aco: remove nir_export_primitive_amd 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
 2023-02-03 12:27:44 +00:00
Qiang Yu
601ad9e0a9 amd,radeonsi: implement nir_load_force_vrs_rates_amd in driver abi 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
 2023-02-03 12:27:43 +00:00
Qiang Yu
5fe4dd3d68 ac/llvm: implement nir_export_amd 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>
 2023-02-03 12:27:43 +00:00
Marek Olšák
da7dfbe3b8 amd/llvm: fix LLVM 15 & 16 crashes in SelectionDAG.cpp 
Cc: stable

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
 2023-02-03 00:18:02 +00:00
Marek Olšák
84d59cdb59 amd: split GFX1103 into GFX1103_R1 and GFX1103_R2 
Fixes: caa09f66ae - amd: add chip identification for gfx1100-1103

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
 2023-02-03 00:18:01 +00:00
Marek Olšák
2ae08c3e8f ac/llvm: remove llvm:: now that we use "using namespace llvm" 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20297>
 2023-01-26 19:33:55 -05:00
Marek Olšák
a273f64f80 ac/llvm: run the IPSCCP pass 
AMDVLK runs it and it seems useful.

https://en.wikipedia.org/wiki/Sparse_conditional_constant_propagation

58380 shaders in 35438 tests
Totals:
SGPRS: 2709080 -> 2709224 (0.01 %)
VGPRS: 1592972 -> 1592808 (-0.01 %)
Spilled SGPRs: 2420 -> 2420 (0.00 %)
Spilled VGPRs: 1077 -> 1077 (0.00 %)
Private memory VGPRs: 253 -> 253 (0.00 %)
Scratch size: 1232 -> 1232 (0.00 %) dwords per thread
Code Size: 61382088 -> 61356504 (-0.04 %) bytes
Max Waves: 849293 -> 849308 (0.00 %)
Outputs: 127090 -> 127090 (0.00 %)
Patch Outputs: 579 -> 579 (0.00 %)

Totals from affected shaders:
SGPRS: 5400 -> 5544 (2.67 %)
VGPRS: 6200 -> 6036 (-2.65 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 975824 -> 950240 (-2.62 %) bytes
Max Waves: 1214 -> 1229 (1.24 %)
Outputs: 232 -> 232 (0.00 %)
Patch Outputs: 0 -> 0 (0.00 %)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20297>
 2023-01-26 19:33:43 -05:00
Marek Olšák
d05c3811cd ac/llvm: run the LLVM sinking pass because LLVM will stop running it 
shader-db was run with the sinking pass disabled in LLVM.

58380 shaders in 35438 tests
Totals:
SGPRS: 2730768 -> 2730768 (0.00 %)
VGPRS: 1592932 -> 1592928 (-0.00 %)
Spilled SGPRs: 2687 -> 2687 (0.00 %)
Spilled VGPRs: 551 -> 551 (0.00 %)
Private memory VGPRs: 253 -> 253 (0.00 %)
Scratch size: 700 -> 700 (0.00 %) dwords per thread
Code Size: 61238872 -> 61238868 (-0.00 %) bytes
Max Waves: 849209 -> 849209 (0.00 %)
Outputs: 127090 -> 127090 (0.00 %)
Patch Outputs: 579 -> 579 (0.00 %)

Totals from affected shaders:
SGPRS: 440 -> 440 (0.00 %)
VGPRS: 396 -> 392 (-1.01 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 49880 -> 49876 (-0.01 %) bytes
Max Waves: 105 -> 105 (0.00 %)
Outputs: 14 -> 14 (0.00 %)
Patch Outputs: 0 -> 0 (0.00 %)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20297>
 2023-01-26 19:33:17 -05:00
Timur Kristóf
c644461b71 radv, aco, ac: Implement pack_half_2x16_rtz_split. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15838>
 2023-01-26 12:24:24 +00:00
Rhys Perry
ea1ac3901a ac/llvm: add support for fp32 addition atomics 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19810>
 2023-01-17 17:39:15 +00:00
Rhys Perry
1825ad134b radeonsi,radv/llvm: fix amdgpu-color/depth-export with epilogs 
The main shader wouldn't use ac_build_export(), and the discard exit would
have no export.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 1174ab6d56 ("ac/llvm: use amdgpu-color-export/amdgpu-depth-export")
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7991
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20482>
 2023-01-03 15:32:56 +00:00
Rhys Perry
1174ab6d56 ac/llvm: use amdgpu-color-export/amdgpu-depth-export 
These are necessary to use the correct export target on GFX11:
https://reviews.llvm.org/D128185

Fixes artifacts on Lara in Rise of the Tomb Raider benchmark and hair in
The Witcher 3 (classic).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20357>
 2023-01-02 12:00:04 +00:00
Qiang Yu
9bb1d8ab19 ac/llvm: remove deref image/texture code 
They have been lowered to bindless ones in nir.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
 2022-12-19 09:22:45 +08:00
Qiang Yu
796d395ab9 ac,radv,radeonsi: remove unused param of load_sampler_desc abi 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
 2022-12-19 09:22:42 +08:00
Qiang Yu
2fd6e150c3 ac/llvm: remove samples_identical nir to llvm code 
It has been lowered in nir.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
 2022-12-19 09:22:38 +08:00
Qiang Yu
a8350dcd25 ac/llvm: remove implicite ms texture fmask handling 
It has been lowered to fragment_mask_load_amd in nir.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
 2022-12-19 09:22:35 +08:00
Qiang Yu
523e7e094d ac/llvm: remove image/texture descriptor_amd nir to llvm code 
They have been lowered in nir.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
 2022-12-19 09:22:31 +08:00
Qiang Yu
d4fdeaa820 radeonsi: replace llvm resource code with nir lower 
Port from ac_nir_to_llvm.c and si_shader_llvm_resource.c.

Due to need waterfall of llvm backend, we can't get bind-texture
descriptor directly in nir. So we keep load_sampler_desc abi only
for bind-texture index to desc.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
 2022-12-19 09:22:27 +08:00
Qiang Yu
adecf52a3b ac/llvm: add disable_aniso_single_level abi 
RADV use dri option to enabled this for some apps, but it's
done in nir lower currently. I'm afraid it still needs this
option to handle the non-uniform case as desc is loaded in
llvm.

radeonsi always enable this for bind-textures.

radeonsi will lower all bind-textures to bindless-textures,
and only bind-textures use desc index, so add this abi for
bindless desc index path.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
 2022-12-19 09:22:19 +08:00
Qiang Yu
d57a22d068 ac/llvm: check load_ssbo present before call it 
radeonsi will remove it later.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
 2022-12-19 09:22:04 +08:00
Rhys Perry
201291d968 ac/llvm/gfx11: implement load_input_vertex 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20341>
 2022-12-16 17:45:34 +00:00
Ian Romanick
eb76cee9f8 nir: Eliminate nir_op_i2b 
There are a lot of optimizations in opt_algebraic that match ('ine', a,
0), but there are almost none that match i2b.  Instead of adding a huge
pile of additional patterns (including variations that include both ine
and i2b), always lower i2b to a != 0.

At this point in the series, it should be impossible for anything to
generate i2b, so there /should not/ be any changes.

The failing test on d3d12 is a pre-existing bug that is triggered by
this change.  I talked to Jesse about it, and, after some analysis, he
suggested just adding it to the list of known failures.

v2: Don't rematerialize i2b instructions in dxil_nir_lower_x2b.

v3: Don't rematerialize i2b instructions in zink_nir_algebraic.py.

v4: Fix zink-on-TGL CI failures by calling nir_opt_algebraic after
nir_lower_doubles makes progress.  The latter can generate b2i
instructions, but nir_lower_int64 can't handle them (anymore).

v5: Add back most of the hunk at line 2125 of nir_opt_algebraic.py. I
had accidentally removed the f2b(bf2(x)) optimization.

v6: Just eliminate the i2b instruction.

v7: Remove missed i2b32 in midgard_compile.c. Remove (now unused)
emit_alu_i2orf2_b1 function from sfn_instr_alu.cpp. Previously this
function was still used. 🤷

No shader-db changes on any Intel platform.

All Intel platforms had similar results. (Ice Lake shown)
Instructions in all programs: 141165875 -> 141165873 (-0.0%)
Instructions helped: 2

Cycles in all programs: 9098956382 -> 9098956350 (-0.0%)
Cycles helped: 2

The two Vulkan shaders are helped because of the "new" (('b2i32',
('ine', ('ubfe', a, b, 1), 0)), ('ubfe', a, b, 1)) algebraic pattern.

Acked-by: Jesse Natalie <jenatali@microsoft.com> [earlier version]
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Daniel Schürmann <daniel@schuermann.dev> [earlier version]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15121>
 2022-12-14 06:23:21 +00:00
Marek Olšák
afcbccb078 ac/llvm: implement ACCESS_USE_FORMAT_AMD as buffer_load/store_format 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19422>
 2022-12-13 20:33:05 +00:00
Marek Olšák
5307480f4e ac/llvm: unify load_buffer_amd and store_buffer_amd code 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19422>
 2022-12-13 20:33:05 +00:00
Marek Olšák
716ac4a55d nir: replace IS_SWIZZLED flag with ACCESS_IS_SWIZZLED_AMD 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19422>
 2022-12-13 20:33:05 +00:00
Marek Olšák
7998c3bdd3 nir: remove redundant SLC_AMD in favor of ACCESS_STREAM_CACHE_POLICY 
ACCESS_STREAM_CACHE_POLICY was added to map to SLC for AMD.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19422>
 2022-12-13 20:33:05 +00:00
Marek Olšák
c0d69b40bc nir: add nir_texop_sampler_descriptor_amd 
We'll use it to query the min/mag filter in the shader.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19422>
 2022-12-13 20:33:05 +00:00
Qiang Yu
0ea589ec69 ac/llvm,radv,radeonsi: pass instruction to intrinsic_load abi 
For simple intrinsic which also need other fields to translate
to LLVM like stream_id.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20158>
 2022-12-13 11:43:40 +08:00
Marek Olšák
b75b9d6324 ac/llvm: set invariant.load on image loads with ACCESS_CAN_REORDER 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>
 2022-12-06 13:27:16 +00:00
Marek Olšák
de3fcc77c7 ac/llvm: inline ac_get_load_intr_attribs 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>
 2022-12-06 13:27:16 +00:00
Marek Olšák
ce860953a6 ac/llvm: rename attribute enums 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>
 2022-12-06 13:27:16 +00:00
Marek Olšák
ce0a83efb8 ac/llvm: use invariant.load metadata on load intrinsics instead of readnone 
readnone is illegal now and we should be using invariant.load since LLVM 15.
(suggested by Nicolai)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>
 2022-12-06 13:27:16 +00:00
Marek Olšák
d3a03d24fc ac/llvm: don't set "readnone" on non-memory intrinsics 
It's illegal and LLVM always knows which intrinsics don't read memory.
This started failing IR validation with LLVM 16.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>
 2022-12-06 13:27:16 +00:00
Marek Olšák
50bece9322 ac/llvm: don't set "convergent" on intrinsics where it's automatic 
LLVM adds the flag automatically.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>
 2022-12-06 13:27:16 +00:00
Marek Olšák
2b5edf96ff ac/llvm: simplify how function attributes are set 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>
 2022-12-06 13:27:16 +00:00
Marek Olšák
9b4142ae9f ac/llvm: simplify how call attributes are set 
set them directly in ac_build_intrinsic, the only place that sets them

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>
 2022-12-06 13:27:16 +00:00
Marek Olšák
e94b040add ac/llvm: remove illegal function attributes READONLY and WRITEONLY 
They are only legal on parameters.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>
 2022-12-06 13:27:16 +00:00
Marek Olšák
5104f4d496 ac/llvm: remove unused AC_FUNC_ATTR_LEGACY 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>
 2022-12-06 13:27:16 +00:00
Marek Olšák
834d59a83e ac/llvm: remove AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY because LLVM 16 removed it 
We didn't use it reasonably anyway.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>
 2022-12-06 13:27:15 +00:00
Qiang Yu
6c44d92362 ac/llvm,radeonsi: lower attribute ring intrinsics in nir 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18010>
 2022-12-02 07:34:32 +00:00
Qiang Yu
daaa8ddb8e ac/llvm,radeonsi: lower nir primitive counter add intrinsics 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18010>
 2022-12-02 07:34:31 +00:00
Qiang Yu
bb837bf6ef nir,ac/llvm: add nir_buffer_atomic_add_amd 
Used by radeonsi for lower nir_atomic_add_gen/xfb_prim_count_amd.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18010>
 2022-12-02 07:34:31 +00:00
Qiang Yu
7cec2e7520 ac/llvm,radeonsi: lower nir_load_streamout_buffer_amd 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18010>
 2022-12-02 07:34:31 +00:00
Qiang Yu
daf5d30b59 ac/llvm,radeonsi: lower nir_load_user_clip_plane in abi 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18010>
 2022-12-02 07:34:31 +00:00
Qiang Yu
84abc307a5 ac/llvm: remove lowered abi->intrinsic_load() intrinsics 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18010>
 2022-12-02 07:34:31 +00:00
Qiang Yu
8030fbcf16 nir,ac/llvm: add nir_load_smem_buffer_amd 
Used by radeonsi to load const buffer.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18010>
 2022-12-02 07:34:31 +00:00