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Author SHA1 Message Date
Giancarlo Devich
bd0e1b3d02 d3d12: Move d3d12_context_state_table_entry to d3d12_resource_state.h 
Also renamed desired_resource_state to d3d12_desired_resource_state,
since it's also in the header now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21528>
 2023-02-25 18:14:37 +00:00
Gert Wollny
182066538f r600/sfn: Fix minimum required registers 
Don't count the local registers, just the arrays, because local
registers might be renamed during register allocation.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8100

Fixes: 9fd9f3cd10
   r600/sfn: Set minimum required registers based on array allocation

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21523>
 2023-02-25 14:01:55 +00:00
Philipp Zabel
297fda6cf1 zink: fix build with -Dvulkan-beta=true 
Fix a build error with -Dvulkan-beta=true:

  ../src/gallium/drivers/zink/zink_screen.c: In function ‘zink_internal_create_screen’:
  ../src/gallium/drivers/zink/zink_screen.c:2764:20: error: ‘struct zink_device_info’ has no member named ‘have_KHR_portability_subset’
   2764 |    if (screen->info.have_KHR_portability_subset) {
        |                    ^
  ../src/gallium/drivers/zink/zink_screen.c:2765:60: error: ‘struct zink_device_info’ has no member named ‘portability_subset_feats’
   2765 |       screen->have_triangle_fans = (VK_TRUE == screen->info.portability_subset_feats.triangleFans);
        |                                                            ^

Fixes: e02cdb397e ("zink: prefer vulkan_core.h over vulkan.h")
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21491>
 2023-02-25 00:23:56 +00:00
Mike Blumenkrantz
f1acdeba6b zink: fix slab allocator sizing 
now that the mem type is passed directly to pb, there have to be enough
slabs to allocate all the mem types (not heaps), so create memoryTypeCount
slabs to allow this

fixes #8369

Fixes: f6d3a5755f ("zink: zink_heap isn't 1-to-1 with memoryTypeIndex"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21526>
 2023-02-25 00:02:06 +00:00
Marek Olšák
9f1e6d8f70 nir,amd: add and use nir_intrinsic_load_esgs_vertex_stride_amd 
This will emulate VGT_ESGS_RING_ITEMSIZE, which does the multiplication
for us. It's beneficial to stop setting VGT_ESGS_RING_ITEMSIZE to reduce
context rolls, and also the register will be removed in the future.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
df6380ddc9 amd: implement conformant TRUNC_COORD behavior for gfx11 
For testing, the conformant behavior can be enabled by setting
conformant_trunc_coord to true manually and running this to enable
the conformant behavior in hw:
    umr -w *.*.regTA_CNTL2 0x40000

The layer index rounding and TRUNC_COORD resetting workarounds can disabled
in the shader compiler.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
39fefeabee radeonsi/gfx11: change the default of COMPUTE_DISPATCH_INTERLEAVE to 256 
This is an internal recommendation.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
3e8bd05020 radeonsi: don't set PACKET_TO_ONE_PA for line stippling 
A hw guy told me this.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
4ca32bbc79 radeonsi: reorganize si_init_depth_surface for better readability 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
f5a98ba30c radeonsi: reorganize si_initialize_color_surface for better readability 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
236890608f radeonsi: reorganize emit_db_render_state and simplify VRS code 
for better readability

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
82926d93b4 radeonsi: don't clamp z_samples to fix Unreal Tournament 99 
Fixes: a29218b5 - radeonsi/gfx11: always set MSAA_NUM_SAMPLES=0 for DCC_DECOMPRESS
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8261

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
26208698ae radeonsi: rename esgs_itemsize -> esgs_vertex_stride 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
32b8d0c19d radeonsi: correct and clean up obsolete vs_state_bits comments 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
23e7d44a88 radeonsi: always add 1 to lshs_vertex_stride now that LS_OUT_PATCH_SIZE is gone 
LS_OUT_PATCH_SIZE limited the maximum value.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
b9c6ef7f51 radeonsi: remove unused VS_STATE_LS_OUT_PATCH_SIZE 
This became unused when we switched to nir_lower_hs_inputs_to_mem.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
461b05c281 radeonsi: remove a gfx11 check in si_shader_gs (legacy GS) 
Gfx11 doesn't support legacy GS.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
f6d8e776fd radeonsi: reformat emit_cb_render_state, create_blend_state, create_rs_state 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
8e9968e3a1 radeonsi: remove returns from si_emit_global_shader_pointers 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
98eee7dee3 amd: replace SI_BIG_ENDIAN with UTIL_ARCH_BIG_ENDIAN 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
e0c8b24e22 amd/registers: unify VRS combiner definition names between gfx103 and gfx11 
use gfx11 names

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
091268944d amd,radeonsi: remove unused LLVM functions 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
d8b17b1752 radeonsi: disable Smart Access Memory because CPU access has large overhead 
It will be remove completely in the next commit.

Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8176

Cc: mesa-stable

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
d61cd39026 radeonsi: replace si_screen::has_out_of_order_rast with the radeon_info field 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
5b85fa6031 radeonsi/gfx11: ignore alpha_is_on_msb because the hw ignores it 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
52f5b7a970 radeonsi: set PA_SU_VTX_CNTL consecutively with PA_CL_GB_VERT_CLIP_ADJ 
because they are all next to each other.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
429f43f088 radeonsi: use SPI_SHADER_USER_DATA_HS_0 definition instead of LS_0 
The value is the same, but LS_0 is for gfx9 only, and HS_0 is for everything
except gfx9.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
6dcd60206a radeonsi: remove no-op setting of THDS_PER_SUBGRP 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
742c9f411b radeonsi: change si_shader::ctx_reg to a nameless union for better readability 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
3e9863f496 radeonsi: move a few DB_SHADER_CONTROL states into si_shader_ps 
They can be set si_shader_ps.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
ee83ba5771 radeonsi/gfx11: set CB_COLORi_INFO.MAX_COMP_FRAG on GFX1103_R2 
Fixes: caa09f66ae - amd: add chip identification for gfx1100-1103

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
c54635a033 radeonsi/gfx11: don't set non-existent VGT_STRMOUT_BUFFER_CONFIG 
Fixes: 9fecac091f - radeonsi/gfx11: scattered register deltas

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
31438fbab5 radeonsi/gfx11: fix the CU_EN clear mask for RSRC4_GS 
Fixes: 9fecac091f - radeonsi/gfx11: scattered register deltas

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
ac0e83375a amd: fix LOD_BIAS on gfx6-9 and adjust the lod bias CAP 
Fixes: e673bb4ae4 - amd,util: fix how lod bias is converted to fixed-point

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
98328a71dc radeonsi: fix COMPAT_MODE on gfx8-9 
It was set in the wrong dword.

Fixes: e673bb4ae4 ("amd,util: fix how lod bias is converted to fixed-point")

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Gert Wollny
b6303d33ec r600/sfn: Fix readport cylce map 
This is currently of no consequence, because the bank swizzle
codes are only used to check legal ALU group configuration
and the bank swizzles are not yet allocated to the instruictions
here.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21516>
 2023-02-24 15:59:03 +00:00
Gert Wollny
b5b7ca0ad3 r600/sfn: be more conservative with channel use in multi-slot ops 
The current approach to check the bank swizzle doesn't allow to
re-evaluate bank-swizzle for instructions that where emitted
earlier, so we might end up with impossile constellations when we
allow three uses of the same channel

Fixes: edabd5cd84
  r600/sfn: check used channels when evaluating allowed mask

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8350

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21516>
 2023-02-24 15:59:03 +00:00
Pierre-Eric Pelloux-Prayer
2b655e267e radeonsi: fix incorrect vgpr indices in the ps_prolog 
In monolithic PS shaders, we need to account for PERSP_PULL_MODEL even
if we don't use it; si_get_ps_prolog_key already does the same thing
to determine color_interp_vgpr_index.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8280
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21483>
 2023-02-24 09:17:20 +00:00
Pavel Ondračka
a8e1e5b5c2 r300: simplify KILL transformation 
We had some special cases before when we could actually get some IFs on
R300 with VDPAU. Now that VDPAU is gone and everything goes through
ntt, we don't have to worry anymore. Remove the complicated logic and
just always transform KILL into KIL none.-1

No shader-db change on RV530 or RV370.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21503>
 2023-02-24 08:59:53 +00:00
Emma Anholt
fc0f694676 ci/zink: Add a glx flake on anv 
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21366>
 2023-02-24 07:31:36 +00:00
Mike Blumenkrantz
865e9311a2 zink: utilize copy box tracking to avoid barrier emission for buf2img copies 
this should reduce synchronization during e.g., miplevel population

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21397>
 2023-02-24 05:27:31 +00:00
Mike Blumenkrantz
4ad64552b8 zink: add a util function for optimizing TRANSFER_DST image barriers 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21397>
 2023-02-24 05:27:31 +00:00
Mike Blumenkrantz
fa6e6545b1 zink: add some tracking for copy box regions 
this enables tracking per-miplevel pipe_boxes for copy operations that
can then be used to avoid emitting barriers for successive copy operations
without overlapping regions

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21397>
 2023-02-24 05:27:31 +00:00
Caio Oliveira
a4a0417263 iris, crocus: Align workaround address to 32B 
The workaround address is used as a source for push constants when
there's no resource available, that address must be 32B aligned.

This fixes invalid address being used for buffers in
3DSTATE_CONSTANT_* packets.

Now that intel_debug_write_identifiers() already add the padding,
there's no need to include extra "+ 8" to the offset.

Thanks to Xiaoming Wang that contributed to find and fix this issue.

Fixes: 2a4c361b06 ("iris: add identifier BO")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21479>
 2023-02-24 04:57:40 +00:00
David Heidelberg
387d131f96 ci/llvmpipe: add flake timeout for rusticl program@execute@builtin@builtin-float-sincos-1.0 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21510>
 2023-02-24 04:37:49 +00:00
Sil Vilerino
9490633723 d3d12: Fix VP9 Decode - Checking 0xFF instead of 0x7F for invalid frame_ref[i].Index7Bits 
Fixes: c8e8ce8359 ("d3d12: Add VP9 Decode support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21507>
 2023-02-24 01:49:28 +00:00
Mike Blumenkrantz
211ed8745f zink: add debug marker tracing for qbo updates 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21425>
 2023-02-23 21:47:20 +00:00
Mike Blumenkrantz
26aedae568 zink: add ZINK_DEBUG=map 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21425>
 2023-02-23 21:47:20 +00:00
Mike Blumenkrantz
03610a5aab zink: actually hook up ZINK_DEBUG=norp 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21425>
 2023-02-23 21:47:20 +00:00
Tapani Pälli
a043ae8e24 iris: implement emission of 3DSTATE_HS for Wa_1306463417 
We need to emit 3DSTATE_HS for each primitive with tessellation.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21308>
 2023-02-23 19:30:03 +00:00