Commit graph

363 commits

Author SHA1 Message Date
Caio Marcelo de Oliveira Filho
7c1c9e935e anv: Support workgroup memory in other shaders
Mesh and Task shaders can use workgroup memory, so generalize its
handling in anv by moving it from anv_pipeline_compile_cs() to
anv_pipeline_lower_nir().

Update Pipeline Statistics accordingly.

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11230>
2021-06-08 11:30:39 -07:00
Caio Marcelo de Oliveira Filho
b5f6fc442c nir: Move zero_initialize_shared_memory into common shader_info
Move it out the "cs" sub-struct, since the bit will be used for other
shader stages in the future.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11225>
2021-06-08 09:23:55 -07:00
Tapani Pälli
75ad0e4b08 anv: support blending logic op dynamic state
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10366>
2021-06-04 12:58:34 +00:00
Tapani Pälli
1c718952c8 anv: support primitive restart enable dynamic state
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10366>
2021-06-04 12:58:34 +00:00
Tapani Pälli
496b508403 anv: support depth bias enable dynamic state
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10366>
2021-06-04 12:58:34 +00:00
Tapani Pälli
4d531c67df anv: support rasterizer discard dynamic state
Implemented by emitting 3DSTATE_STREAMOUT packet.

v2: logic fixes + merge and emit properly all contents (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10366>
2021-06-04 12:58:34 +00:00
Dave Airlie
64fa67dd2f intel/gfx6: move xfb_setup outside the gs compiler into the driver.
This remove the use of a GL thing from the backend compiler

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11097>
2021-06-03 04:05:07 +00:00
Lionel Landwerlin
938e52a6e8 anv: handle spirv parsing failure
v2: don't leak spec_entries

v3: Also switch to VK_ERROR_UNKNOWN when parsing fails

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10790>
2021-05-14 06:32:03 +00:00
Caio Marcelo de Oliveira Filho
dd48683cfd nir: Move shared_memory_explicit_layout bit into common shader_info
Move it out of the "cs" sub-struct, since the bit can be used for
other shader stages in the future.

This also removes a subtle issue in spirv_to_nir:
info.cs.shared_memory_explicit_layout was used without checking for
the CS shader stage.  It ended up being "harmless" since the effects
also depended on presence of shared variables.

Fixes: 5de6c5973a ("spirv: Implement SPV_KHR_workgroup_memory_explicit_layout")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10529>
2021-05-04 20:54:58 +00:00
Caio Marcelo de Oliveira Filho
279acf1031 anv: Use brw_cs_get_dispatch_info()
And since right_mask is already provided as part of dispatch_info,
just use that instead of storing it.

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10504>
2021-05-04 08:15:19 -07:00
Lionel Landwerlin
231651fd89 anv: implement VK_KHR_fragment_shading_rate
Available on Gen11+.

v2: Order shading rate in correct order (Samuel)

v3: Move CPS_STATE emission to genX_state.c

v4: Don't override various output structures (Jason)

v5: Rebase on top master (Lionel)

v6: Fix invalid VkPhysicalDeviceFragmentShadingRatePropertiesKHR
    (min|max)FragmentShadingRateAttachmentTexelSize values (Ken)
    Drop #endif comment

v7: Limit extension to Gfx11+ (Lionel)
    Support conservative raster (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7455>
2021-05-02 20:20:06 +00:00
Rhys Perry
7a7838529a nir/lower_non_uniform: allow lowering with vec2 handles
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9523>
2021-04-27 15:56:07 +00:00
Lionel Landwerlin
b15bfe92f7 anv: implement VK_EXT_color_write_enable
v2: Add missing gfx 7/7.5 dynamic state emission

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10206>
2021-04-22 15:34:52 +00:00
Anuj Phogat
c144cc7889 intel: Rename calculate_gen_slm_size to intel_calculate_slm_size
export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965
grep -E "calculate_gen_slm_size" -rIl $SEARCH_PATH | xargs sed -ie "s/calculate_gen_slm_size/intel_calculate_slm_size/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10241>
2021-04-20 20:06:34 +00:00
Anuj Phogat
dde7ac7f3f intel: Rename vk_to_gen keyword to vk_to_intel
export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965
grep -E "vk_to_gen" -rIl $SEARCH_PATH | xargs sed -ie "s/vk_to_gen/vk_to_intel/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10241>
2021-04-20 20:06:34 +00:00
Anuj Phogat
61e8636557 intel: Rename gen_device prefix to intel_device
export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965"
grep -E "gen_device" -rIl $SEARCH_PATH | xargs sed -ie "s/gen_device/intel_device/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10241>
2021-04-20 20:06:33 +00:00
Lionel Landwerlin
505d176a8e anv: disable baked in pipeline bits from dynamic emission path
In 27ee40f4c9 ("anv: Add support for sample locations") we
introduced the ability to emit sample locations baked in as part of
the pipeline or dynamically.

This is different from the previous dynamic states that were always
removed from the pipeline batch and instead emitted dynamically all
the time.

The mistake in 27ee40f4c9 is that sample locations are now emitted
all the time, leading to bigger command buffers for unnecessary
reasons.

This change introduces a bit fields of what is baked in the pipeline
and doesn't need to be dynamically emitted.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4ad4cd8906 ("anv: Enabled the VK_EXT_sample_locations extension")
Cc: <mesa-stable>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10282>
2021-04-16 11:53:25 +00:00
Lionel Landwerlin
30bc562bda anv: fix 3DSTATE_MULTISAMPLE emission on gen8+
When pipeline->dynamic_state.sample_locations.samples is not set
because the state is dynamic, we're currently calling
genX(emit_multisample) with a 0 samples value which is incorrect.

Found when using renderdoc with the drawing overlay.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4ad4cd8906 ("anv: Enabled the VK_EXT_sample_locations extension")
Cc: <mesa-stable>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10282>
2021-04-16 11:53:25 +00:00
Iván Briano
8328989130 intel, anv: propagate robustness setting to nir_opt_load_store_vectorize
Closes #4309
Fixes dEQP-VK-robustness.robustness2.*.readonly.*

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10147>
2021-04-13 13:30:09 -07:00
Bas Nieuwenhuizen
580f1ac473 nir: Extract shader_info->cs.shared_size out of union.
It is valid for all stages, just 0 for most of them. In particular
mesh/task shaders might be using it.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10094>
2021-04-08 14:39:28 +00:00
Anuj Phogat
abe9a71a09 intel: Rename gen field in gen_device_info struct to ver
Commands used to do the changes:
export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965"
grep -E "info\)*(.|->)gen" -rIl $SEARCH_PATH | xargs sed -ie "s/info\()*\)\(\.\|->\)gen/info\1\2ver/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9936>
2021-04-02 18:33:07 +00:00
Danylo Piliaiev
2bff8fd53b nir: add nir_shader_as_str function
It would be later used by Turnip in implementation of
VK_KHR_pipeline_executable_properties.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8877>
2021-03-25 13:53:33 +00:00
Caio Marcelo de Oliveira Filho
e93c8ab023 intel/compiler: Use a struct for brw_compile_cs parameters
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9779>
2021-03-24 23:18:46 +00:00
Caio Marcelo de Oliveira Filho
57d664245e intel/compiler: Use a struct for brw_compile_vs parameters
Makes calling code more explicit about what is being set, and allows
take advantage of zero initialization for the ones the callsite don't
care.

Besides moving to the struct, two extra "ergonomic" changes were done:

- Add a new shader_time boolean, so shader_time_index is ignored when
  unused -- this allow taking advantage of the zero initialization of
  unset fields.

- Since we have a struct, provide space for the error_str pointer.
  Both iris and i965 were using it, and the extra rstrdup in case of
  failure shouldn't be a burden for the others.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9779>
2021-03-24 23:18:46 +00:00
Caio Marcelo de Oliveira Filho
f5e1765f98 intel/compiler: Use a struct for brw_compile_fs parameters
Makes calling code more explicit about what is being set, and allows
take advantage of zero initialization for the ones the callsite don't
care.

Besides moving to the struct, two extra "ergonomic" changes were done:

- Add a new shader_time boolean, so shader_time_index is ignored when
  unused -- this allow taking advantage of the zero initialization of
  unset fields.

- Since we have a struct, provide space for the error_str pointer.
  Both iris and i965 were using it, and the extra rstrdup in case of
  failure shouldn't be a burden for the others.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9779>
2021-03-24 23:18:46 +00:00
Jason Ekstrand
b704d03efd anv: Do UBO loads with global addresses for bindless
This makes UBO loads in the variable pointers or bindless case work just
like SSBO loads in the sense that they use A64 messages and 64-bit
global addresses.  The primary difference is that we have an
optimization in anv_nir_lower_ubo_loads which uses a (possibly
predicated) block load message when the offset is constant so we get
roughly the same performance as we would from plumbing load_ubo all the
way to the back-end.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8635>
2021-03-17 17:49:59 +00:00
Mike Blumenkrantz
f4a8912dc2 anv: use common interfaces for shader modules
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9508>
2021-03-15 21:47:44 +00:00
Anuj Phogat
65d7f52098 intel: Fix broken alignment due to gen_ prefix renaming
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9413>
2021-03-10 22:23:51 +00:00
Anuj Phogat
692472a376 intel: Rename "gen_" prefix used in common code to "intel_"
This patch renames functions, structures, enums etc. with "gen_"
prefix defined in common code.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9413>
2021-03-10 22:23:51 +00:00
Anuj Phogat
733b0ee8cb intel: Rename files with gen_ prefix in common code to intel_
Changes in this patch include:
- Rename all files in src/intel/common path
- Update the filenames used in source and build files

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9413>
2021-03-10 22:23:51 +00:00
Tapani Pälli
fd7d34f716 anv: toggle on sample shading if it is set in the shader
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4300
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9040>
2021-03-02 06:19:09 +00:00
Caio Marcelo de Oliveira Filho
d49b0fa72f anv: Implement VK_KHR_zero_initialize_workgroup_memory
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8708>
2021-02-02 17:06:56 +00:00
Jason Ekstrand
23ba48a0c7 vulkan: Make the debug_report implementation internal
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8676>
2021-02-01 18:54:25 +00:00
Jason Ekstrand
41318a5819 vulkan: Use vk_object_base::type for debug_report
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8676>
2021-02-01 18:54:25 +00:00
Jason Ekstrand
bcdf481d13 anv: Switch to the common VK_EXT_debug_report
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8676>
2021-02-01 18:54:24 +00:00
Eleni Maria Stea
27ee40f4c9 anv: Add support for sample locations
Allowing the user to set custom sample locations, by filling the
extension structs and chaining them to the pipeline structs according
to the Vulkan specification section [26.5. Custom Sample Locations]
for the following structures:

'VkPipelineSampleLocationsStateCreateInfoEXT'
'VkSampleLocationsInfoEXT'
'VkSampleLocationEXT'

Once custom locations are used, the default locations are lost and need
to be re-emitted again in the next pipeline creation. For that, we emit
the 3DSTATE_SAMPLE_PATTERN at every pipeline creation.

v2: In v1, we used the custom anv_sample struct to store the location
    and the distance from the pixel center because we would then use
    this distance to sort the locations and send them in increasing
    monotonical order to the GPU. That was because the Skylake PRM Vol.
    2a "3DSTATE_SAMPLE_PATTERN" says that the samples must have
    monotonically increasing distance from the pixel center to get the
    correct centroid computation in the device. However, the Vulkan
    spec seems to require that the samples occur in the order provided
    through the API and this requirement is only for the standard
    locations. As long as this only affects centroid calculations as
    the docs say, we should be ok because OpenGL and Vulkan only
    require that the centroid be some lit sample and that it's the same
    for all samples in a pixel; they have no requirement that it be the
    one closest to center. (Jason Ekstrand)
    For that we made the following changes:
    1- We removed the custom structs and functions from anv_private.h
       and anv_sample_locations.h and anv_sample_locations.c (the last
       two files were removed). (Jason Ekstrand)
    2- We modified the macros used to take also the array as parameter
       and we renamed them to start by GEN_. (Jason Ekstrand)
    3- We don't sort the samples anymore. (Jason Ekstrand)

v3 (Jason Ekstrand):
    Break the refactoring out into multiple commits

v4: Merge dynamic/non-dynamic changes into a single commit (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1887>
2021-01-27 23:25:27 +00:00
Caio Marcelo de Oliveira Filho
804c90e256 anv: Implement VK_KHR_workgroup_memory_explicit_layout
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8699>
2021-01-27 22:20:53 +00:00
Kenneth Graunke
341f5bffb7 intel/compiler, anv: Delete cs_prog_data->slm_size
cs_prog_data->slm_size is basically redundant with
prog_data->total_shared, which is the field that we actually use for
controlling the shared local memory size in all drivers.  We were
still using it in one place for VK_EXT_pipeline_executable_properties,
but we should just fix that and delete the field.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7152>
2020-10-14 23:13:41 +00:00
Marcin Ślusarz
e06da554e9 anv: drop likely/unlikely around INTEL_DEBUG
It's included in declaration of INTEL_DEBUG.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6732>
2020-10-06 18:43:07 +00:00
Jason Ekstrand
d3fa7451a6 anv,radv,tu,val: Call nir_lower_io for push constants
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5275>
2020-09-30 07:20:39 +00:00
Jason Ekstrand
3bd7c3c9db intel/nir: Call validate_ssa_dominance at both ends of the NIR compile
This invokes it before we go into the optimization/lowering pass and
then right before we go out of SSA.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5288>
2020-09-08 19:44:01 +00:00
Jason Ekstrand
aff078eb5a anv: Stop storing the shader constant data side-band
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>
2020-09-02 19:48:44 +00:00
Jason Ekstrand
372774367c intel/compiler: Get rid of struct gen_disasm
It's just a container around a devinfo.  The one useful purpose it did
serve is that gen_disasm_create initialized the compaction table
singletons.  Now that those no longer exist, this isn't necessary.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>
2020-09-02 19:48:44 +00:00
Connor Abbott
d243bf1032 nir/lower_input_attachments: Support loading layer id as an input
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5719>
2020-08-19 16:36:43 +00:00
Connor Abbott
e72895767b nir/lower_input_attachments: Refactor to use an options struct
While we're at it, fold the details of how to load the fragcoord into
load_fragcoord().

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5719>
2020-08-19 16:36:43 +00:00
Danylo Piliaiev
2701f887fc anv/nir: Unify inputs_read/outputs_written between geometry stages
inputs_read/outputs_written are used for a shader stage to
determine the layout of input and output storage. Adjacent stages must
agree on the layout, so adjacent input/output bitfields must match.

Most of the time, cross-stage optimizations make that happen anyway,
but there are some cases (with special values like clip distances and
point size) where this doesn't happen.

Fixes crashes in dEQP-VK.subgroups.*.framebuffer.*_tess_eval

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3210
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6102>
2020-08-12 14:42:17 +00:00
Tapani Pälli
2d010d3dc5 anv: add a check for depthStencilState before using it
v2: move the code under existing correct check!

Fixes: e4590c0750 ("anv: depth/stencil dynamic state support")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3375
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6240>
2020-08-11 11:36:11 +03:00
Tapani Pälli
e4590c0750 anv: depth/stencil dynamic state support
v2: code cleanup, remove extra spaces (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
f6fa4a8000 anv: add support for dynamic primitive topology change
This is done using 3DSTATE_VF_TOPOLOGY packet that overrides topology
used in subsequent 3DPRIMITIVE commands. For gen7[5] we override the
pipeline topology when emitting draw commands.

v2: fix the way gen7[5] is handled (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
9220598b36 anv: add support for dynamic cull mode and winding order
v2: cleanup, white space issues (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00