Commit graph

110373 commits

Author SHA1 Message Date
Alyssa Rosenzweig
bcabcfe3ad panfrost/midgard: Identify inand
This was previously thought to be inot, but it's actually a bit more
general than that! :)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-04-25 20:37:45 +00:00
Alyssa Rosenzweig
5f942db190 panfrost/midgard: Copy prop for texture registers
We'll want to unify this with main copy prop (and extend to varyings),
but that'll take more care to handle some special cases, so leave it as
a stub pass for now.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-04-25 20:37:45 +00:00
Alyssa Rosenzweig
4d821a1101 panfrost/midgard: Optimize csel involving 0
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-04-25 20:37:45 +00:00
Alyssa Rosenzweig
b53b4573c3 panfrost/midgard: Extend copy propagation pass
This extends copy propagation to respect output modifiers for ALU
instructions, as well as potentially fixing some bugs related to looping
(all dEQP loop tests pass).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-04-25 20:37:45 +00:00
Alyssa Rosenzweig
7bc91b487b panfrost/midgard: Reduce fmax(a, 0.0) to fmov.pos
This will allow us to copyprop away the move and eliminate the
instruction entirely.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-04-25 20:37:45 +00:00
Bas Nieuwenhuizen
295536d47a radv: Expose Vulkan 1.1 for Android.
We have the YCBCR feature now.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
8bb3cec7c9 radv: Expose VK_EXT_ycbcr_image_arrays.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
fc9248e13e radv: Enable YCBCR conversion feature.
This enabled the basic YCBCR features.

We support basic multiplane formats using 8-bit and 16-bit unorms, as
well as YUV2 formats.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
379b82dace radv: Add ycbcr subsampled & multiplane formats to csv.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
52c1adda21 radv: Add ycbcr format features.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
b769a549ee radv: Add hashing for the ycbcr samplers.
Otherwise caching gets very confused.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
5c3467e74a radv: Run the new ycbcr lowering pass.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
91702374d5 radv: Add ycbcr lowering pass.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
5564c38212 radv: Update descriptor sets for multiple planes.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
7f6732ac69 radv: Add ycbcr samplers in descriptor set layouts.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
427024bf2e ac/nir: Add support for planes.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
dc917c8073 radv: Allow mixed src/dst aspects in copies.
e.g. COLOR + PLANE_2, as well COLOR + COLOR for multiplane images.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
b2cfa231d0 radv: Add support for image views with multiple planes.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
65c4f612aa radv: Add ycbcr conversion structs.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
a837768857 radv: Support different source & dest aspects for planar images in blit2d.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
66507cc656 radv: Add single plane image views & meta operations.
Copies & clear of multiplane images is not allowed so we do not
have to handle that case.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
42d159f276 radv: Add multiple planes to images.
No functional changes. This temporarily uses plane 0 for
everything.

Long term plan is that only single plane images get to use
metadata like htile/dcc/cmask/fmask.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
d3225e533f radv: Add logic for multisample format descriptions.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
09c4a911e5 radv: Add logic for subsampled format descriptions.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Caio Marcelo de Oliveira Filho
055f6281d4 intel/fs: Don't handle texop_tex for shaders without implicit LOD
These will be lowered by nir_lower_tex() with the
lower_tex_when_implicit_lod_not_supported, so don't need the extra
handling here.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-04-25 12:13:06 -07:00
Caio Marcelo de Oliveira Filho
d5ac5d6e83 nir: Add option to lower tex to txl when shader don't support implicit LOD
We already add the LOD src, so go ahead and update the texop as well
when this option is set.

v2: Make it an option. (Rob Clark)

v3: Use a more concise name suggested by Jason.

Reviewed-by: Rob Clark <robdclark@gmail.com>
2019-04-25 12:13:06 -07:00
Topi Pohjolainen
ff642fb0e6 intel/compiler/fs/icl: Use dummy masked urb write for tess eval
One cannot write the URB arbitrarily and therefore the message
has to be carefully constructed. The clever tricks originate
from Kenneth and Jason, I'm just writing the patch.

Fixes GPU hangs on ICL with Vulkan CTS.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2019-04-25 22:00:43 +03:00
Andrii Simiklit
4e9592c5fa iris: make the TFB result visible to others
OpenGL 4.6 Spec:
   "5.3.3 Rules
    .......
    Note: “Updates” via rendering or transform feedback
    are treated consistently with updates via GL commands.
    Once EndTransformFeedback has been issued, any subsequent
    command in the same context that uses the results of the
    transform feedback operation will see the results."

v2: removed a wrong comment
    ( Kenneth Graunke <kenneth@whitecape.org> )

v3: - flush+dirty depends on buffers usage history
    - removed an old hack
    ( Kenneth Graunke <kenneth@whitecape.org> )

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110404
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-04-25 11:48:04 -07:00
Kenneth Graunke
aa7306b4cf iris: Some tidying for preemption support
Just enable it during init_render_context on Gen10+, and move the
Gen9 state tracking into iris_genx_state so it only exists on Gen9.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-04-25 11:26:24 -07:00
Marek Olšák
383f406591 radeonsi: remove dirty slot masks from scissor and viewport states
All registers in the array need to be updated if any of them is changed.

Only apps writing gl_ViewportIndex were affected by this bug.
2019-04-25 11:49:38 -04:00
Marek Olšák
440135e5a0 radeonsi/gfx9: rework the gfx9 scissor bug workaround (v2)
Needed to track context rolls caused by streamout and ACQUIRE_MEM.
ACQUIRE_MEM can occur outside of draw calls.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110355

v2: squashed patches and done more rework

Cc: 19.0 <mesa-stable@lists.freedesktop.org>
2019-04-25 11:49:38 -04:00
Marek Olšák
bc0d924507 radeonsi/gfx9: set that window_rectangles always roll the context
Cc: 19.0 <mesa-stable@lists.freedesktop.org>
2019-04-25 11:49:38 -04:00
Jon Turney
5d310015c5
meson: Force '.so' extension for DRI drivers
DRI driver loadable modules are always installed with
install_megadriver.py with names ending with '.so', irrespective of
platform.

Force the name the loadable module is built with to match, so
install_megadriver.py doesn't spin trying to remove non-existent
symlinks.

Fixes: c77acc3c "meson: remove meson-created megadrivers symlinks"
2019-04-25 12:40:16 +01:00
Nicolai Hähnle
9445a4ab43 radeonsi: add radeonsi_sync_compile option
Force the driver thread to sync immediately with a compiler thread (but
compilation still happens in a separate thread).

This can be useful to simplify debugging compiler issues.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-04-25 12:35:29 +02:00
Nicolai Hähnle
ca95adf8ff radeonsi: add radeonsi_aux_debug option for aux context debug dumps
Enabling this option will create ddebug-style dumps for the aux context,
except that instead of intercepting the pipe_context layer
we just dump the IB contents on flush.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-04-25 12:35:27 +02:00
Nicolai Hähnle
fea3dcb844 ddebug: expose some helper functions as non-inline
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-04-25 12:35:24 +02:00
Nicolai Hähnle
ac0b60fa47 ddebug: dump driver state into a separate file
Due to asynchronous execution, it's not clear which of the draws the state
may refer to.

This also works around an issue encountered with radeonsi where dumping
the driver state itself caused a hang.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-04-25 12:35:21 +02:00
Nicolai Hähnle
b7fab7b02d ddebug: log calls to pipe->flush
This can be useful when internal draws lead to a hang.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-04-25 12:35:19 +02:00
Nicolai Hähnle
fe0d2b3d37 ddebug: set thread name
For better debuggability.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-04-25 12:35:16 +02:00
Nicolai Hähnle
563faa3903 util/u_log: flush auto loggers before starting a new page
Without this, command stream dumps of radeonsi may misleadingly end up
in a later page.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-04-25 12:35:09 +02:00
Nicolai Hähnle
8bef4df196 radeonsi: add si_debug_options for convenient adding/removing of options
Move the definition of radeonsi_clear_db_cache_before_clear there,
as well as radeonsi_enable_nir.

This removes the AMD_DEBUG=nir option.

We currently still have two places for options: the driconf machinery
and AMD_DEBUG/R600_DEBUG. If we are to have a single place for options,
then the driconf machinery should be preferred since it's more flexible.

The only downside of the driconf machinery was that adding new options
was quite inconvenient. With this change, a simple boolean option can
be added with a single line of code, same as for AMD_DEBUG.

One technical limitation of this particular implementation is that while
almost all driconf features are available, the translation machinery doesn't
pick up the description strings for options added in si_debvug_options. In
practice, translations haven't been provided anyway, and this is intended
for developer options, so I'm not too worried. It could always be added
later if anybody really cares.

v2:
- use bool instead of uint8_t for options
- si_debug_options.inc -> si_debug_options.h

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-04-25 12:31:02 +02:00
Michel Dänzer
5078d66a86 gitlab-ci: Use meson buildtype debug instead of default debugoptimized
This can save a lot of time for some of the meson CI jobs.

Acked-by: Eric Engestrom <eric.engestrom@intel.com>
2019-04-25 10:51:41 +02:00
Juan A. Suarez Romero
b06ae53606 Revert "intel/compiler: split is_partial_write() into two variants"
This reverts commit 40b3abb4d1.

It is not clear that this commit was entirely correct, and unfortunately
it was pushed by error.

CC: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2019-04-25 09:19:10 +02:00
Timothy Arceri
b155f74d7b nir: fix nir_remove_unused_varyings()
We were only setting the used mask for the first component of a
varying. Since the linking opts split vectors into scalars this
has mostly worked ok.

However this causes an issue where for example if we split a
struct on one side of the interface but not the other, then we
can possibly end up removing the first components on the side
that was split and then incorrectly remove the whole struct
on the other side of the varying.

With this change we simply mark all 4 components for each slot
used by a struct. We could possibly make this more fine gained
but that would require a more complex change.

This fixes a bug in Strange Brigade on RADV when tessellation
is enabled, all credit goes to Samuel Pitoiset for tracking down
the cause of the bug.

Fixes: f1eb5e6399 ("nir: add component level support to remove_unused_io_vars()")

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 16:37:36 +10:00
Lionel Landwerlin
f15409ee55 i965: fix icelake performance query enabling
This was a rebase issue which lost of change to a file moved from i965
to src/intel/perf.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 134e750e16 ("i965: extract performance query metrics")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-04-25 01:11:54 +00:00
Marek Olšák
36cfe5fd62 radeonsi: add BOs after need_cs_space
need_cs_space may clear the buffer list.

Fixes: 951d60f8cd "radeonsi: delay adding BOs at the beginning of IBs until the first draw"

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-04-24 20:59:07 -04:00
Marek Olšák
45ca7798dc glsl: handle interactions between EXT_gpu_shader4 and texture extensions
also, EXT_texture_buffer_object has to be enabled separately.

Reviewed-by: Eric Anholt <eric@anholt.net>
2019-04-24 20:45:15 -04:00
Marek Olšák
e71936a731 st/mesa: expose EXT_gpu_shader4 if GLSL 1.40 is supported
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-04-24 20:45:15 -04:00
Marek Olšák
503f94b43f mesa: only allow EXT_gpu_shader4 in the compatibility profile
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-04-24 20:45:15 -04:00
Marek Olšák
ba265d1144 mesa: expose EXT_texture_buffer_object
This is needed for exposing the samplerBuffer functions under
EXT_gpu_shader4.

v2: - expose it in the compat profile only
    - make it an alias of EXT_gpu_shader4

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (v1)
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-04-24 20:45:15 -04:00