However they have to be called via _glapi_get_dispatch/context. This
would be safe to do on any platform, but the extra indirection is only
necessary on Windows since TLS vars can't be exported from a DLL.
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13634>
Saves per-batch allocations, avoids reallocation for various vertex
counts, and avoids needing the indirect tess addrs constobj so that we
could emit the relocs to the tess BO after we'd emitted all the draws.
Also apparently it fixes one of our CTS fails.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13851>
This saves a bunch of generated code to pack up the extra NULLs to get to
4 args, and saves executing the conditions in nir_build_alu() to then skip
those NULLs.
Saves another 27kb on disk.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13916>
I aimed for "things that look like big switch statements, or cases where
the compiler is unlikely to be able to constant-propagate an argument into
something useful."
Saves another 80kb on disk. No perf difference on iris shader-db, n=23.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13916>
Drop the call to iris_resource_disable_aux in
iris_resource_configure_aux. With the previous patches, we no longer
create CCS surfaces and pick the AUX_NONE usage. As a result, if the aux
usage is NONE, all iris_resource fields already indicate that aux is
disabled.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12398>
Allow CCS_E on these formats on TGL+ for a couple reasons:
1) TGL doesn't have the option to fall back to CCS_D/fast-clears like
prior platforms do.
2) The CCS compression scheme on TGL improves to encode more than 3
levels of compression. This should help floating point formats.
In my measurements, enabling this on TGL results in a minor performance
improvement on Paraview (+0.06%) rather than a major regression like on
prior platforms. The improvement was measured by taking the average of 3
runs of: waveletvolume.py -d 256 -f 600.
Also, the Intel performance CI reports a 3.81% ±0.12% FPS improvement in
Bioshock Infinite.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12398>
On TGL+, require that the surface format supports CCS_E in order to
support CCS. This aligns with the ISL code that pads the primary
surface for CCS on this platform.
Pre-TGL, require support for either CCS_D or CCS_E.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12398>
Refactor the YML for some DRY, and rename the existing pass from
"-windows" to "-quick_gl" to disambiguate it.
Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13902>
This fixes the problem of large indirect draws, and at the same time avoids
allocating too large buffers for tessellation.
Reworked by @anholt to use a separate tess factor BO so we can skip the
WFIs to set the TESSFACTOR_ADDR.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6089>
We used to request vec4 alignment for everything on the nir codepath,
but this triggers an assertion failure since a0b82c24b6, which prohibits
vec4 alignment on scalars. Since requiring vec4 alignment on scalars is a
little silly anyway, this patch relaxes the alignment to naturally aligned
for scalars.
Fixes about 27 crashing tests in piglit and deqp on kepler, including eg
piglit/tests/spec/glsl-1.30/execution/fs-large-local-array.shader_test
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13883>
When using the Vulkan API, command buffers can be recorded way before
perfetto is enabled. This can be problematic if you want already
recorded command buffers to produce traces.
This new environment variable makes perfetto enabled internally so
that command buffers are recorded with timestamps, even though no
perfetto recording happens.
v2: rename to GPU_TRACE_INSTRUMENT (Rob)
v3: Move instrumentation check to generated headers (Danylo)
Decouple instrumentation enabling from tracing (Danylo)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13911>
In order to capture the timestamp when things actually end on Intel
GPU HW, we need to know whether the timestamp should be capture at the
top or end of pipeline.
v2: use one line python if/else (Danylo)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13911>
Unused variable vector_elements is now used in return from
function decode_type_from_blob instead of encoded.basic.vector_elements.
In the code we can see how those variables were equated
and then the operations were made exactly to vector_elements.
But variable didn't pass into any other variables or functions.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5536
Signed-off-by: Viktoriia Palianytsia <v.palianytsia@globallogic.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13725>
Found while running valgrind :
==3583454== Invalid read of size 4
==3583454== at 0xF48336: glsl_get_struct_field_offset (nir_types.cpp:84)
==3583454== by 0xC7CD0D: opt_replace_struct_wrapper_cast (nir_deref.c:1068)
==3583454== by 0xC7CDD9: opt_deref_cast (nir_deref.c:1087)
==3583454== by 0xC7DD8E: nir_opt_deref_impl (nir_deref.c:1369)
==3583454== by 0xC7DF4E: nir_opt_deref (nir_deref.c:1428)
==3583454== by 0xA63F3C: brw_kernel_from_spirv (brw_kernel.c:325)
==3583454== by 0xA3BC2C: main (intel_clc.c:481)
==3583454== Address 0xe4f7e88 is 24 bytes after a block of size 48 in arena "client"
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13952>
Use of designated initializers requires at least '/std:c++20', and
mesa is using c++14 by default.
Fixes: 8d3a3e7a00 ("microsoft/compiler: Use textures for SRVs")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13912>
_mesa_hash_table_u64_search() returns the data directly, not an
hash_entry object. We also need to take the descriptor set into account
for this pass to work properly on Vulkan shaders.
Fixes: 46bc7cf678 ("microsoft/compiler: Rewrite sampler splitting pass to be smarter and handle derefs")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13912>
libLLVM for Android is built without RTTI, but after commit ad86267
mesa inherits meson default RTTI enabled state.
cpp_rtti=false is added to meson options in android/mesa3d_cross.mk
(v2) Add Fixes tag and use spaces instead of tabs for aligning the trailing \
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Fixes: ad862674 ("meson: Don't override built-in cpp_rtti option, error if it's invalid")
Cc: "21.3" "21.2" mesa-stable
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13901>
These flags control special CRC handling for empty tiles using the CRC
clear colour field added on Bifrost. Their use depends on CRC being
used. We missed these flags earlier; let's add them since they are used
by the Valhall DDK but are not new to Valhall.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13982>
If there is holes, eg. the application firsts set vertex attributes
0 and 1, then vertex attributes 0 and 7, the format of vertex attribute
1 is still the previous one, while it should be FORMAT_INVALID to avoid
a GPU hang.
This fixes a GPU hang with Yuzu.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5627
Cc: 21.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13856>
ISL recently started allowing linear ASTC surfaces to be created. With
that in place, iris can perform GPU-based uploads to ASTC textures in
the same way it does so with other compressed surfaces.
We're not aware of any reason to continue special-casing ASTC texture
uploads, so we get rid of the code which does so.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13881>
The sampler can only decode ASTC surfaces that are Y-tiled. ISL has
been asserting this restriction at surface creation time.
However, some drivers want to create a surface that is only used for
copying compressed data. And during the copy, the surface won't have a
compressed format.
To enable this behavior, we choose to move the tiling assertion to the
moment a surface state is created for the sampler.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13881>
We don't support typed image writes for multisampling, so we can't
handle multisampled destinations. We also usually handle MSAA by
running the fragment shader per-sample, which we aren't accounting
for in our compute shaders, so we can't handle MSAA sources either.
We could do both of these things if we really wanted to, but we don't.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13524>
