On Turing, the hardware rely on the viewport index for FSR.
If not all viewports are defined, we will end up not rendering
anything when selecting the primitive shading rate.
This patch makes it that we now broadcast the viewport and scissor 0
likes the proprietary driver.
This fixes "dEQP-VK.mesh_shader.ext.builtin.primitive_shading_rate_*" on
Turing.
Signed-off-by: Mary Guillemard <mary@mary.zone>
Fixes: 2fb4aed9 ("nvk: Advertise VK_KHR_fragment_shading_rate")
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40314>
We are going to need to reuse those functions to fix FSR support on
Turing.
Signed-off-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40314>
The game uses glGetUniformLocation() but specifies the wrong program id
for one of the uniforms. The shader programs both contain shaders with
a uniform of the same name but because they have a different number of
uniforms the returned uniform location does not match the expected uniform.
Here we add a workaround to force the uniform with the wrong get location
params to always have the location 0 so that it doesn't matter which
shader the application checks for the location.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14864
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40448>
Allows a uniform name to be passed to force_explicit_uniform_loc_zero
allowing us to set that uniform to an explicit location of zero.
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40448>
In commit 10b5b279a4 ("anv: Fix CmdResetEvent2() with RESOURCE_BARRIER::Wait stage == none")
I haved added assert to catch invalid cases but looks like we have several tests
affected by that problem causing crashes in debug builds.
So here I'm removing those asserts(), will then work on all the fixes and bring
it back.
Acked-by: Ivan Briano <ivan.briano@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40476>
This is intended for backends that do SIMD within a register, like we do.
Helps with register pressure. This will also prevent f2f from being
scalarized, which will help on Ampere+ as a later patch will use F2FP for
those.
Totals:
CodeSize: 8662362848 -> 8662332112 (-0.00%); split: -0.00%, +0.00%
Static cycle count: 4713321839 -> 4713330409 (+0.00%); split: -0.00%, +0.00%
Spills to reg: 149117 -> 149128 (+0.01%)
Fills from reg: 170680 -> 170693 (+0.01%)
Totals from 19 (0.00% of 1163204) affected shaders:
CodeSize: 732208 -> 701472 (-4.20%); split: -4.22%, +0.02%
Static cycle count: 1670226 -> 1678796 (+0.51%); split: -0.10%, +0.61%
Spills to reg: 517 -> 528 (+2.13%)
Fills from reg: 486 -> 499 (+2.67%)
Reviewed-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40298>
On integrated platforms, we have issue where L3 cache not being coherent
with CS and it forces us to push data out L3.
To avoid data cache flush, let's write the IR header with BLORP shader.
There is a small shader launch latency but eventually that should not
matter because writing data with CS (MI_STORE) commands is slower than
shader execution when we consider large number of BVH tree getting
built.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39971>
This sets the per-vertex point size state correctly in the presence of mesh shaders.
(fixes line is just a educated pick)
Fixes: 51d6e4404a ("mesa: allow NULL for vertex shader when mesh pipeline")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40475>
Currently the headless WSI unconditionally uses DRM images as WSI
images, which isn't proper behavior for working with lavapipe driver,
and leads to either error or crash (depending on whether udmabuf is
available).
Properly setup CPU images instead of DRM images for software-rendering
WSI devices.
This fixes (at least) `dEQP-VK.wsi.headless.swapchain.render.*` on
lavapipe.
Fixes: 90caf9bdbd ("vulkan/wsi/headless: drop the wsi_create_null_image_mem override")
Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40360>
When libdisplay-info is available and we are able to retrieve the
physical size of a display from its EDID, use that to populate the
physicalDimensions field of VkDisplayPropertiesKHR.
Signed-off-by: Erik Kurzinger <ekurzinger@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39989>
When libdisplay-info is available and we are able to retrieve the make
and model of a display from its EDID, use those to construct a more
useful displayName for VkDisplayPropertiesKHR.
Signed-off-by: Erik Kurzinger <ekurzinger@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39989>
Add dedicated BLORP op enums so clear paths can be represented
precisely.
This is enum-only groundwork; behavior and trace output are wired in
follow-up commits.
Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40414>
The runtime builds a final pipeline state with pointers to structures
coming from the associated pipelines libraries.
So far it has considered that the viewMask was part of a structure
together with the rest of the renderpass information. This information
can be specified in pre-raster, fragment & color-output state groups
and it was assumed would be consistent for all 3. And the runtime
currently takes the pointer to the structure from the last pipeline
library (color output).
Some coming spec/cts will clarify that the viewMask only needs to be
specified for pre-raster & fragment groups, making the value in the
color-output group untrustworthy.
This change creates a new state structure to hold the viewMask on its
own so it is only gather on pre-raster & fragment groups.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (radv)
Reviewed-by: Aitor Camacho <aitor@lunarg.com> (kosmickrisp)
Reviewed-by: Connor Abbott <cwabbott0@gmail.com> (turnip)
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> (v3dv)
Reviewed-by: Frank Binns <frank.binns@imgtec.com> (powervr)
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com> (panvk)
Royaled-yes-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> (lavapipe)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39940>
Move lowering to nir_lower_subgroups. At some point Intel
backend might want to skip that and lower at the backend IR
boundary, but for now lowering always applies.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40376>
CmdResetEvent2() was calling anv_add_pending_pipe_bits() with no dst_stages
stages causing RESOURCE_BARRIER::Wait stage == none, what causes a GPU hang in
NVL-P simulator.
So here setting dst_stages to VK_PIPELINE_STAGE_2_TOP_OF_PIPE_BIT and adding
an assert in resource_barrier_wait_stage() to catch hw_stage == 0.
This fixes crucible func.event.cmd_buffer.q0 in simulator.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40445>
The prior version of gfxstream-fuchsia featured an Android compat
layer, and only worked with Goldfish. The compat layer was
deleted a while ago.
The Fuchsia Goldfish integration was deleted here:
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33050
since the Fuchsia emulator itself uses a frozen version of the
library. This goes further in that direction: deleting leftovers
of the Fuchsia Android compat layer, which used provided VK
dispatch.
This allows Fuchsia + gfxstream to build via meson2hermetic, with
the a few additional common core patches applied.
Reviewed-by: David Gilhooley <djgilhooley@gmail.com>
Reviewed-by: Aaron Ruby <aruby@qnx.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40442>
It is an output. Useful for meson-to-bazel conversion, where
Bazel happened to spot this.
Reviewed-by: David Gilhooley <djgilhooley@gmail.com>
Reviewed-by: Aaron Ruby <aruby@qnx.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40442>
Both inc_guest_iostream and inc_platform_virtgpu were used
twice in the same include_directories array.
Reviewed-by: David Gilhooley <djgilhooley@gmail.com>
Reviewed-by: Aaron Ruby <aruby@qnx.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40442>
Sometimes, it's used with fds (int32_t), sometimes with
gem_handle (uint32_t). Be consistent and explicitly cast
when needed.
Reviewed-by: David Gilhooley <djgilhooley@gmail.com>
Reviewed-by: Aaron Ruby <aruby@qnx.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40442>
This codepath had a bug (always setting `elems[0]`) since it was last
reworked, but there's no subgroup instruction that uses this helper and
support Composites, so it can be replace with an assert.
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40356>
There's no reason to adjust the matrix once unconditionally, and then
agaiun conditionally after overwriting the matrix. If we just make the
second adjustment unconditional, we should be good.
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40175>
This is just cleaning up some naming, so we consistently refer to things
dealing with luma as "y" and things dealing with chroma as "c".
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40175>
There's a few things going on here:
1. Vulkan makes the YCbCr model and YCbCr range completely orthogonal.
This means that we need to be able to handle an identity transform
while still doing range-remapping, so we apply the range mapping and
color-transform separately, and let the optimizer clean things up.
This is similar to what we did before, but it means it's a bit harder
to get completely optimal code out of this.
2. Vulkan defines that the YCbCr inputs come in a bit of an unusual
order; Cr, Y, Cb. This means we need to reorder things a bit when
applying the YCbCr range and multiplying the YCbCr color-model
matrix. This makes the code a little bit confusing to read at times.
3. Because the alpha-channel is passed through this function, we need to
expand the matrix to 4x3. This is similar to what we've already been
doing, but also a bit unusual. In the future, we might want to keep
the alpha-channel out of this code-path, and just work on a vec3
here.
I suspect that all of these can be solved by rearranging the code a bit.
But I've left that as an excercize for later to make sure we get this
right first, with as few modifications as possible. Some people might
disagree with this approach, but let's see.
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40175>
This adds some reusable math to set up YCbCr to RGB color transforms. It
covers ITU BT.601, ITU BT.709 and ITU BT.2020 YUV <-> RGB conversion, as
well as "narrow"" and "full" range.
This code is intended to replace three different implementations of
YUV-transforms already present in Mesa, all of them with different
parameterizations and differences in data-formats. These implementations
are: nir_lower_tex.c, vk_nir_convert_ycbcr.c and vl_csc.c.
None of the exising implementations seems to fully cover all of the needs
of the others. The one that comes the closest is the one in vl_csc.c, but
it has a few issues:
1. It doesn't differentiate between per-channel bit-sizes, which the
Vulkan code needs.
2. It uses enums from p_video_enums.h in Gallium to paremeterize the
behavior.
3. It's written in a monolithic way, handling up to two
range-remappings, which the other implementations doesn't need.
While it could be possible to entangle all of that, that would likely
end up being a more or less a new implementation anyway. So let's instead
try to pick the best of all three implementations into one new one,
that's broken into smaller pieces that can be assembled into either of
the three.
In addition, this implementation has a bunch of unit-tests, to make sure
we don't introduce subtle breakages down the line.
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40175>
