Commit graph

117891 commits

Author SHA1 Message Date
Rhys Perry
b85c38a86f spirv: make OpLoad/OpStore visibility/availablity barriers acquire/release
I think these are needed to order the visibility/availability operation
with the access.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6090>
2020-09-01 17:15:22 +00:00
Rhys Perry
5b92392c48 spirv: fix Uniform and Output MemoryAccessMakePointer{Visible,Available}
The Uniform storage class can be used for SSBOs. This should also fix make
available/visible for the Output storage class.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6090>
2020-09-01 17:15:22 +00:00
Boris Brezillon
857b9c5027 spirv: Add a vtn_get_mem_operands() helper
Add a vtn_get_mem_operands() helper to extract memory operand attached
to load/store operations.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6090>
2020-09-01 17:15:22 +00:00
Sagar Ghuge
959539fbbd intel/isl: Drop unnecessary check on 16bpp depth format
Drop unnecessary check which allows enabling of lossless write through
compression (HiZ + CCS) for D16_UNORM format on Gen12+.

We had misleading HSD information previously which used to claim that
compression can not be supported for 16bpp format. Although BSpec does
not have any restriction for D16_UNORM format.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6485>
2020-09-01 17:05:50 +00:00
Lionel Landwerlin
829699ba63 anv: implement shareable timeline semaphores
This implements timeline semaphores using a new type of dma-fence
stored into drm-syncobjs. We use a thread to implement delayed
submissions.

v2: Drop cloning of temporary semaphores and just transfer their ownership (Jason)
    Drain queue when dealing with binary semaphore
    Ensure we don't submit to the thread as long as we don't need to

v3: Use __u64 not uintptr_t for kernel pointers
    Fix commented code for INTEL_DEBUG=bat
    Set DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES in timeline fence execbuf extension
    Add new anv_queue_set_lost()
    Drop multi queue stuff meant for the fake multi queue patch
    Rework temporary syncobj handling
    Don't use syncobj when not available (DeviceWaitIdle/CreateDevice)
    Use ANV_MULTIALLOC
    And a few more tweaks...

v4: Drop drained condition helper (Lionel)
    Fix missing EXEC_OBJECT_WRITE on BOs we want to wait on (Jason)

v5: Add missing device->lost_reported in _anv_device_report_lost (Lionel)
    Fix missing free on submit->simple_bo (Lionel)
    Don't drop setting the device in lost state on QueueSubmit error (Jason)
    Store submit->fence_bos as an array of uintptr_t (Jason)

v6: condition device->has_thread_submit to i915 & core DRM support (Jason)

v7: Fix submit->in_fence leakage on error (Jason)
    Keep dummy semaphore with no thread submission (Jason)

v8: Move ownership of submit->out_fence to submit (Jason)

v9: Don't forget to read the VkFence's syncobj binary payload (Lionel)

v10: Take the mutex lock on anv_gem_close() (Jason/Lionel)

v11: Fix void* -> u64 cast on 32bit (Lionel)

v12: Rebase after BO backed timeline semaphore (Lionel)

v13: Fix missing snippets lost after rebase (Lionel)

v14: Drop update_binary usage (Lionel)

v15: Use ANV_MULTIALLOC (Lionel)

v16: Fix some realloc issues (Ivan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v8)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2901>
2020-09-01 16:40:11 +00:00
Lionel Landwerlin
a965ffad21 anv: add new gem/drm helpers
Needed for dealing with the new DRM timeline syncobj ioctls.

v2: Make use of the anv_gem_get_drm_cap() parameter... (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2901>
2020-09-01 16:40:11 +00:00
Jonathan Marek
a6291b1b11 freedreno/ir3: rework setup_{input,output} to make struct varyings work
Rework setup_{input,output} to be called during emit_intrinsic, in a way
which allows struct/array/matrix type varyings to work.

This allows turnip to pass dEQP-VK.glsl.linkage.varying.struct.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6181>
2020-09-01 15:10:47 +00:00
Jonathan Marek
c694af40bf freedreno/ir3: improve handling of aliased inputs
This allows overlapping inputs, which is required for the next patch which
makes it so setup_input may be called multiple times for each input.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6181>
2020-09-01 15:10:47 +00:00
Jonathan Marek
acb6163d5e freedreno/ir3: remove indirect input load
nir_intrinsic_load_input should only be used with VS and FS, indirect input
shouldn't be possible for those.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6181>
2020-09-01 15:10:47 +00:00
Bas Nieuwenhuizen
00973542ff radv: Allow triggering thread traces by file.
Makes it actually feasible to trace games and not just demos/apitraces.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6537>
2020-09-01 14:19:51 +00:00
Bas Nieuwenhuizen
0d862da170 radv: Centralize enabling thread trace.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6537>
2020-09-01 14:19:51 +00:00
Marek Olšák
b7a6333ee4 amd/registers: switch to new generated register definitions
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6423>
2020-09-01 08:45:54 -04:00
Marek Olšák
e492a3195c amd/registers: add non-gfx10 register files generated from kernel headers
This was split from the next commit to reduce the massive deltas.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6423>
2020-09-01 08:45:52 -04:00
Marek Olšák
48a7a24a69 amd/registers: add a script that generates json from kernel headers
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6423>
2020-09-01 08:45:48 -04:00
Marek Olšák
b2f23afe66 amd/registers: sort registers by offset in json
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6423>
2020-09-01 08:45:46 -04:00
Marek Olšák
843b4e631f amd/registers: expose the canonicalize.py program as a function
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6423>
2020-09-01 08:45:45 -04:00
Roman Gilg
ec5e918ef4 vulkan/wsi/x11: wait for acquirable images in FIFO mode
In FIFO presentation mode we block either on our present-queue or on Present
events after an image was transmitted.

In case we receive completion events without idle events at some point we
exhaust our acquire-queue and can not block anymore on present-queue.

Ensure that the consumer has at least one image to acquire before blocking
again on present-queue. Otherwise wait for one from the X server.

CC: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3344
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6513>
2020-09-01 13:59:53 +02:00
Roman Gilg
d0bc1ad377 vulkan/wsi/x11: add sent image counter
Add a counter to count how many images from our swapchain are currently "sent"
to the X server via Present extension. An image is sent when it has been
presented but we have not yet received an idle event for it.

CC: mesa-stable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6513>
2020-09-01 13:59:41 +02:00
Timur Kristóf
68957a8256 aco: Add README which explains about what ACO is and how it works.
This is based on an early summary written by Daniel, but updated to
reflect the current state of ACO and reworded to better fit the format.
Also added is a table which details what SW stages correspond to what
HW stages on each HW generation.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4164>
2020-09-01 10:41:34 +00:00
Timur Kristóf
b4d4c548eb aco: Fixup markdown formatting of the README-ISA.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4164>
2020-09-01 10:41:34 +00:00
Timur Kristóf
086fafc4e0 aco: Move README to README-ISA
The old "readme" is not really a readme but rather just
a bunch of notes with our findings about the GCN/RDNA ISA.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4164>
2020-09-01 10:41:34 +00:00
Samuel Pitoiset
bc123c396a nir/algebraic: mark some optimizations with fsat(NaN) as inexact
If a is Nan, fsat(NaN) is expected to be 0 and some optimizations
should be marked as inexact.

Fixes a GPU hang with Death Stranding and RADV/ACO (RADV/LLVM
isn't affected because it lowers fsat).

No fossils-db change.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3368
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6519>
2020-09-01 11:20:03 +02:00
Marek Olšák
52cac06862 gallivm: fix build on LLVM 12 due to LLVMAddConstantPropagationPass removal
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3465
Cc: 20.1 20.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6531>
2020-09-01 06:59:33 +00:00
Samuel Pitoiset
8b1ab78985 radv: dump GPU info into the hang report
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by:  Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6471>
2020-09-01 08:27:52 +02:00
Samuel Pitoiset
aa675cdc91 radv: improve reporting faulty pipelines when a GPU hang is detected
Because the driver now waits for idle after every draw/dispatch
calls, we shouldn't report gfx pipelines when the GPU hang happens
after a dispatch (or the opposite).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by:  Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6471>
2020-09-01 08:27:48 +02:00
Samuel Pitoiset
dd1f035f6e radv: force RADV_DEBUG=syncshaders when RADV_TRACE_FILE is used
It's a requirement to be able to identify the first bad draw or
dispatch call.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by:  Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6471>
2020-09-01 08:27:46 +02:00
Vinson Lee
004119d5b7 vulkan: Fix memory leaks.
Fix warnings reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_storage: Variable info going out of scope leaks the storage it
points to.

Fixes: 9bc5b2d169 ("vulkan: add initial device selection layer. (v6.1)")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6509>
2020-09-01 00:47:19 +00:00
Vinson Lee
50e14c3d25 radv/winsys: Fix memory leak.
Fix warning reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_storage: Variable handles going out of scope leaks the storage it
points to.

Fixes 485ea7d711 ("radv/winsys: pass the buffer list via the CS ioctl for less CPU overhead")

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by:  Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6510>
2020-08-31 17:33:51 -07:00
Jesse Natalie
b778e7bd6c nir/vtn: Convert constant samplers to variables with data
Reviewd-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5242>
2020-08-31 21:17:39 +00:00
Jesse Natalie
397730edd5 nir/vtn: Add intrinsics for CL image format/order queries
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5242>
2020-08-31 21:17:39 +00:00
Jesse Natalie
5ce6821900 nir/vtn: ImageSizeLod op can be applied to images
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5242>
2020-08-31 21:17:39 +00:00
Jesse Natalie
701cb9d60c nir/vtn: Handle integer sampling coordinates
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5242>
2020-08-31 21:17:39 +00:00
Jesse Natalie
a196f05fc2 nir/vtn: Use return type rather than image type for tex ops
Since OpenCL images don't have types, we can't use the image type here.
Rather than special-casing and only using SPIR-V return type for CL images,
we can just always use the return type to fill out the tex info.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5242>
2020-08-31 21:17:39 +00:00
Jesse Natalie
de36b5b805 nir/vtn: Add support for kernel images to SPIRV-to-NIR.
There's a few quirks: kernel images are untyped, whether they're
sampled is unknown, and they're passed as inputs to the kernel even though
SPIR-V declares their address space as UniformConstant.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5242>
2020-08-31 21:17:39 +00:00
Jesse Natalie
ce6f66242a nir/vtn: Add type constant to image intrinsics
Since OpenCL supports untyped images, backends might need type info
to be able to support the load/store ops.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5242>
2020-08-31 21:17:38 +00:00
Jesse Natalie
865a2ad086 clover/nir/spirv: Use uniform rather than shader_in for kernel inputs
The semantics of inputs for CL are a closer match to the semantics of uniforms for graphics.
Rather than cross-stage data, it's data that every thread sees uniformly.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6497>
2020-08-31 19:58:14 +00:00
Alyssa Rosenzweig
41d0a81c2a pan/mdg: Fix perspective combination
It's not enough to multiply by a .w reciprocal, we have to be taking the
reciprocal of the thing we're actually multiplying against.

Fixes incorrect rendering in Manhattan.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6525>
2020-08-31 19:43:55 +00:00
Alyssa Rosenzweig
c8ac01af33 pan/mdg: Fix discard encoding
Let's match the blob.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6525>
2020-08-31 19:43:55 +00:00
Lionel Landwerlin
9efdbb2af4 anv: fix robust buffer access
In 957bbc6ad9 we merged all the per stages allocations of push
constants into a single one. Unfortunately one field remained per
stage.

This fixes the issue by including all the per stage values of the
masked registers for robust buffer access into the push constant data.

v2: Drop unneeded loop (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 957bbc6ad9 ("anv: simplify push constant emissions")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6505>
2020-08-31 19:24:42 +00:00
Eric Anholt
73d2c6cdce nir: Switch the indexing of block->live_in/out arrays.
In nir-to-tgsi, I want to free temps storing SSA values when they go dead,
and NIR liveness has most of the information I need.  Hoever, when I reach
the end of a block, I need to free whatever temps were in liveout which
are dead at that point.  If liveout is indexed by live_index, then I don't
know the maximum live_index for iterating the live_out bitset, and I also
don't have a way to map that index back to the def->index that my temps
are stored under.

We can use the more typical def->index for these bitsets, which resolves
both of those problems.  The only cost is that ssa_undefs don't get merged
into a single bit in the bitfield, but there are generally 1-4 of them in
a shader and we don't track liveness for those anyway so splitting them
apart is fine.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6408>
2020-08-31 18:28:36 +00:00
Eric Anholt
5d2b2b59c4 nir: Invalidate live SSA def information when making new SSA defs.
Noted by @jekstrand in review of the SSA live index changes.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6408>
2020-08-31 18:28:36 +00:00
Eric Anholt
8c4fb19f09 pipe-loader: Use real galliumvl if radeonsi is being linked.
When switching to lld, I saw errors from multiply defined vl symbols due to
radeonsi always linking libgalliumvl.

Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6324>
2020-08-31 17:50:30 +00:00
Eric Anholt
221aa00eeb turnip: Make sure we include the build id.
The ir3 disk cache is initialized when we use the ir3 compiler, even if we
don't use it ourselves, and it requires a build id.  With lld, it seems we
don't end up getting one included by default.

Fixes: f97acb4bb4 ("freedreno/ir3: disk-cache support")
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6324>
2020-08-31 17:50:30 +00:00
Italo Nicola
ee288f293b nir: add shared/global atomics to nir_get_io_offset_src()
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6521>
2020-08-31 17:36:12 +00:00
Eric Anholt
e281ee04df nir: Look up the shader when printing a single instruction.
If you've inserted the instruction into a block, then we can get to the
shader.  This improves our instruction output, giving you i/o semantics
and variable names in intrinsics.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6496>
2020-08-31 17:20:43 +00:00
Eric Anholt
a3a8322dcd nir: Fix printing of individual instructions with io semantics.
The state->shader is missing when used outside of nir_print_shader, just
drop these details in that case.  We can fix nir_print_instr() to look up
the shader, but let's also make sure that an instr detached from a shader
(such as one you're constructing but haven't yet inserted) still works.

Fixes: 2b1ef5df4e ("nir: print IO semantics (v2)")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6496>
2020-08-31 17:20:43 +00:00
Ilia Mirkin
4c050f222f panfrost: enable DrawTransformFeedback*
This is needed for ARB_transform_feedback2, which I plan on requiring
for ES3. Also update docs/features.txt

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6247>
2020-08-31 17:10:35 +00:00
Jason Ekstrand
e8b3bc1d55 intel/nir: Lower things with > 4 components in lower_mem_access_bit_sizes
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6502>
2020-08-31 17:04:40 +00:00
Jason Ekstrand
55ae704513 intel/fs: Add support for vec8 and vec16 ops
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6502>
2020-08-31 17:04:40 +00:00
Lionel Landwerlin
b6a013ccab anv: VK_INTEL_performance_query interaction with VK_EXT_private_data
All objects are expected to have the base internal object for private
data storage.

This also fixes a memory leak of a gen_perf_registers structure.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 51c6bc13ce ("anv,vulkan: Implement VK_EXT_private_data")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6255>
2020-08-31 15:59:36 +00:00