Commit graph

117072 commits

Author SHA1 Message Date
Samuel Pitoiset
1b553dd47f ac: make use of ac_get_store_intr_attribs() where possible
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-03-20 22:18:35 +01:00
Dylan Baker
4188dd7879 bin/install_megadrivers.py: Correctly handle DESTDIR=''
Currently if destdir is set to '' then the resulting libdir will have
it's first character replaced by / instead of / being prepended to the
string. This was the result of ensuring that that DESTDIR wouldn't be
ignored if libdir was absolute, since the only cases that meson allows
the libdir to be absolute is if the prefix is /, this won't be a
problem.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110211
Fixes: ae3f45c11e
       ("bin/install_megadrivers: fix DESTDIR and -D*-path")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-03-20 20:26:44 +00:00
Juan A. Suarez Romero
efcf9c9f9f nir: deref only for OpTypePointer
Fixes dEQP-VK.binding_model.buffer_device_address.* and
dEQP-VK.ssbo.phys.layout* Vulkan CTS tests.

v2: set val->type->stride in the section below (Jason)

v3: restore val->type->type to original place (Jason)

Fixes: d0ba326f23 ("nir/spirv: support physical pointers")
CC: Karol Herbst <kherbst@redhat.com>
CC: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-20 19:26:32 +00:00
Dave Airlie
04189565a0 softpipe: fix texture view crashes
I noticed we crashed piglit arb_texture_view-rendering-formats
when run on softpipe.

This fixes the clear tiles to use the surface format not the
underlying storage format.

This fixes a bunch of srgb piglits as well.

Fixes: 396ac41fc2 (softpipe: add integer support)

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2019-03-21 05:06:07 +10:00
Kenneth Graunke
3c3f250456 nvc0: Skip new update barrier bits
I added new barrier bits in 220c1dce1e
and made most drivers skip them.  I thought nvc0 was already skipping
those but missed the else case here, which does something.  So make it
explicitly skip like I did everywhere else.

Thanks to Ilia for catching this.

Fixes: 220c1dce1e gallium: Add PIPE_BARRIER_UPDATE_BUFFER and UPDATE_TEXTURE bits.
2019-03-20 10:30:32 -07:00
Lionel Landwerlin
6601e5d6fc anv: implement VK_EXT_pipeline_creation_feedback
An extension reporting cache hit in the user supplied pipeline cache
as well as timing information for creating the pipelines & stages.

v2: Don't consider no cache for cache hits (Jason)
    Rework duration accumulation (Jason)

v3: Fold feedback creation writing into pipeline compile functions (Jason/Lionel)

v4: Get cache hit information from anv_device_search_for_kernel() (Jason)
    Only set cache hit from the whole pipeline if all stages also have that bit (Lionel)

v5: Always user_cache_hit in anv_device_search_for_kernel() (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-20 16:18:35 +00:00
Rob Clark
70904eb99a freedreno/ir3/a6xx: fix ssbo comp_swap
One line left out of the conversion to ir3 ssbo intrinsics on a6xx.

Fixes: 2e4525883f ir3/compiler: Enable lower_io_offsets pass and handle new SSBO intrinsics
Signed-off-by: Rob Clark <robdclark@gmail.com>
2019-03-20 11:48:13 -04:00
Jason Ekstrand
0b7e5bdbd4 nir: Constant values are per-column not per-component
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
2019-03-20 09:26:56 -05:00
Jason Ekstrand
9a129510f5 anv: Bump maxComputeWorkgroupInvocations
We initially set this lower because we didn't have SIMD32 support yet
but we've supported SIMD32 for quite some time now.  We should bump it
up to the real limit.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-20 09:26:56 -05:00
Samuel Pitoiset
4fa61273a8 radv: fix binding transform feedback buffers
The mask should be accumulated if two calls are used for
binding two buffers at different indexes. Otherwise, the
driver only accounts for the last one.

Noticed while glancing at this code.

Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-03-20 09:06:40 +01:00
Samuel Pitoiset
f4f0e3a395 ac: use llvm.amdgcn.fract intrinsic for nir_op_ffract
Noticed with a Doom shader.

29077 shaders in 15096 tests
Totals:
SGPRS: 1282125 -> 1282133 (0.00 %)
VGPRS: 908716 -> 908616 (-0.01 %)
Spilled SGPRs: 24811 -> 24779 (-0.13 %)
Code Size: 49048176 -> 48936488 (-0.23 %) bytes
Max Waves: 244232 -> 244226 (-0.00 %)

Totals from affected shaders:
SGPRS: 229584 -> 229592 (0.00 %)
VGPRS: 163268 -> 163168 (-0.06 %)
Spilled SGPRs: 8682 -> 8650 (-0.37 %)
Code Size: 12819572 -> 12707884 (-0.87 %) bytes
Max Waves: 24398 -> 24392 (-0.02 %)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-03-20 09:06:35 +01:00
Kenneth Graunke
220c1dce1e gallium: Add PIPE_BARRIER_UPDATE_BUFFER and UPDATE_TEXTURE bits.
The glMemoryBarrier() function makes shader memory stores ordered with
respect to things specified by the given bits.  Until now, st/mesa has
ignored GL_TEXTURE_UPDATE_BARRIER_BIT and GL_BUFFER_UPDATE_BARRIER_BIT,
saying that drivers should implicitly perform the needed flushing.

This seems like a pretty big assumption to make.  Instead, this commit
opts to translate them to new PIPE_BARRIER bits, and adjusts existing
drivers to continue ignoring them (preserving the current behavior).

The i965 driver performs actions on these memory barriers.  Shader
memory stores go through a "data cache" which is separate from the
render cache and other read caches (like the texture cache).  All
memory barriers need to flush the data cache (to ensure shader memory
stores are visible), and possibly invalidate read caches (to ensure
stale data is no longer visible).  The driver implicitly flushes for
most caches, but not for data cache, since ARB_shader_image_load_store
introduced MemoryBarrier() precisely to order these explicitly.

I would like to follow i965's approach in iris, flushing the data cache
on any MemoryBarrier() call, so I need st/mesa to actually call the
pipe->memory_barrier() callback.

Fixes KHR-GL45.shader_image_load_store.advanced-sync-textureUpdate
and Piglit's spec/arb_shader_image_load_store/host-mem-barrier on
the iris driver.

Roland said this looks reasonable to him.
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-03-19 23:43:33 -07:00
Tapani Pälli
3e534489ec iris: mark switch case fallthrough
CID: 1444103
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-03-20 08:21:50 +02:00
Tapani Pälli
03cbfbd913 iris: initialize num_cbufs
Currently initialized only if 'ish' is non-NULL.

CID: 1444106
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-03-20 08:20:09 +02:00
Daniel Stone
d258b787fa panfrost: Properly align stride
Handle buffers whose width is not aligned to 16px by padding the stride
and storing it accordingly.

This does not reject imports for images whose stride is not sufficiently
aligned.

v2: make sure bo->stride is set on imported buffers, and add missing
variable definition. (Tomeu)

Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-03-20 04:20:42 +00:00
Anuj Phogat
2be60e0c73 anv/icl: Add WA_2204188704 to disable pixel shader panic dispatch
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-19 14:42:19 -07:00
Anuj Phogat
85ecd14ef6 i965/icl: Add WA_2204188704 to disable pixel shader panic dispatch
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-19 14:42:02 -07:00
Eric Engestrom
b3aa37046b gitlab-ci: drop most autotools builds
With autotools this close to being not supported anymore, let's not
waste half of the CI cycles on it. The default build will catch most
issues, and the rest can be tested by the old Travis.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-03-19 17:40:05 +00:00
Eric Anholt
17115da6ad v3d: Expose the dma-buf modifiers query.
This allows DRI3 to pick between UIF and raster according to whether we're
pageflipping or not and whether the pageflipping display can do UIF,
avoiding copies for the windowed/composited case that previously was
forced to linear.

Improves windowed glmark2 -b build:use-vbo=false performance by 30.7783%
+/- 13.1719% (n=3)
2019-03-19 08:59:01 -07:00
Eric Anholt
bf6973199d v3d: Allow the UIF modifier with renderonly.
We ask the other side to make a buffer with the right number of pages, and
then just store the UIF in it.  This avoids an extra silent copy of the
buffer from linear to UIF if it gets used for texturing (X11 copy-based
swapbuffers, GL compositors).
2019-03-19 08:54:46 -07:00
Eric Anholt
eb5903a908 v3d: Always lay out shared tiled buffers with UIF_TOP set.
The samplers are already ready for this, we just needed to make sure that
layout chose UIF for level 0.
2019-03-19 08:54:46 -07:00
Andres Gomez
ab28dca033 Revert "glsl: relax input->output validation for SSO programs"
This reverts commit 1aa5738e66.

This patch incorrectly asumed that for SSOs no inner interface
matching check was needed.

From the ARB_separate_shader_objects spec v.25:

  " With separable program objects, interfaces between shader stages
    may involve the outputs from one program object and the inputs
    from a second program object.  For such interfaces, it is not
    possible to detect mismatches at link time, because the programs
    are linked separately.  When each such program is linked, all
    inputs or outputs interfacing with another program stage are
    treated as active.  The linker will generate an executable that
    assumes the presence of a compatible program on the other side of
    the interface.  If a mismatch between programs occurs, no GL error
    will be generated, but some or all of the inputs on the interface
    will be undefined."

This completes the fix from commit:
3be05dd267 ("glsl/linker: don't fail non static used inputs without matching outputs")

Fixes: 1aa5738e66 ("glsl: relax input->output validation for SSO programs")
Cc: Tapani Pälli <tapani.palli@intel.com>
Cc: Timothy Arceri <tarceri@itsqueeze.com>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-03-19 17:36:20 +02:00
Andres Gomez
422882e78f glsl/linker: simplify xfb_offset vs xfb_stride overflow check
Current implementation uses a complicated calculation which relies in
an implicit conversion to check the integral part of 2 division
results.

However, the calculation actually checks that the xfb_offset is
smaller or a multiplier of the xfb_stride. For example, while this is
expected to fail, it actually succeeds:

  "

    ...

    layout(xfb_buffer = 2, xfb_stride = 12) out block3 {
      layout(xfb_offset = 0) vec3 c;
      layout(xfb_offset = 12) vec3 d; // ERROR, requires stride of 24
    };

    ...

  "

Fixes: 2fab85aaea ("glsl: add xfb_stride link time validation")
Cc: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-03-19 17:23:27 +02:00
Andres Gomez
3be05dd267 glsl/linker: don't fail non static used inputs without matching outputs
If there is no Static Use of an input variable, the linker shouldn't
fail whenever there is no defined matching output variable in the
previous stage.

From page 47 (page 51 of the PDF) of the GLSL 4.60 v.5 spec:

  " Only the input variables that are statically read need to be
    written by the previous stage; it is allowed to have superfluous
    declarations of input variables."

Now, we complete this exception whenever the input variable has an
explicit location. Previously, 18004c338f ("glsl: fail when a
shader's input var has not an equivalent out var in previous") took
care of the cases in which the input variable didn't have an explicit
location.

v2: do the location based interface matching check regardless on
    whether it is a separable program or not (Ilia).

Fixes: 1aa5738e66 ("glsl: relax input->output validation for SSO programs")
Cc: Timothy Arceri <tarceri@itsqueeze.com>
Cc: Iago Toral Quiroga <itoral@igalia.com>
Cc: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: Tapani Pälli <tapani.palli@intel.com>
Cc: Ian Romanick <ian.d.romanick@intel.com>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-03-19 17:23:27 +02:00
Andres Gomez
de1bc2d19a glsl/linker: always validate explicit location among inputs
Outputs are always validated when having explicit locations and we
were trusting its outcome to catch similar problems with the inputs
since, in case of having undefined outputs for existing inputs, we
would be already reporting a linker error.

However, consider this case:

  " Shader stage n:
    ---------------

    ...

    layout(location = 0) out float a;

    ...

    Shader stage n+1:
    -----------------

    ...

    layout(location = 0) in float b;
    layout(location = 0) in float c;

    ...
  "

Currently, this won't report a linker error even though location
aliasing is happening for the inputs.

Therefore, we also need to validate the inputs independently from the
outcome of the outputs validation.

Cc: Timothy Arceri <tarceri@itsqueeze.com>
Cc: Iago Toral Quiroga <itoral@igalia.com>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-03-19 17:23:27 +02:00
Andres Gomez
a96093136b glsl: correctly validate component layout qualifier for dvec{3,4}
From page 62 (page 68 of the PDF) of the GLSL 4.50 v.7 spec:

  " A dvec3 or dvec4 can only be declared without specifying a
    component."

Therefore, using the "component" qualifier with a dvec3 or dvec4
should result in a compiling error.

v2: enhance the error message (Timothy).

Fixes: 94438578d2 ("glsl: validate and store component layout qualifier in GLSL IR")
Cc: Timothy Arceri <tarceri@itsqueeze.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-03-19 17:23:27 +02:00
Jason Ekstrand
cbfe31ccbe Revert "nir: const nir_call_instr::callee"
This reverts commit db57db5317.  When
building IR, nothing is really immutable and, since C has no concept of
constness propagating beyond the first pointer, we have to be vary
careful with how we use it.  To just throw const into a function like
this is a lie.

Instead, we should just drop the unneeded const in spirv_to_nir which
this commit does along with the revert.
2019-03-19 10:19:42 -05:00
Eric Engestrom
43b6dd05f7 gitlab-ci: add clang build
`clang` has a different set of warnings and errors than `gcc`, so it's
useful to do at least a generic pass over Mesa with it.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-03-19 12:59:38 +00:00
Eric Engestrom
db57db5317 nir: const nir_call_instr::callee
Fixes: c95afe56a8 "nir/spirv: handle kernel function parameters"
Cc: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
2019-03-19 12:51:53 +00:00
Rafael Antognolli
76f9ca6cf9 iris: Make intel_hiz_exec public.
Need to use it for fast clearing depth buffers.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-03-18 22:27:02 -07:00
Rafael Antognolli
9c63ec26ea iris: Enable HiZ for multisampled depth surfaces.
Fix this check so that we can get a HiZ aux buffer for multisampled
surfaces as well. Also make sure we don't try to emit a sampler view
surface state for multisampled depth sufaces with HiZ enabled, as
the sampler can't HiZ for multisampled buffers and isl would assert.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-03-18 22:21:30 -07:00
Karol Herbst
d0ba326f23 nir/spirv: support physical pointers
v2: add load_kernel_input

Signed-off-by: Karol Herbst <kherbst@redhat.com>

squash! nir/spirv: support physical pointers
2019-03-19 04:08:07 +00:00
Karol Herbst
c95afe56a8 nir/spirv: handle kernel function parameters
the idea here is to generate an entry point stub function wrapping around the
actual kernel function and turn all parameters into shader inputs with byte
addressing instead of vec4.

This gives us several advantages:
1. calling kernel functions doesn't differ from calling any other function
2. CL inputs match uniforms in most ways and we can just take advantage of most
   of nir_lower_io

v2: move code into a seperate function
v3: verify the entry point got a name
    fix minor typo
v4: make vtn_emit_kernel_entry_point_wrapper take the old entry point as an arg

Signed-off-by: Karol Herbst <kherbst@redhat.com>
2019-03-19 04:08:07 +00:00
Karol Herbst
0ccdf23a57 nir/lower_locals_to_regs: cast array index to 32 bit
local memory is too small to require 64 bit pointers, so cast the array index
to a 32 bit value to save up on 64 bit operations.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
2019-03-19 04:08:07 +00:00
Karol Herbst
44d32e62fb glsl: add cl_size and cl_alignment
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
2019-03-19 04:08:07 +00:00
Karol Herbst
659f333b3a glsl: add packed for struct types
We need this for OpenCL kernels because we have to apply C rules for alignment
and padding inside structs and for this we also have to know if a struct is
packed or not.

v2: fix for kernel params

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
2019-03-19 04:08:07 +00:00
Alyssa Rosenzweig
b98955e128 panfrost: Rewrite varying assembly
There are two stages to varying assembly in the command stream: creating
the varying buffers in the command stream, and creating the varying meta
descriptors (also in the command stream) linked to the aforementioned
buffers. The previous code for this was ad hoc and brittle, making some
invalid assumptions causing unmaintainable workarounds to pile up across
the driver (both compiler and command stream side).

This patch completely rewrites the varying assembly code. There's a
trivial performance penalty (we now memcpy the varying meta to the
command stream on draw, rather than on compile). That said, the
improvement in flexibility and clarity is well-worth it.

The motivator for these changes was support for gl_PointCoord (and
eventually point sprites for legacy GL), which was impossible to
implement with the old varying assembly code.  With the new refactor,
it's super easy; support for gl_PointCoord is included with this patch.

All in all, I'm quite happy with how this turned out.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-03-19 03:55:10 +00:00
Alyssa Rosenzweig
5e6d33a7b6 panfrost: Replay more varying buffers
This is required for gl_PointCoord to show up on decodes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-03-19 03:53:56 +00:00
Alyssa Rosenzweig
b517e36842 panfrost/decode: Respect primitive size pointers
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-03-19 03:53:48 +00:00
Alyssa Rosenzweig
4f89e4437c panfrost: Disable PIPE_CAP_TGSI_TEXCOORD
I don't know why this was on to begin with...?

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-03-19 03:52:43 +00:00
Alyssa Rosenzweig
7c02c4f114 panfrost: Fix primconvert check
In addition to fixing actual primconvert bugs, this prevents an infinite
loop when trying to draw POINTS.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-03-19 03:52:20 +00:00
Alyssa Rosenzweig
60d5b85261 panfrost: Workaround buffer overrun with mip level
Mipmaps are still broken, but at least this way we don't crash on some
apps using mipmaps.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-03-19 03:50:59 +00:00
Bas Nieuwenhuizen
a777c3d7cb radv: Use correct image view comparison for fast clears.
The if is actually returning true on success, enabling fast clears, so we
need to have the test succeed when the iview dimensions are right.

Fixes: d5400a5ec2 "radv: provide a helper for comparing an image extents."
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-03-19 00:39:47 +01:00
Jason Ekstrand
493b3ada9b anv,radv: Implement VK_KHR_surface_capability_protected
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-03-18 17:02:10 +00:00
Danylo Piliaiev
ecb98c6898 anv: Treat zero size XFB buffer as disabled
Vulkan spec doesn't explicitly forbid zero size transform
feedback buffers.
Having zero size xfb caused SurfaceSize overflow and
triggered assert in debug build.

The only way to have zero size SO_BUFFER is to disable
SO_BUFFER as stated in hardware spec.

From SKL PRM, Vol 2a, "3DSTATE_SO_BUFFER":
  "If set, stream output to SO Buffer is enabled,
  if 3DSTATE_STREAMOUT::SO Function ENABLE is also enabled.
  If clear, the SO Buffer is considered "not bound" and effectively
  treated as a zero- length buffer for the purposes of SO output and
  overflow detection. If an enabled stream's Stream to Buffer Selects
  includes this buffer it is by definition an overflow condition.
  That stream will cause no writes to occur,
  and only SO_PRIM_STORAGE_NEEDED[<stream>] will increment."

Fixes: 36ee2fd61c "anv: Implement the basic form of VK_EXT_transform_feedback"

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-18 16:09:42 +00:00
Emil Velikov
f5b71b18ef docs: update calendar, add news item and link release notes for 18.3.5
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2019-03-18 16:02:27 +00:00
Emil Velikov
d4e26b36b2 docs: add sha256 checksums for 18.3.5
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit ec770b43b9)
2019-03-18 15:58:06 +00:00
Emil Velikov
cb9fe1e89b docs: add release notes for 18.3.5
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 022708cb40)
2019-03-18 15:58:05 +00:00
Bas Nieuwenhuizen
d1aa37dfff radv: Implement VK_EXT_host_query_reset.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
2019-03-18 14:48:41 +00:00
Jason Ekstrand
887041c763 anv: Implement VK_EXT_host_query_reset
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-18 14:48:41 +00:00