Commit graph

117072 commits

Author SHA1 Message Date
Bas Nieuwenhuizen
cb728f28ac vl: Always enable drm winsys.
The dri2 winsys also uses libdrm (and you can only enable dri3 if
you enable dri2), and the drm winsys only requires libdrm.

So if any winsys is enabled you can also enable the drm winsys, and
since we always want at least one winsys we can always enable it.

I removed the check for the drm platform for VA and OMX since they
do not care anymore. Since we still check for one of r600g, nouveau
or radeonsi, we are guarantueed to still only enable it by default
in a configuration that requires libdrm anyway. So for people using
va=auto, we don't suddenly start requiring libdrm were we did not
before.

This supersedes "vl: Enable DRM by default.", which I pushed, but
rolled back because it used dep_libdrm before its definition.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-06-13 08:25:48 +00:00
Bas Nieuwenhuizen
b4c7ce360b radv: Always disable DCC on shareable images.
Do not want it for perf reasons. Always have to disable DCC when
transferring to external queue.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-06-13 08:15:45 +00:00
Bas Nieuwenhuizen
0667c1f14b radv: Skip transitions coming from external queue.
Transitions to external queue should do the transition & make sure
it works on all queues.

Fixes: 8ebc7dcb59 "radv: Allow fast clears with concurrent queue mask for some layouts."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-06-13 08:15:45 +00:00
Mateusz Krzak
60009aefdb lima/ppir: change offset type to int
Offset doesn't need to be 64-bit. This fixes compilation error
with 64-bit off_t.

Fixes: af0de6b9 lima/ppir: implement discard and discard_if

Suggested-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Mateusz Krzak <kszaquitto@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Tested-by: Andreas Baierl <ichgeh@imkreisrum.de>
2019-06-13 07:43:24 +02:00
Chia-I Wu
900a80f9e4 virgl: virgl_transfer should own its virgl_resource
We should avoid having potentially dangling pointers to
pipe_resources in general.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2019-06-12 18:20:30 -07:00
Chia-I Wu
74051efbea virgl: pass virgl_context to transfer create/destroy
A pipe_transfer is a context object.  It is fine for the
constructor/destructor to have access to the context.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2019-06-12 18:20:30 -07:00
Chia-I Wu
514e12b1b8 virgl: init transfer queue from virgl_context
A pipe_transfer is a context object.  It is fine for
virgl_transfer_queue to have access to the context.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2019-06-12 18:20:30 -07:00
Chia-I Wu
308ba2c0f9 virgl: clean up virgl_transfer_queue.h
Add header guard and forward declare structs.  Move virgl_resource.h
inclusion to the C file.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
2019-06-12 18:20:30 -07:00
Nicolai Hähnle
2d114e6267 radeonsi: add radeonsi_debug_disassembly option
This dumps disassembly to the pipe_debug_callback together with shader
stats.

Can be used together with shader-db to get full disassembly of all shaders
in the database.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Nicolai Hähnle
3bde69e789 radeonsi: fix line splitting in si_shader_dump_assembly
Compute the count since the start of the current line instead of the
count since the start of the the disassembly.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Nicolai Hähnle
aa737e8580 radeonsi: raise the alignment of LDS memory for compute shaders
This implies that the memory will always be at address 0, which allows
LLVM to generate slightly better code.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Nicolai Hähnle
33be5ad8a3 radeonsi: use an explicit symbol for the LSHS LDS memory
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Nicolai Hähnle
174fad7075 radeonsi: rename lds_{load,store} to lshs_lds_{load,store}
These functions are now only used in LS/HS shaders (both separate and
merged).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Nicolai Hähnle
b519ddc35c radeonsi/gfx9: declare LDS ESGS ring as an explicit symbol on LLVM >= 9
This will make it easier to use LDS for other purposes in geometry
shaders in the future.

The lifetime of the esgs_ring variable is as follows:
- declared as [0 x i32] while compiling shader parts or monolithic shaders
- just before uploading, gfx9_get_gs_info computes (among other things)
  the final ESGS ring size (this depends on both the ES and the GS shader)
- during upload, the "esgs_ring" symbol is given to ac_rtld as a shared
  LDS symbol, which will lead to correctly laying out the LDS including
  other LDS objects that may be defined in the future
- si_shader_gs uses shader->config.lds_size as the LDS size

This change depends on the LLVM changes for emitting LDS symbols into
the ELF file.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Nicolai Hähnle
f8315ae04b amd/rtld: layout and relocate LDS symbols
Upcoming changes to LLVM will emit LDS objects as symbols in the ELF
symbol table, with relocations that will be resolved with this change.

Callers will also be able to define LDS symbols that are shared between
shader parts. This will be used by radeonsi for the ESGS ring in gfx9+
merged shaders.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Nicolai Hähnle
dc99a8cd9b radeonsi: cleanup some #includes
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Nicolai Hähnle
1ff2440eee amd/common: use ARRAY_SIZE for the LLVM command line options
This is more convenient for changing it around during debug.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Nicolai Hähnle
ca21ba2a08 radeonsi: inline si_shader_binary_read_config into its only caller
Since it can only be used for reading the config of an individual,
non-combined shader, it is not very reusable anyway.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Nicolai Hähnle
bf8a1ca902 radeonsi: use the new run-time linker for shaders
v2:
- fix a memory leak

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Nicolai Hähnle
16bee0e5f6 radeonsi: don't declare pointers to static strings
The compiler should be able to optimize them away, but still. There's
no point in declaring those as pointers, and if the compiler *doesn't*
optimize them away, they add unnecessary load-time relocations.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Nicolai Hähnle
3c958d924a amd/common: add ac_compile_module_to_elf
A new variant of ac_compile_module_to_binary that allows us to
keep the entire ELF around.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Nicolai Hähnle
66da60f4da radeonsi: dump shader binary buffer contents
Help identify bugs related to corruption of shaders in memory,
or errors in shader upload / rtld.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Nicolai Hähnle
bf11c594dd radeonsi: return bool from si_shader_binary_upload
We didn't really use error codes anyway.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Nicolai Hähnle
8b1343ca79 radeonsi: let si_shader_create return a boolean
We didn't really use error codes anyway.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Nicolai Hähnle
77b05cc42d radeonsi: use ac_shader_config
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Nicolai Hähnle
b3be346c68 amd/common: add a more powerful runtime linker
Using an explicit linker instead of just concatenating .text
sections will allow us to start using .rodata sections and
explicit descriptions of data on LDS that is shared between
stages.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 20:28:23 -04:00
Caio Marcelo de Oliveira Filho
608257cf82 i965: Fix INTEL_DEBUG=bat
Use hash_table_u64 instead of hash_table directly, since the former
will also handle the special keys (deleted and freed) and allow use
the whole u64 space.

Fixes crash in INTEL_DEBUG=bat when using a key with value 0 -- the
current value for a freed key.

Fixes: b38dab101c "util/hash_table: Assert that keys are not reserved pointers"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-06-12 15:57:16 -07:00
Caio Marcelo de Oliveira Filho
eb41ce1b01 util/hash_table: Properly handle the NULL key in hash_table_u64
The hash_table_u64 should support any uint64_t as input.  It does
special handling for the "deleted" key, storing the data in the table
itself; do the same for the "freed" key.

Fixes: b38dab101c "util/hash_table: Assert that keys are not reserved pointers"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-06-12 15:57:16 -07:00
Nicolai Hähnle
c129cb3861 amd/common: clarify ac_shader_binary::lds_size
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 18:33:21 -04:00
Nicolai Hähnle
2e96c01073 amd/common: extract ac_parse_shader_binary_config
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 18:33:08 -04:00
Nicolai Hähnle
de8a919702 u_dynarray: turn util_dynarray_{grow, resize} into element-oriented macros
The main motivation for this change is API ergonomics: most operations
on dynarrays are really on elements, not on bytes, so it's weird to have
grow and resize as the odd operations out.

The secondary motivation is memory safety. Users of the old byte-oriented
functions would often multiply a number of elements with the element size,
which could overflow, and checking for overflow is tedious.

With this change, we only need to implement the overflow checks once.
The checks are cheap: since eltsize is a compile-time constant and the
functions should be inlined, they only add a single comparison and an
unlikely branch.

v2:
- ensure operations are no-op when allocation fails
- in util_dynarray_clone, call resize_bytes with a compile-time constant element size

v3:
- fix iris, lima, panfrost

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 18:30:25 -04:00
Nicolai Hähnle
71b45bae14 u_dynarray: return 0 on realloc failure and ensure no-op
We're not very good at handling out-of-memory conditions in general, but
this change at least gives the caller the option of handling it gracefully
and without memory leaks.

This happens to fix an error in out-of-memory handling in i965, which has
the following code in brw_bufmgr.c:

      node = util_dynarray_grow(vma_list, sizeof(struct vma_bucket_node));
      if (unlikely(!node))
         return 0ull;

Previously, allocation failure for util_dynarray_grow wouldn't actually
return NULL when the dynarray was previously non-empty.

v2:
- make util_dynarray_ensure_cap a no-op on failure, add MUST_CHECK attribute
- simplify the new capacity calculation: aside from avoiding a useless loop
  when newcap is very large, this also avoids an infinite loop when newcap
  is larger than 1 << 31

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 18:30:25 -04:00
Nicolai Hähnle
dc75362511 freedreno: use util_dynarray_clear instead of util_dynarray_resize(_, 0)
This is more expressive and simplifies a subsequent change.

v2:
- fix one more call-site after rebase

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-12 18:30:25 -04:00
Alyssa Rosenzweig
1ee2366693 panfrost/midgard: Differentiate vertex/fragment texture tags
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-12 14:32:12 -07:00
Alyssa Rosenzweig
5062b612be panfrost/midgard: Assert on unknown texture source
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-12 14:32:07 -07:00
Alyssa Rosenzweig
4ea512844c panfrost/midgard: Set minimal swizzle on texture input
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-12 14:32:01 -07:00
Alyssa Rosenzweig
6ae4f9c523 panfrost/midgard: Lower texture projectors
We do have native support for perspective division on the load/store
unit, but this is for the future, something ideally we would select
generally, not just for textures. Meanwhile, flipping on projector
lowering works now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-12 14:31:53 -07:00
Alyssa Rosenzweig
4012e06788 panfrost/midgard: Implement txl
This follows the txb implementation, but requires an adjustment to how
the cont/last flags are set.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-12 14:31:45 -07:00
Alyssa Rosenzweig
a19ca344ab panfrost/midgard: Implement txb op
We refactor the main tex handling to fit a bias argument in as well.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-12 14:31:37 -07:00
Alyssa Rosenzweig
1acffb5671 panfrost: Unify bind_vs/fs_state
This replaces bind_vs/fs_state calls to a unified bind_shader_state
call, removing a great deal of duplicated logic related to variant
selection.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-12 14:29:05 -07:00
Alyssa Rosenzweig
f8a4090f80 panfrost: Add panfrost_job_type_for_pipe helper
This logic is repeated in a bunch of places and will only grow worse as
we support more job types; collect it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-12 14:27:47 -07:00
Alyssa Rosenzweig
15fae1e38c panfrost/midgard: Extract emit_varying_read
Paralleling emit_uniform_read, this allows varying reads to be emitted
independent of an honest-to-goodness load vary instruction in the NIR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-12 14:25:17 -07:00
Alyssa Rosenzweig
8c88bd0253 panfrost: Remove "vertex/tiler render target" silliness
I don't think these are actual structures, just figments over
cargoculting dumped memory without making any sense of it. Nothing seems
to break if the region is zeroed out, anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-12 14:21:56 -07:00
Alyssa Rosenzweig
b96df80069 panfrost/decode: Print line number of bad memory access
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-12 14:14:53 -07:00
Alyssa Rosenzweig
fc7bcee865 panfrost: Replace pantrace with direct decoding
History lesson! In the early days of a Panfrost, we had a library
independent of the driver called `panwrap` which would be LD_PRELOAD'ed
into a driver to decode its cmdstream in real-time. When upstreaming
Panfrost, we realized that we would much rather have this decode
functionality maintained in-tree to avoid divergence, but that we could
not upstream panwrap because of its use with the legacy API. So we
instead dumped GPU memory to the filesystem with an out-of-tree panwrap,
and decoded that with the in-tree pandecode module. When we migrated to
the new kernel, we just added support for doing this memory dump
directly from the driver (via a module "pantrace").

This works, but dumping memory every frame is sloooooooooooooow and
error-prone. I figured if we have pandecode in-tree, we might as well
link to it directly in the driver, allowing us to decode Panfrost's
command streams without dumping memory to the filesystem first. This
cleans up the code *substantially* and improves dumping performance by a
HUGE margin. I'm talking "several seconds per frame" to "dumping in
real-time" kind of jump.

Note to users: this removes the environmental option "PANTRACE_BASE".
Instead, for equivalent functionality set "PAN_MESA_DEBUG=trace" and
redirect stdout to the file of your choosing.

This should be debugging Panfrost much more pleasant.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-12 14:07:09 -07:00
Kevin Strasser
845ec8576a st/mesa: Add rgbx handling for fp formats
Add missing cases for fp32 and fp16 formats.

Fixes: c68334ffc0 "st/mesa: add floating point formats in st_new_renderbuffer_fb()"
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-06-12 19:03:47 +00:00
Kevin Strasser
ec0a68e50d gallium/winsys/kms: Fix dumb buffer bpp
The bpp in the dumb buffer creation request is hardcoded to 32, which is an
incorrect assumption as the caller is free to pick any pipe format. Use the
bpp supplied to us through util_format_get_blocksizebits().

Fixes: 3b176c441b "gallium: Add a dumb drm/kms winsys backed swrast provider"
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-06-12 11:44:10 -07:00
Eric Engestrom
9996ddbb27 util/futex: fix dangling pointer use
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110901
Fixes: 7dc2f47882 "util: emulate futex on FreeBSD using umtx"
Cc: Greg V <greg@unrelenting.technology>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-06-12 17:27:44 +01:00
Samuel Pitoiset
d378151246 radv: fix VK_EXT_memory_budget if one heap isn't available
When the visible VRAM size is equal to the VRAM size only two
heaps are exposed.

This fixes dEQP-VK.api.info.device.memory_budget.

Cc: 19.0 19.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-12 15:52:48 +02:00
Samuel Pitoiset
2ef9d2738c radv: fix occlusion queries on VegaM
The number of render backends is 16 but the enabled mask is 0xaaaa.

As noticed by Bas, allowing disabled render backends might break
the OCCLUSION_QUERY packet. We don't use it yet but keep this in
mind.

This fixes dEQP-VK.query_pool.* and dEQP-VK.multiview.*.

Cc: 19.0 19.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-12 15:51:12 +02:00