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synced 2026-01-04 15:40:11 +01:00
panfrost: Remove "vertex/tiler render target" silliness
I don't think these are actual structures, just figments over cargoculting dumped memory without making any sense of it. Nothing seems to break if the region is zeroed out, anyway. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
This commit is contained in:
Alyssa Rosenzweig
parent
b96df80069
commit
8c88bd0253
2 changed files with 77 additions and 90 deletions
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@ -251,28 +251,7 @@ panfrost_clear(
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static mali_ptr
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panfrost_attach_vt_mfbd(struct panfrost_context *ctx)
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{
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/* MFBD needs a sequential semi-render target upload, but what exactly this is, is beyond me for now */
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struct bifrost_render_target rts_list[] = {
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{
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.chunknown = {
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.unk = 0x30005,
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},
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.framebuffer = ctx->misc_0.gpu,
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.zero2 = 0x3,
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},
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};
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/* Allocate memory for the three components */
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int size = 1024 + sizeof(ctx->vt_framebuffer_mfbd) + sizeof(rts_list);
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struct panfrost_transfer transfer = panfrost_allocate_transient(ctx, size);
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/* Opaque 1024-block */
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rts_list[0].chunknown.pointer = transfer.gpu;
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memcpy(transfer.cpu + 1024, &ctx->vt_framebuffer_mfbd, sizeof(ctx->vt_framebuffer_mfbd));
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memcpy(transfer.cpu + 1024 + sizeof(ctx->vt_framebuffer_mfbd), rts_list, sizeof(rts_list));
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return (transfer.gpu + 1024) | MALI_MFBD;
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return panfrost_upload_transient(ctx, &ctx->vt_framebuffer_mfbd, sizeof(ctx->vt_framebuffer_mfbd)) | MALI_MFBD;
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}
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static mali_ptr
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@ -530,7 +530,77 @@ pandecode_rt_format(struct mali_rt_format format)
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}
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static void
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pandecode_replay_mfbd_bfr(uint64_t gpu_va, int job_no)
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pandecode_render_target(uint64_t gpu_va, unsigned job_no, const struct bifrost_framebuffer *fb)
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{
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pandecode_log("struct bifrost_render_target rts_list_%d[] = {\n", job_no);
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pandecode_indent++;
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for (int i = 0; i < MALI_NEGATIVE(fb->rt_count_1); i++) {
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mali_ptr rt_va = gpu_va + i * sizeof(struct bifrost_render_target);
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struct pandecode_mapped_memory *mem =
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pandecode_find_mapped_gpu_mem_containing(rt_va);
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const struct bifrost_render_target *PANDECODE_PTR_VAR(rt, mem, (mali_ptr) rt_va);
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pandecode_log("{\n");
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pandecode_indent++;
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pandecode_rt_format(rt->format);
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/* TODO: How the actual heck does AFBC enabling work here? */
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if (0) {
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pandecode_log(".afbc = {\n");
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pandecode_indent++;
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char *a = pointer_as_memory_reference(rt->afbc.metadata);
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pandecode_prop("metadata = %s", a);
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free(a);
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pandecode_prop("stride = %d", rt->afbc.stride);
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pandecode_prop("unk = 0x%" PRIx32, rt->afbc.unk);
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pandecode_indent--;
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pandecode_log("},\n");
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} else {
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pandecode_log(".chunknown = {\n");
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pandecode_indent++;
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pandecode_prop("unk = 0x%" PRIx64, rt->chunknown.unk);
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char *a = pointer_as_memory_reference(rt->chunknown.pointer);
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pandecode_prop("pointer = %s", a);
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free(a);
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pandecode_indent--;
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pandecode_log("},\n");
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}
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MEMORY_PROP(rt, framebuffer);
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pandecode_prop("framebuffer_stride = %d", rt->framebuffer_stride);
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if (rt->clear_color_1 | rt->clear_color_2 | rt->clear_color_3 | rt->clear_color_4) {
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pandecode_prop("clear_color_1 = 0x%" PRIx32, rt->clear_color_1);
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pandecode_prop("clear_color_2 = 0x%" PRIx32, rt->clear_color_2);
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pandecode_prop("clear_color_3 = 0x%" PRIx32, rt->clear_color_3);
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pandecode_prop("clear_color_4 = 0x%" PRIx32, rt->clear_color_4);
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}
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if (rt->zero1 || rt->zero2 || rt->zero3) {
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pandecode_msg("render target zeros tripped\n");
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pandecode_prop("zero1 = 0x%" PRIx64, rt->zero1);
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pandecode_prop("zero2 = 0x%" PRIx32, rt->zero2);
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pandecode_prop("zero3 = 0x%" PRIx32, rt->zero3);
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}
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pandecode_indent--;
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pandecode_log("},\n");
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}
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pandecode_indent--;
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pandecode_log("};\n");
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}
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static void
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pandecode_replay_mfbd_bfr(uint64_t gpu_va, int job_no, bool with_render_targets)
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{
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struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
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const struct bifrost_framebuffer *PANDECODE_PTR_VAR(fb, mem, (mali_ptr) gpu_va);
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@ -613,7 +683,7 @@ pandecode_replay_mfbd_bfr(uint64_t gpu_va, int job_no)
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gpu_va += sizeof(struct bifrost_framebuffer);
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if (fb->unk3 & MALI_MFBD_EXTRA) {
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if ((fb->unk3 & MALI_MFBD_EXTRA) && with_render_targets) {
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mem = pandecode_find_mapped_gpu_mem_containing(gpu_va);
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const struct bifrost_fb_extra *PANDECODE_PTR_VAR(fbx, mem, (mali_ptr) gpu_va);
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@ -694,70 +764,8 @@ pandecode_replay_mfbd_bfr(uint64_t gpu_va, int job_no)
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gpu_va += sizeof(struct bifrost_fb_extra);
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}
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pandecode_log("struct bifrost_render_target rts_list_%d[] = {\n", job_no);
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pandecode_indent++;
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for (int i = 0; i < MALI_NEGATIVE(fb->rt_count_1); i++) {
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mali_ptr rt_va = gpu_va + i * sizeof(struct bifrost_render_target);
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mem = pandecode_find_mapped_gpu_mem_containing(rt_va);
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const struct bifrost_render_target *PANDECODE_PTR_VAR(rt, mem, (mali_ptr) rt_va);
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pandecode_log("{\n");
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pandecode_indent++;
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pandecode_rt_format(rt->format);
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/* TODO: How the actual heck does AFBC enabling work here? */
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if (0) {
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pandecode_log(".afbc = {\n");
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pandecode_indent++;
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char *a = pointer_as_memory_reference(rt->afbc.metadata);
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pandecode_prop("metadata = %s", a);
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free(a);
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pandecode_prop("stride = %d", rt->afbc.stride);
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pandecode_prop("unk = 0x%" PRIx32, rt->afbc.unk);
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pandecode_indent--;
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pandecode_log("},\n");
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} else {
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pandecode_log(".chunknown = {\n");
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pandecode_indent++;
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pandecode_prop("unk = 0x%" PRIx64, rt->chunknown.unk);
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char *a = pointer_as_memory_reference(rt->chunknown.pointer);
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pandecode_prop("pointer = %s", a);
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free(a);
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pandecode_indent--;
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pandecode_log("},\n");
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}
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MEMORY_PROP(rt, framebuffer);
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pandecode_prop("framebuffer_stride = %d", rt->framebuffer_stride);
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if (rt->clear_color_1 | rt->clear_color_2 | rt->clear_color_3 | rt->clear_color_4) {
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pandecode_prop("clear_color_1 = 0x%" PRIx32, rt->clear_color_1);
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pandecode_prop("clear_color_2 = 0x%" PRIx32, rt->clear_color_2);
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pandecode_prop("clear_color_3 = 0x%" PRIx32, rt->clear_color_3);
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pandecode_prop("clear_color_4 = 0x%" PRIx32, rt->clear_color_4);
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}
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if (rt->zero1 || rt->zero2 || rt->zero3) {
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pandecode_msg("render target zeros tripped\n");
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pandecode_prop("zero1 = 0x%" PRIx64, rt->zero1);
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pandecode_prop("zero2 = 0x%" PRIx32, rt->zero2);
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pandecode_prop("zero3 = 0x%" PRIx32, rt->zero3);
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}
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pandecode_indent--;
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pandecode_log("},\n");
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}
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pandecode_indent--;
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pandecode_log("};\n");
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if (with_render_targets)
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pandecode_render_target(gpu_va, job_no, fb);
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}
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static void
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@ -1202,7 +1210,7 @@ pandecode_replay_vertex_tiler_postfix_pre(const struct mali_vertex_tiler_postfix
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if (is_bifrost)
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pandecode_replay_scratchpad(p->framebuffer & ~FBD_TYPE, job_no, suffix);
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else if (p->framebuffer & MALI_MFBD)
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pandecode_replay_mfbd_bfr((u64) ((uintptr_t) p->framebuffer) & FBD_MASK, job_no);
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pandecode_replay_mfbd_bfr((u64) ((uintptr_t) p->framebuffer) & FBD_MASK, job_no, false);
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else
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pandecode_replay_sfbd((u64) (uintptr_t) p->framebuffer, job_no);
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@ -1937,7 +1945,7 @@ pandecode_replay_fragment_job(const struct pandecode_mapped_memory *mem,
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* trace, which appears impossible.
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*/
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pandecode_replay_mfbd_bfr(s->framebuffer & FBD_MASK, job_no);
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pandecode_replay_mfbd_bfr(s->framebuffer & FBD_MASK, job_no, true);
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fbd_dumped = true;
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}
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