Commit graph

206239 commits

Author SHA1 Message Date
Lionel Landwerlin
b24a4c3cd0 anv: temporarily reenable scratch page by default
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A couple of games are showing pagefaults :
  - https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15450
  - https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15474

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 04bfdb287b ("anv: Disable scratch page by default on Xe KMD")
Reviewed-by: Calder Young <calder.young@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41596>
2026-05-15 19:47:12 +00:00
Caio Oliveira
0281eb2e98 nir/instr_set: Fix multi-slot intrinsic index equality
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nir_intrinsic_index_size() expects a nir_intrinsic_index_flag, not
the position in the intrinsic's index list.  This could cause
part of a multi-slot index to be ignored.

Fixes: b2bc57551a ("nir/instr_set: allow cse with fp_math_ctrl mismatches for intrinsics")
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41593>
2026-05-15 18:13:15 +00:00
Valentine Burley
84645c9d8f venus/ci: Skip more even more robustness and synchronization2 tests on ANV
These can cause hangs on CML:
https://gitlab.freedesktop.org/Valentine/mesa/-/jobs/99906137
https://gitlab.freedesktop.org/Valentine/mesa/-/jobs/99901358

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41541>
2026-05-15 17:38:59 +00:00
Valentine Burley
6cf5da8dd3 ci/deqp: Rewrite headless Android WSI patch
Update the headless Android WSI patch to fix intermittent timeout issues. It
now uses an ImageReader listener to actively drain and instantly release frames
from the buffer queue. This acts as a "null compositor" that prevents buffer
starvation while maintaining stable GPU backpressure.

This fixes dEQP-VK.wsi.android.maintenance1.* in newer VKCTS versions and
resolves the race conditions that caused occasional teardown crashes.

Also rebase build-deqp-gl_Build-Don-t-build-Vulkan-utilities-for-GL-builds.patch
on top of the updated WSI patch.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41541>
2026-05-15 17:38:59 +00:00
Caio Oliveira
f7fed3bdf8 intel/perf: Use intel_perf_context as ralloc parent of sample buffers
Prefer the context instead of the config structure.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41591>
2026-05-15 16:32:49 +00:00
Yiwei Zhang
e6734ed39e venus: fix a renderer side queue timeline bound race
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Timeline assignment has been asynchronous upon vkGetDeviceQueue2.
However, fence submission via vq can get ahead of it for things like
ring and vq synchronization. This change fixes vkGetDeviceQueue2 to be
synchronous instead, which is fine since it's off the critical path.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41582>
2026-05-15 16:11:29 +00:00
Georg Lehmann
0be2d71ad1 nir/opt_uniform_subgroup: preserve divergence during optimization
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nir_def_init sets divergent = true, this means for something like
reduce(reduce(convergent)) we previously only optimized the inner
reduce.

No fossil changes at the moment, but I hit this when trying to
optimize shared memory to subgroup operations.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41542>
2026-05-15 08:42:18 +00:00
Benjamin Cheng
e44cb38c3b ac/parse_ib: Add parsing for variable slice mode
Fixes: d9ba641e28 ("ac: Add variable slice mode interface")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41140>
2026-05-15 08:12:11 +00:00
Samuel Pitoiset
dc398afb27 nir: fix shuffling local IDs for quad derivatives with larger workgroup sizes
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This was fundamentally broken for workgroup sizes >= 8x8.

This fixes new VKCTS coverage
dEQP-VK.glsl.texture_functions.texture.*_compute, and also few tests
from the vkd3d-proton testsuite (note that quad derivatives is
currently disabled for < GFX12).

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41483>
2026-05-15 07:04:32 +00:00
Samuel Pitoiset
d1fd6b1ef1 radv: fix copying acceleration structure with DAC
Because buffer is NULL.

Fixes: a97c889a7b ("radv: implement VK_KHR_device_address_commands")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41505>
2026-05-15 06:37:54 +00:00
Samuel Pitoiset
116a0eacd1 radv: destroy the gang CS when a cmdbuf is reset
Otherwise, if a cmdbuf is recycled it would assume that a gang CS is
always is present even if it's not used. That means, it would emit
useless synchronization and use gang submit with a mostly empty gang
CS for nothing.

It seems better to create the gang CS on-demand only when it's strictly
required (for compute fallback with SDMA and task shaders). Even for
heavy uses of task shaders, that shouldn't hurt.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41543>
2026-05-15 06:11:16 +00:00
Samuel Pitoiset
937bd7e040 radv: clear the follower gang semaphore when a cmdbuf is reset
Not resetting shouldn't cause any issues but better to be conservative.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41543>
2026-05-15 06:11:16 +00:00
Caio Oliveira
d3cfe04b3d intel: Move cmat configurations to anv_physical_device
Some cooperative properties are defined by the driver itself and
are not a property of the HW.  In particular whether the scope is
subgroup or workgroup is not directly related to the HW.

It could make sense encode the DPAS combinations into intel_device_info
but we are not using all possible combinations yet and wouldn't be very
useful in practice.

The new scheme was based on radv and will set us up for also filling
the flexible dimensions properties too.

Note: this also fixes a subtle issue where ARL was incorrectly inheriting
the PRE_XEHP configurations which included FLOAT16/FLOAT16/FLOAT16/FLOAT16
which it does not support.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41564>
2026-05-15 05:38:49 +00:00
Caio Oliveira
088eeb2d81 anv: When using INTEL_LOWER_DPAS disable BFloat16 cmat configurations
Those configurates are not currently supported by the
emulation pass brw_lower_dpas.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41564>
2026-05-15 05:38:49 +00:00
Caio Oliveira
6bcf70bd85 anv: Remove saturating cmat configurations when INTEL_LOWER_DPAS=1
Since we don't have any DPAS-based implementation of those, it is odd to
support them in the emulation mode that is only enabled with the debug
flag INTEL_LOWER_DPAS nowadays.  Remove it.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41564>
2026-05-15 05:38:48 +00:00
Dave Airlie
a8e567c0b7 nvk: enable subgroupQuadOperationsInAllStages
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This passes CTS and all the GL CTS tests.

Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41589>
2026-05-15 00:43:00 +00:00
Marek Olšák
e966c1bdec nir/opt_varyings: use workgroup divergence to identify convergent mesh outputs
It turns out we do have workgroup divergence, hidden behind
nir_divergence_across_subgroups, if I understand it correctly.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41225>
2026-05-15 00:09:42 +00:00
Marek Olšák
edb60c76e2 nir: generalize nir_vertex_divergence_analysis -> nir_custom_divergence_analysis
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41225>
2026-05-15 00:09:42 +00:00
Dave Airlie
1ab8f1eb00 nak: add more sizes to assert in bindless_image_sparse_load
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Affects
dEQP-VK.sparse_resources.buffer.texel_buffers.sparse_residency.storage_texel_buffer_sparse_read_size_2_10_r64ui_strict

Fixes: 410de4bf69 ("nak: wire up sparse image loads")
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41586>
2026-05-15 08:51:32 +10:00
Marek Olšák
3831935818 nir/opt_move_to_top: add an option to exclude moving at_offset/at_sample loads
This splits the nir_move_to_top_input_loads option into 2 options. The latter
option is mainly for at_offset/at_sample loads. Then it updates most places to
use only the first option.

The rationale is that moving at_sample loads makes Control (game) shaders
worse, as per the code comment.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41167>
2026-05-14 16:48:39 -04:00
Frank Binns
73e7c0d545 pvr/ci: drop two tests from bxs-4-64-{fails,flakes}
These tests were fixed by 68cb76de5d ("pco: Fix encoding of branch to an empty
block").

Fixes: ef860bcaa1 ("pvr/ci: Add dEQP-VK testing for BXS-4-64 on TI AM68 SK")
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41544>
2026-05-14 18:24:54 +00:00
Tanner Van De Walle
f9e7b9568b util/format: add lower-bound assert on format
The generated util_format_description(),
util_format_pack_description(), and
util_format_unpack_description_generic() helpers assert
format < PIPE_FORMAT_COUNT but not format >= 0. MSVC's prefast
static analyzer reports C33010 (UNCHECKED_LOWER_BOUND_FOR_ENUMINDEX)
on the subsequent array subscript, since it cannot prove the
non-negative side of the bound. Extending the existing assert in
the generator silences the warning across all three accessors.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41447>
2026-05-14 17:46:16 +00:00
Tanner Van De Walle
3ef1db42c7 gallium/u_blitter: add lower-bound assert on target
blitter_get_fs_texfetch_col asserts target < PIPE_MAX_TEXTURE_TYPES
but not >= 0. MSVC's prefast static analyzer reports C33010
(UNCHECKED_LOWER_BOUND_FOR_ENUMINDEX) when target is later used as
an array subscript, since it cannot prove the non-negative side of
the bound. Extending the existing assert to both sides silences the
warning and is a real bound check.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41447>
2026-05-14 17:46:16 +00:00
Tanner Van De Walle
427158f784 draw: add lower-bound assert on shader_stage
draw_set_sampler_views asserts shader_stage < DRAW_MAX_SHADER_STAGE
but not >= 0. MSVC's prefast static analyzer reports C33010
(UNCHECKED_LOWER_BOUND_FOR_ENUMINDEX) when shader_stage is
subsequently used as an array subscript, since it cannot prove the
non-negative side of the bound. Extending the existing assert to
both sides silences the warning and is a real bound check.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41447>
2026-05-14 17:46:16 +00:00
Arzaq Naufail Khan
e2cd37e422 spirv: fix resource leak in spirv shader replacement
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39512>
2026-05-14 17:09:28 +00:00
Icenowy Zheng
b45773935d pvr: remove dEQP-VK.pipeline.monolithic.misc.no_rendering from fail list
The fix for this test is merged between the start and the merging of the
Vulkan CTS uprev MR.

Remove it from the fails list because it was already fixed.

Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41571>
2026-05-14 16:34:46 +00:00
Aitor Camacho
12db716fff kk: Fix subgroup failures on M1/2 due to bcsel
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f4812dc1 introduces optimizations that turn ior into bcsel. The MSL
compiler will incorrectly compile the shader internally when bcsel is used
leading to incorrect outputs. This commit adds a workaround that tricks
the MSL compiler into correctly compiling the shader internally.

Reviewed-by: squidbus <squidbus@proton.me>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41548>
2026-05-14 16:14:22 +00:00
Danylo Piliaiev
1323939f63 tu: Don't enable FDM when there is FDM attachment is UNUSED
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41539>
2026-05-14 15:50:37 +00:00
squidbus
0e8fec8d8d kk: Complete VK_EXT_memory_budget
Metal provides device properties for the recommended maximum memory usage and
the current amount of memory used. These can be used to provide an estimate
of heap usage and calculate a budget of memory usage by the application before
performance may degrade.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41523>
2026-05-14 14:43:06 +00:00
Lionel Landwerlin
682dc50776 brw/jay: move sample_mask_in handling to NIR
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41529>
2026-05-14 14:05:06 +00:00
Lionel Landwerlin
df5a6d7b87 brw/jay: move some coarse lowering to NIR
We add a pass to allow testing partially known fs config bits (main
user is DX11 always disabling VRS/coarse).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41529>
2026-05-14 14:05:06 +00:00
Danylo Piliaiev
5529f15f31 tu: Disable concurrent binning by default due to perf regressions
Unfortunately we have to disable concurrent binning by default
because it hurts performance in a number of desktop games without
any case where we know it helps.

There are less vertex fetch resource available in BV compared to BR,
so when binning runs in BV, there are many vertices, and vertices are
attribute heavy - BV has much worse performance than BR, sometimes more
than 50% worse.

Even with worse performance it won't be bad if concurrent binning
actually overlapped with other workload in those cases, but in case of
desktop games - there is almost never a chance for overlap.
However it's impossible to statically find out if binning on BV would
be much slower than on BR, and we also cannot statically predict if
there is enough overlap (if any) to cover for the performance penalty.

Given the above, I don't see a way out but to make concurrent binning
opt in via `tu_allow_concurrent_binning` driconf toggle.

Still allow concurrent binning in CI to catch issues early.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41394>
2026-05-14 14:38:35 +02:00
squidbus
e9d96125e2 kk: Query device for supported sample counts
Instead of hard-coding supported samples, check the Metal device.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41534>
2026-05-14 04:12:26 -07:00
Lionel Landwerlin
ccef88173b anv: add SIMD32 requirement heuristic for Dragon Dogma 2
A few compute shaders are doing BC3 image generation on the device and
then generate incorrect data if running at SIMD16. That data is then
sampled in a vertex shader that generates incorrect geometry.

See https://github.com/ValveSoftware/Proton/issues/7595#issuecomment-4343662131

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41501>
2026-05-14 10:39:25 +00:00
Lionel Landwerlin
dfa7e15f7c brw: simplify VF component packing code
We can determine used components earlier.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41501>
2026-05-14 10:39:25 +00:00
Lionel Landwerlin
8e3084dfe6 anv: add an option to disable allocation over subscription
Usually I'm able to run B580 capture on LNL, but in some cases the
oversubscription on replay would lead to allocation failures.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41501>
2026-05-14 10:39:25 +00:00
Valentine Burley
215f12fa23 ci/deqp: Backport validation error fix
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41574>
2026-05-14 10:04:51 +00:00
Juan A. Suarez Romero
f763ed0ae8 v3d/ci: add OpenCL regressions
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Plus a flake.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41575>
2026-05-14 09:22:35 +00:00
Emma Anholt
76c39acad7 ci: Update VK CTS to 1.4.5.3 with fixes.
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I've pulled in a pile of changes to reduce the overhead (runtime and
memory) when sharding for deqp-runner, along with a bunch of fixes for
KHR_display testing that we recently enabled, plus a few others that
affect our drivers.

The big new set of failures looks like it's from more complete coverage of
blitting between formats.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41243>
2026-05-14 04:22:21 +00:00
Emma Anholt
294bb1449e tu/ci: Drop a750 VKCTS to 50% coverage.
We're regularly hitting 13 minutes of deqp-runner runtime on our jobs,
which is too long.  Once we uprev the CTS, one of them gets to 14 minutes
and triggered the existing job timeout.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41243>
2026-05-14 04:22:21 +00:00
Emma Anholt
32f25cbbb0 lvp/ci: Drop an old skip long since fixed in the CTS.
This was fixed in vulkan-cts-1.3.7

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41243>
2026-05-14 04:22:21 +00:00
Emma Anholt
f24dd0227f panfrost/ci: Skip dEQP-VK.wsi.wayland.swapchain.render.10swapchains on g52.
This has been intermittently timing out in CI, and showed up as a job
failure on 1/3 of the stress runs for the CTS uprev.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41243>
2026-05-14 04:22:21 +00:00
Emma Anholt
aed4818990 ci/panfrost: Drop a set of flakes whose fix had landed.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41243>
2026-05-14 04:22:21 +00:00
David Airlie
6a7a46ac21 nir/coopmat: rename the box split variables.
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When we add workgroup support we have to add inner box splits as well
so name the outer splits correctly.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41500>
2026-05-14 02:15:05 +00:00
David Airlie
6062bcde56 nir/coopmat: move the row/col into a box and add some helpers.
This makes adding workgroup scope easier, this just creates the
split_box and moves things into it and adds some helpers.

This also rewrites some loops from r/c into i which calc r/c

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41500>
2026-05-14 02:15:05 +00:00
David Airlie
eaf6207e06 nir/coopmat: refactor the split vars to clean it up
This just moves to using the split_info to store all the info,
and updating the hash table inside the split function.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41500>
2026-05-14 02:15:04 +00:00
Dave Airlie
510998e493 nak: fix image size for multisample arrays
Fixes KHR-GL45.shader_image_size.*ms*

without padding the last component gets replicated so the array
size gets shifted.

Fixes: 65d836fb26 ("nak: Lower MSAA image load/store/atomic/size")
Reviewed-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41522>
2026-05-14 01:57:40 +00:00
Caio Oliveira
771714a0ce brw/tests: Stop using regions/type for non-null SEND sources in tests
SEND operands don't have regions or types, hardware don't use those
bits except for possibly an old workaround.  So from the perspective
of assembler, we shouldn't need to add them.  For now brw_asm grammar
requires at least a type, so normalize to UD.

This will make easier to swap the parser syntax and code later.

Assisted-by: Pi coding agent (opus-4.7)
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41456>
2026-05-14 01:29:13 +00:00
Caio Oliveira
08d805e03b brw/tests: Stop using regions/type for null in assembler tests
From the perspective of assembler, regions and types for ARF null are
not relevant -- so ignore them.  We still have some validation relying
on the byte-stride of the destination, so keep those for now.

In the long run, if a certain Gfx version HW requires some specific
matching, the encoder (or the parser) should take care of it.

This change will make easier to swap the parser syntax and code later.

Assisted-by: Pi coding agent (opus-4.7)
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41456>
2026-05-14 01:29:13 +00:00
Caio Oliveira
7a12758b8c brw/tests: Remove redundant parser test
Same test a couple of lines above.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41456>
2026-05-14 01:29:12 +00:00