mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-15 14:18:04 +02:00
brw/tests: Stop using regions/type for non-null SEND sources in tests
SEND operands don't have regions or types, hardware don't use those bits except for possibly an old workaround. So from the perspective of assembler, we shouldn't need to add them. For now brw_asm grammar requires at least a type, so normalize to UD. This will make easier to swap the parser syntax and code later. Assisted-by: Pi coding agent (opus-4.7) Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41456>
This commit is contained in:
parent
08d805e03b
commit
771714a0ce
4 changed files with 3861 additions and 3861 deletions
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
|
|
@ -1,264 +1,264 @@
|
|||
sendc(8) nullUD g124<0,1,0>F 0x88031400
|
||||
sendc(8) nullUD g124UD 0x88031400
|
||||
render MsgDesc: RT write SIMD8 LastRT Surface = 0 mlen 4 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g120<0,1,0>F 0x90031000
|
||||
sendc(16) nullUD g120UD 0x90031000
|
||||
render MsgDesc: RT write SIMD16 LastRT Surface = 0 mlen 8 rlen 0 { align1 1H EOT };
|
||||
sendc(16) nullUD g114<0,1,0>F 0x82031100
|
||||
sendc(16) nullUD g114UD 0x82031100
|
||||
render MsgDesc: RT write SIMD16/RepData LastRT Surface = 0 mlen 1 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g124<8,8,1>UD 0x880ba001
|
||||
sendc(8) nullUD g124UD 0x880ba001
|
||||
sampler MsgDesc: ld_lz SIMD8 Surface = 1 Sampler = 0 mlen 4 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g121<8,8,1>UD 0x8e0da001
|
||||
sendc(16) nullUD g121UD 0x8e0da001
|
||||
sampler MsgDesc: ld_lz SIMD16 Surface = 1 Sampler = 0 mlen 7 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g125<8,8,1>UD 0x860a0001
|
||||
sendc(8) nullUD g125UD 0x860a0001
|
||||
sampler MsgDesc: sample SIMD8 Surface = 1 Sampler = 0 mlen 3 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g123<8,8,1>UD 0x8a0c0001
|
||||
sendc(16) nullUD g123UD 0x8a0c0001
|
||||
sampler MsgDesc: sample SIMD16 Surface = 1 Sampler = 0 mlen 5 rlen 0 { align1 1H EOT };
|
||||
(+f0.1) sendc(8) nullUD g124<0,1,0>F 0x88031400
|
||||
(+f0.1) sendc(8) nullUD g124UD 0x88031400
|
||||
render MsgDesc: RT write SIMD8 LastRT Surface = 0 mlen 4 rlen 0 { align1 1Q EOT };
|
||||
sendc(8) nullUD g122<8,8,1>UD 0x8c0be001
|
||||
sendc(8) nullUD g122UD 0x8c0be001
|
||||
sampler MsgDesc: ld2dms SIMD8 Surface = 1 Sampler = 0 mlen 6 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g117<8,8,1>UD 0x960de001
|
||||
sendc(16) nullUD g117UD 0x960de001
|
||||
sampler MsgDesc: ld2dms SIMD16 Surface = 1 Sampler = 0 mlen 11 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g124<8,8,1>UD 0x880a0001
|
||||
sendc(8) nullUD g124UD 0x880a0001
|
||||
sampler MsgDesc: sample SIMD8 Surface = 1 Sampler = 0 mlen 4 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g121<8,8,1>UD 0x8e0c0001
|
||||
sendc(16) nullUD g121UD 0x8e0c0001
|
||||
sampler MsgDesc: sample SIMD16 Surface = 1 Sampler = 0 mlen 7 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g118<8,8,1>UD 0x940a4001
|
||||
sendc(8) nullUD g118UD 0x940a4001
|
||||
sampler MsgDesc: sample_d SIMD8 Surface = 1 Sampler = 0 mlen 10 rlen 0 { align1 1Q EOT };
|
||||
sendc(8) nullUD g125<8,8,1>UD a0<0,1,0>UD 0x80000200
|
||||
sendc(8) nullUD g125UD a0<0,1,0>UD 0x80000200
|
||||
sampler MsgDesc: indirect { align1 1Q EOT };
|
||||
sendc(8) nullUD g124<8,8,1>UD 0x880a4001
|
||||
sendc(8) nullUD g124UD 0x880a4001
|
||||
sampler MsgDesc: sample_d SIMD8 Surface = 1 Sampler = 0 mlen 4 rlen 0 { align1 1Q EOT };
|
||||
sendc(8) nullUD g121<8,8,1>UD 0x8e0bc001
|
||||
sendc(8) nullUD g121UD 0x8e0bc001
|
||||
sampler MsgDesc: ld2dms_w SIMD8 Surface = 1 Sampler = 0 mlen 7 rlen 0 { align1 1Q EOT };
|
||||
sendc(8) nullUD g121<8,8,1>UD 0x8e0a4001
|
||||
sendc(8) nullUD g121UD 0x8e0a4001
|
||||
sampler MsgDesc: sample_d SIMD8 Surface = 1 Sampler = 0 mlen 7 rlen 0 { align1 1Q EOT };
|
||||
sendc(8) nullUD g125<8,8,1>UD 0x860a2001
|
||||
sendc(8) nullUD g125UD 0x860a2001
|
||||
sampler MsgDesc: sample_l SIMD8 Surface = 1 Sampler = 0 mlen 3 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g123<8,8,1>UD 0x8a0c2001
|
||||
sendc(16) nullUD g123UD 0x8a0c2001
|
||||
sampler MsgDesc: sample_l SIMD16 Surface = 1 Sampler = 0 mlen 5 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g122<0,1,0>F 0x8c0b1401
|
||||
sendc(8) nullUD g122UD 0x8c0b1401
|
||||
render MsgDesc: RT write SIMD8 LastRT Surface = 1 mlen 6 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g118<0,1,0>F 0x940b1001
|
||||
sendc(16) nullUD g118UD 0x940b1001
|
||||
render MsgDesc: RT write SIMD16 LastRT Surface = 1 mlen 10 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g13<0,1,0>F 0x0e0b0401
|
||||
sendc(8) nullUD g13UD 0x0e0b0401
|
||||
render MsgDesc: RT write SIMD8 Surface = 1 mlen 7 rlen 0 { align1 1Q };
|
||||
sendc(8) nullUD g121<0,1,0>F 0x8e0b1402
|
||||
sendc(8) nullUD g121UD 0x8e0b1402
|
||||
render MsgDesc: RT write SIMD8 LastRT Surface = 2 mlen 7 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g7<0,1,0>F 0x180b0001
|
||||
sendc(16) nullUD g7UD 0x180b0001
|
||||
render MsgDesc: RT write SIMD16 Surface = 1 mlen 12 rlen 0 { align1 1H };
|
||||
sendc(16) nullUD g116<0,1,0>F 0x980b1002
|
||||
sendc(16) nullUD g116UD 0x980b1002
|
||||
render MsgDesc: RT write SIMD16 LastRT Surface = 2 mlen 12 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g123<8,8,1>UD 0x8a0a1001
|
||||
sendc(8) nullUD g123UD 0x8a0a1001
|
||||
sampler MsgDesc: sample_b SIMD8 Surface = 1 Sampler = 0 mlen 5 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g119<8,8,1>UD 0x920c1001
|
||||
sendc(16) nullUD g119UD 0x920c1001
|
||||
sampler MsgDesc: sample_b SIMD16 Surface = 1 Sampler = 0 mlen 9 rlen 0 { align1 1H EOT };
|
||||
sendc(1) g2<1>UW g2<0,1,0>UW 0x0209c000
|
||||
sendc(1) g2UD g2UD 0x0209c000
|
||||
hdc0 MsgDesc: ( DC mfence, 0, 0) mlen 1 rlen 0 { align1 WE_all 1N };
|
||||
sendc(8) nullUD g120<8,8,1>UD 0x900b4001
|
||||
sendc(8) nullUD g120UD 0x900b4001
|
||||
sampler MsgDesc: sample_d_c SIMD8 Surface = 1 Sampler = 0 mlen 8 rlen 0 { align1 1Q EOT };
|
||||
sendc(8) nullUD g123<8,8,1>UD 0x8a0b4001
|
||||
sendc(8) nullUD g123UD 0x8a0b4001
|
||||
sampler MsgDesc: sample_d_c SIMD8 Surface = 1 Sampler = 0 mlen 5 rlen 0 { align1 1Q EOT };
|
||||
sendc(8) g6<1>F g2<0,1,0>UD 0x044b4100
|
||||
sendc(8) g6UD g2UD 0x044b4100
|
||||
render MsgDesc: RT read MsgCtrl = 0x1 Surface = 0 mlen 2 rlen 4 { align1 1Q };
|
||||
sendc(16) g9<1>F g27<0,1,0>UD 0x048b4000
|
||||
sendc(16) g9UD g27UD 0x048b4000
|
||||
render MsgDesc: RT read MsgCtrl = 0x0 Surface = 0 mlen 2 rlen 8 { align1 1H };
|
||||
sendc(8) nullUD g124<8,8,1>UD 0x880a3001
|
||||
sendc(8) nullUD g124UD 0x880a3001
|
||||
sampler MsgDesc: sample_c SIMD8 Surface = 1 Sampler = 0 mlen 4 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g121<8,8,1>UD 0x8e0c3001
|
||||
sendc(16) nullUD g121UD 0x8e0c3001
|
||||
sampler MsgDesc: sample_c SIMD16 Surface = 1 Sampler = 0 mlen 7 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g123<0,1,0>F 0x8a031400
|
||||
sendc(8) nullUD g123UD 0x8a031400
|
||||
render MsgDesc: RT write SIMD8 LastRT Surface = 0 mlen 5 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g118<0,1,0>F 0x94031000
|
||||
sendc(16) nullUD g118UD 0x94031000
|
||||
render MsgDesc: RT write SIMD16 LastRT Surface = 0 mlen 10 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g5<0,1,0>F 0x0c0b0400
|
||||
sendc(8) nullUD g5UD 0x0c0b0400
|
||||
render MsgDesc: RT write SIMD8 Surface = 0 mlen 6 rlen 0 { align1 1Q };
|
||||
sendc(8) nullUD g5<0,1,0>F 0x0c0b0401
|
||||
sendc(8) nullUD g5UD 0x0c0b0401
|
||||
render MsgDesc: RT write SIMD8 Surface = 1 mlen 6 rlen 0 { align1 1Q };
|
||||
sendc(8) nullUD g5<0,1,0>F 0x0c0b0402
|
||||
sendc(8) nullUD g5UD 0x0c0b0402
|
||||
render MsgDesc: RT write SIMD8 Surface = 2 mlen 6 rlen 0 { align1 1Q };
|
||||
sendc(8) nullUD g5<0,1,0>F 0x0c0b0403
|
||||
sendc(8) nullUD g5UD 0x0c0b0403
|
||||
render MsgDesc: RT write SIMD8 Surface = 3 mlen 6 rlen 0 { align1 1Q };
|
||||
sendc(8) nullUD g5<0,1,0>F 0x0c0b0404
|
||||
sendc(8) nullUD g5UD 0x0c0b0404
|
||||
render MsgDesc: RT write SIMD8 Surface = 4 mlen 6 rlen 0 { align1 1Q };
|
||||
sendc(8) nullUD g122<0,1,0>F 0x8c0b1405
|
||||
sendc(8) nullUD g122UD 0x8c0b1405
|
||||
render MsgDesc: RT write SIMD8 LastRT Surface = 5 mlen 6 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g5<0,1,0>F 0x140b0000
|
||||
sendc(16) nullUD g5UD 0x140b0000
|
||||
render MsgDesc: RT write SIMD16 Surface = 0 mlen 10 rlen 0 { align1 1H };
|
||||
sendc(16) nullUD g5<0,1,0>F 0x140b0001
|
||||
sendc(16) nullUD g5UD 0x140b0001
|
||||
render MsgDesc: RT write SIMD16 Surface = 1 mlen 10 rlen 0 { align1 1H };
|
||||
sendc(16) nullUD g5<0,1,0>F 0x140b0002
|
||||
sendc(16) nullUD g5UD 0x140b0002
|
||||
render MsgDesc: RT write SIMD16 Surface = 2 mlen 10 rlen 0 { align1 1H };
|
||||
sendc(16) nullUD g5<0,1,0>F 0x140b0003
|
||||
sendc(16) nullUD g5UD 0x140b0003
|
||||
render MsgDesc: RT write SIMD16 Surface = 3 mlen 10 rlen 0 { align1 1H };
|
||||
sendc(16) nullUD g5<0,1,0>F 0x140b0004
|
||||
sendc(16) nullUD g5UD 0x140b0004
|
||||
render MsgDesc: RT write SIMD16 Surface = 4 mlen 10 rlen 0 { align1 1H };
|
||||
sendc(16) nullUD g118<0,1,0>F 0x940b1005
|
||||
sendc(16) nullUD g118UD 0x940b1005
|
||||
render MsgDesc: RT write SIMD16 LastRT Surface = 5 mlen 10 rlen 0 { align1 1H EOT };
|
||||
sendc(8) g6<1>F g6<0,1,0>UD 0x044b4101
|
||||
sendc(8) g6UD g6UD 0x044b4101
|
||||
render MsgDesc: RT read MsgCtrl = 0x1 Surface = 1 mlen 2 rlen 4 { align1 1Q };
|
||||
sendc(8) g10<1>F g10<0,1,0>UD 0x044b4102
|
||||
sendc(8) g10UD g10UD 0x044b4102
|
||||
render MsgDesc: RT read MsgCtrl = 0x1 Surface = 2 mlen 2 rlen 4 { align1 1Q };
|
||||
sendc(8) g14<1>F g14<0,1,0>UD 0x044b4103
|
||||
sendc(8) g14UD g14UD 0x044b4103
|
||||
render MsgDesc: RT read MsgCtrl = 0x1 Surface = 3 mlen 2 rlen 4 { align1 1Q };
|
||||
sendc(8) nullUD g122<0,1,0>F 0x8c0b1403
|
||||
sendc(8) nullUD g122UD 0x8c0b1403
|
||||
render MsgDesc: RT write SIMD8 LastRT Surface = 3 mlen 6 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) g32<1>F g14<0,1,0>UD 0x048b4001
|
||||
sendc(16) g32UD g14UD 0x048b4001
|
||||
render MsgDesc: RT read MsgCtrl = 0x0 Surface = 1 mlen 2 rlen 8 { align1 1H };
|
||||
sendc(16) g40<1>F g16<0,1,0>UD 0x048b4002
|
||||
sendc(16) g40UD g16UD 0x048b4002
|
||||
render MsgDesc: RT read MsgCtrl = 0x0 Surface = 2 mlen 2 rlen 8 { align1 1H };
|
||||
sendc(16) g48<1>F g18<0,1,0>UD 0x048b4003
|
||||
sendc(16) g48UD g18UD 0x048b4003
|
||||
render MsgDesc: RT read MsgCtrl = 0x0 Surface = 3 mlen 2 rlen 8 { align1 1H };
|
||||
sendc(16) nullUD g118<0,1,0>F 0x940b1003
|
||||
sendc(16) nullUD g118UD 0x940b1003
|
||||
render MsgDesc: RT write SIMD16 LastRT Surface = 3 mlen 10 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g124<8,8,1>UD 0x880a1001
|
||||
sendc(8) nullUD g124UD 0x880a1001
|
||||
sampler MsgDesc: sample_b SIMD8 Surface = 1 Sampler = 0 mlen 4 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g121<8,8,1>UD 0x8e0c1001
|
||||
sendc(16) nullUD g121UD 0x8e0c1001
|
||||
sampler MsgDesc: sample_b SIMD16 Surface = 1 Sampler = 0 mlen 7 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g125<8,8,1>UD 0x860ba001
|
||||
sendc(8) nullUD g125UD 0x860ba001
|
||||
sampler MsgDesc: ld_lz SIMD8 Surface = 1 Sampler = 0 mlen 3 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g123<8,8,1>UD 0x8a0da001
|
||||
sendc(16) nullUD g123UD 0x8a0da001
|
||||
sampler MsgDesc: ld_lz SIMD16 Surface = 1 Sampler = 0 mlen 5 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g126<8,8,1>UD 0x840a0001
|
||||
sendc(8) nullUD g126UD 0x840a0001
|
||||
sampler MsgDesc: sample SIMD8 Surface = 1 Sampler = 0 mlen 2 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g125<8,8,1>UD 0x860c0001
|
||||
sendc(16) nullUD g125UD 0x860c0001
|
||||
sampler MsgDesc: sample SIMD16 Surface = 1 Sampler = 0 mlen 3 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g124<8,8,1>UD 0x880a2001
|
||||
sendc(8) nullUD g124UD 0x880a2001
|
||||
sampler MsgDesc: sample_l SIMD8 Surface = 1 Sampler = 0 mlen 4 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g121<8,8,1>UD 0x8e0c2001
|
||||
sendc(16) nullUD g121UD 0x8e0c2001
|
||||
sampler MsgDesc: sample_l SIMD16 Surface = 1 Sampler = 0 mlen 7 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g123<8,8,1>UD 0x8a0be001
|
||||
sendc(8) nullUD g123UD 0x8a0be001
|
||||
sampler MsgDesc: ld2dms SIMD8 Surface = 1 Sampler = 0 mlen 5 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g119<8,8,1>UD 0x920de001
|
||||
sendc(16) nullUD g119UD 0x920de001
|
||||
sampler MsgDesc: ld2dms SIMD16 Surface = 1 Sampler = 0 mlen 9 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g120<8,8,1>UD 0x900a4001
|
||||
sendc(8) nullUD g120UD 0x900a4001
|
||||
sampler MsgDesc: sample_d SIMD8 Surface = 1 Sampler = 0 mlen 8 rlen 0 { align1 1Q EOT };
|
||||
sendc(8) nullUD g123<8,8,1>UD 0x8a0a2001
|
||||
sendc(8) nullUD g123UD 0x8a0a2001
|
||||
sampler MsgDesc: sample_l SIMD8 Surface = 1 Sampler = 0 mlen 5 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g119<8,8,1>UD 0x920c2001
|
||||
sendc(16) nullUD g119UD 0x920c2001
|
||||
sampler MsgDesc: sample_l SIMD16 Surface = 1 Sampler = 0 mlen 9 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g125<8,8,1>UD 0x860a0304
|
||||
sendc(8) nullUD g125UD 0x860a0304
|
||||
sampler MsgDesc: sample SIMD8 Surface = 4 Sampler = 3 mlen 3 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g123<8,8,1>UD 0x8a0c0304
|
||||
sendc(16) nullUD g123UD 0x8a0c0304
|
||||
sampler MsgDesc: sample SIMD16 Surface = 4 Sampler = 3 mlen 5 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g122<8,8,1>UD 0x8c0a1001
|
||||
sendc(8) nullUD g122UD 0x8c0a1001
|
||||
sampler MsgDesc: sample_b SIMD8 Surface = 1 Sampler = 0 mlen 6 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g117<8,8,1>UD 0x960c1001
|
||||
sendc(16) nullUD g117UD 0x960c1001
|
||||
sampler MsgDesc: sample_b SIMD16 Surface = 1 Sampler = 0 mlen 11 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g125<8,8,1>UD 0x860a3001
|
||||
sendc(8) nullUD g125UD 0x860a3001
|
||||
sampler MsgDesc: sample_c SIMD8 Surface = 1 Sampler = 0 mlen 3 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g123<8,8,1>UD 0x8a0c3001
|
||||
sendc(16) nullUD g123UD 0x8a0c3001
|
||||
sampler MsgDesc: sample_c SIMD16 Surface = 1 Sampler = 0 mlen 5 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g122<0,1,0>F 0x8c0b1402
|
||||
sendc(8) nullUD g122UD 0x8c0b1402
|
||||
render MsgDesc: RT write SIMD8 LastRT Surface = 2 mlen 6 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g118<0,1,0>F 0x940b1002
|
||||
sendc(16) nullUD g118UD 0x940b1002
|
||||
render MsgDesc: RT write SIMD16 LastRT Surface = 2 mlen 10 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g124<8,8,1>UD 0x880a6001
|
||||
sendc(8) nullUD g124UD 0x880a6001
|
||||
sampler MsgDesc: sample_l_c SIMD8 Surface = 1 Sampler = 0 mlen 4 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g121<8,8,1>UD 0x8e0c6001
|
||||
sendc(16) nullUD g121UD 0x8e0c6001
|
||||
sampler MsgDesc: sample_l_c SIMD16 Surface = 1 Sampler = 0 mlen 7 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g123<8,8,1>UD 0x8a0a5001
|
||||
sendc(8) nullUD g123UD 0x8a0a5001
|
||||
sampler MsgDesc: sample_b_c SIMD8 Surface = 1 Sampler = 0 mlen 5 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g119<8,8,1>UD 0x920c5001
|
||||
sendc(16) nullUD g119UD 0x920c5001
|
||||
sampler MsgDesc: sample_b_c SIMD16 Surface = 1 Sampler = 0 mlen 9 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g122<8,8,1>UD 0x8c0a2001
|
||||
sendc(8) nullUD g122UD 0x8c0a2001
|
||||
sampler MsgDesc: sample_l SIMD8 Surface = 1 Sampler = 0 mlen 6 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g117<8,8,1>UD 0x960c2001
|
||||
sendc(16) nullUD g117UD 0x960c2001
|
||||
sampler MsgDesc: sample_l SIMD16 Surface = 1 Sampler = 0 mlen 11 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g122<8,8,1>UD 0x8c0bc001
|
||||
sendc(8) nullUD g122UD 0x8c0bc001
|
||||
sampler MsgDesc: ld2dms_w SIMD8 Surface = 1 Sampler = 0 mlen 6 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g117<8,8,1>UD 0x960dc001
|
||||
sendc(16) nullUD g117UD 0x960dc001
|
||||
sampler MsgDesc: ld2dms_w SIMD16 Surface = 1 Sampler = 0 mlen 11 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g122<0,1,0>F 0x8c0b1400
|
||||
sendc(8) nullUD g122UD 0x8c0b1400
|
||||
render MsgDesc: RT write SIMD8 LastRT Surface = 0 mlen 6 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g118<0,1,0>F 0x940b1000
|
||||
sendc(16) nullUD g118UD 0x940b1000
|
||||
render MsgDesc: RT write SIMD16 LastRT Surface = 0 mlen 10 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g124<8,8,1>UD 0x880a7001
|
||||
sendc(8) nullUD g124UD 0x880a7001
|
||||
sampler MsgDesc: ld SIMD8 Surface = 1 Sampler = 0 mlen 4 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g121<8,8,1>UD 0x8e0c7001
|
||||
sendc(16) nullUD g121UD 0x8e0c7001
|
||||
sampler MsgDesc: ld SIMD16 Surface = 1 Sampler = 0 mlen 7 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g118<0,1,0>F 0x940b1200
|
||||
sendc(8) nullUD g118UD 0x940b1200
|
||||
render MsgDesc: RT write SIMD8/DualSrcLow LastRT Surface = 0 mlen 10 rlen 0 { align1 1Q EOT };
|
||||
sendc(8) nullUD g3<0,1,0>F 0x140b1200
|
||||
sendc(8) nullUD g3UD 0x140b1200
|
||||
render MsgDesc: RT write SIMD8/DualSrcLow LastRT Surface = 0 mlen 10 rlen 0 { align1 1Q };
|
||||
sendc(8) nullUD g118<0,1,0>F 0x940b1300
|
||||
sendc(8) nullUD g118UD 0x940b1300
|
||||
render MsgDesc: RT write SIMD8/DualSrcHigh LastRT Surface = 0 mlen 10 rlen 0 { align1 2Q EOT };
|
||||
sendc(8) nullUD g123<8,8,1>UD 0x8a0a0001
|
||||
sendc(8) nullUD g123UD 0x8a0a0001
|
||||
sampler MsgDesc: sample SIMD8 Surface = 1 Sampler = 0 mlen 5 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g119<8,8,1>UD 0x920c0001
|
||||
sendc(16) nullUD g119UD 0x920c0001
|
||||
sampler MsgDesc: sample SIMD16 Surface = 1 Sampler = 0 mlen 9 rlen 0 { align1 1H EOT };
|
||||
sendc(16) g11<1>F g37<0,1,0>UD 0x048b6000
|
||||
sendc(16) g11UD g37UD 0x048b6000
|
||||
render MsgDesc: RT read MsgCtrl = 0x32 Surface = 0 mlen 2 rlen 8 { align1 1H };
|
||||
sendc(8) nullUD g23<0,1,0>F 0x0c0b0405
|
||||
sendc(8) nullUD g23UD 0x0c0b0405
|
||||
render MsgDesc: RT write SIMD8 Surface = 5 mlen 6 rlen 0 { align1 1Q };
|
||||
sendc(8) nullUD g29<0,1,0>F 0x0c0b0406
|
||||
sendc(8) nullUD g29UD 0x0c0b0406
|
||||
render MsgDesc: RT write SIMD8 Surface = 6 mlen 6 rlen 0 { align1 1Q };
|
||||
sendc(8) nullUD g122<0,1,0>F 0x8c0b1407
|
||||
sendc(8) nullUD g122UD 0x8c0b1407
|
||||
render MsgDesc: RT write SIMD8 LastRT Surface = 7 mlen 6 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g57<0,1,0>F 0x140b0005
|
||||
sendc(16) nullUD g57UD 0x140b0005
|
||||
render MsgDesc: RT write SIMD16 Surface = 5 mlen 10 rlen 0 { align1 1H };
|
||||
sendc(16) nullUD g67<0,1,0>F 0x140b0006
|
||||
sendc(16) nullUD g67UD 0x140b0006
|
||||
render MsgDesc: RT write SIMD16 Surface = 6 mlen 10 rlen 0 { align1 1H };
|
||||
sendc(16) nullUD g118<0,1,0>F 0x940b1007
|
||||
sendc(16) nullUD g118UD 0x940b1007
|
||||
render MsgDesc: RT write SIMD16 LastRT Surface = 7 mlen 10 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g125<8,8,1>UD 0x860a1001
|
||||
sendc(8) nullUD g125UD 0x860a1001
|
||||
sampler MsgDesc: sample_b SIMD8 Surface = 1 Sampler = 0 mlen 3 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g123<8,8,1>UD 0x8a0c1001
|
||||
sendc(16) nullUD g123UD 0x8a0c1001
|
||||
sampler MsgDesc: sample_b SIMD16 Surface = 1 Sampler = 0 mlen 5 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g10<0,1,0>F 0x0e0b0400
|
||||
sendc(8) nullUD g10UD 0x0e0b0400
|
||||
render MsgDesc: RT write SIMD8 Surface = 0 mlen 7 rlen 0 { align1 1Q };
|
||||
sendc(8) nullUD g121<0,1,0>F 0x8e0b1401
|
||||
sendc(8) nullUD g121UD 0x8e0b1401
|
||||
render MsgDesc: RT write SIMD8 LastRT Surface = 1 mlen 7 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g2<0,1,0>F 0x160b0000
|
||||
sendc(16) nullUD g2UD 0x160b0000
|
||||
render MsgDesc: RT write SIMD16 Surface = 0 mlen 11 rlen 0 { align1 1H };
|
||||
sendc(16) nullUD g117<0,1,0>F 0x960b1001
|
||||
sendc(16) nullUD g117UD 0x960b1001
|
||||
render MsgDesc: RT write SIMD16 LastRT Surface = 1 mlen 11 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g122<0,1,0>F 0x8c0b1404
|
||||
sendc(8) nullUD g122UD 0x8c0b1404
|
||||
render MsgDesc: RT write SIMD8 LastRT Surface = 4 mlen 6 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g118<0,1,0>F 0x940b1004
|
||||
sendc(16) nullUD g118UD 0x940b1004
|
||||
render MsgDesc: RT write SIMD16 LastRT Surface = 4 mlen 10 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g122<0,1,0>F 0x8c0b1406
|
||||
sendc(8) nullUD g122UD 0x8c0b1406
|
||||
render MsgDesc: RT write SIMD8 LastRT Surface = 6 mlen 6 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g118<0,1,0>F 0x940b1006
|
||||
sendc(16) nullUD g118UD 0x940b1006
|
||||
render MsgDesc: RT write SIMD16 LastRT Surface = 6 mlen 10 rlen 0 { align1 1H EOT };
|
||||
sendc(16) nullUD g119<0,1,0>F 0x92031000
|
||||
sendc(16) nullUD g119UD 0x92031000
|
||||
render MsgDesc: RT write SIMD16 LastRT Surface = 0 mlen 9 rlen 0 { align1 1H EOT };
|
||||
sendc(16) nullUD g116<0,1,0>F 0x980b1001
|
||||
sendc(16) nullUD g116UD 0x980b1001
|
||||
render MsgDesc: RT write SIMD16 LastRT Surface = 1 mlen 12 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g123<8,8,1>UD 0x8a0a6001
|
||||
sendc(8) nullUD g123UD 0x8a0a6001
|
||||
sampler MsgDesc: sample_l_c SIMD8 Surface = 1 Sampler = 0 mlen 5 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g119<8,8,1>UD 0x920c6001
|
||||
sendc(16) nullUD g119UD 0x920c6001
|
||||
sampler MsgDesc: sample_l_c SIMD16 Surface = 1 Sampler = 0 mlen 9 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g125<8,8,1>UD 0x860a0102
|
||||
sendc(8) nullUD g125UD 0x860a0102
|
||||
sampler MsgDesc: sample SIMD8 Surface = 2 Sampler = 1 mlen 3 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g123<8,8,1>UD 0x8a0c0102
|
||||
sendc(16) nullUD g123UD 0x8a0c0102
|
||||
sampler MsgDesc: sample SIMD16 Surface = 2 Sampler = 1 mlen 5 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g124<8,8,1>UD 0x880a5001
|
||||
sendc(8) nullUD g124UD 0x880a5001
|
||||
sampler MsgDesc: sample_b_c SIMD8 Surface = 1 Sampler = 0 mlen 4 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g121<8,8,1>UD 0x8e0c5001
|
||||
sendc(16) nullUD g121UD 0x8e0c5001
|
||||
sampler MsgDesc: sample_b_c SIMD16 Surface = 1 Sampler = 0 mlen 7 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g123<8,8,1>UD 0x8a0a4001
|
||||
sendc(8) nullUD g123UD 0x8a0a4001
|
||||
sampler MsgDesc: sample_d SIMD8 Surface = 1 Sampler = 0 mlen 5 rlen 0 { align1 1Q EOT };
|
||||
sendc(8) nullUD g123<8,8,1>UD 0x8a0a3001
|
||||
sendc(8) nullUD g123UD 0x8a0a3001
|
||||
sampler MsgDesc: sample_c SIMD8 Surface = 1 Sampler = 0 mlen 5 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g119<8,8,1>UD 0x920c3001
|
||||
sendc(16) nullUD g119UD 0x920c3001
|
||||
sampler MsgDesc: sample_c SIMD16 Surface = 1 Sampler = 0 mlen 9 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g125<8,8,1>UD 0x860a0f10
|
||||
sendc(8) nullUD g125UD 0x860a0f10
|
||||
sampler MsgDesc: sample SIMD8 Surface = 16 Sampler = 15 mlen 3 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g123<8,8,1>UD 0x8a0c0f10
|
||||
sendc(16) nullUD g123UD 0x8a0c0f10
|
||||
sampler MsgDesc: sample SIMD16 Surface = 16 Sampler = 15 mlen 5 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g126<8,8,1>UD 0x840a0102
|
||||
sendc(8) nullUD g126UD 0x840a0102
|
||||
sampler MsgDesc: sample SIMD8 Surface = 2 Sampler = 1 mlen 2 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g125<8,8,1>UD 0x860c0102
|
||||
sendc(16) nullUD g125UD 0x860c0102
|
||||
sampler MsgDesc: sample SIMD16 Surface = 2 Sampler = 1 mlen 3 rlen 0 { align1 1H EOT };
|
||||
sendc(16) nullUD g11<0,1,0>F 0x180b0000
|
||||
sendc(16) nullUD g11UD 0x180b0000
|
||||
render MsgDesc: RT write SIMD16 Surface = 0 mlen 12 rlen 0 { align1 1H };
|
||||
sendc(8) nullUD g122<0,1,0>F 0x8c031400
|
||||
sendc(8) nullUD g122UD 0x8c031400
|
||||
render MsgDesc: RT write SIMD8 LastRT Surface = 0 mlen 6 rlen 0 { align1 1Q EOT };
|
||||
sendc(8) nullUD g125<8,8,1>UD 0x860a0506
|
||||
sendc(8) nullUD g125UD 0x860a0506
|
||||
sampler MsgDesc: sample SIMD8 Surface = 6 Sampler = 5 mlen 3 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g123<8,8,1>UD 0x8a0c0506
|
||||
sendc(16) nullUD g123UD 0x8a0c0506
|
||||
sampler MsgDesc: sample SIMD16 Surface = 6 Sampler = 5 mlen 5 rlen 0 { align1 1H EOT };
|
||||
sendc(8) nullUD g125<8,8,1>UD 0x860b8001
|
||||
sendc(8) nullUD g125UD 0x860b8001
|
||||
sampler MsgDesc: sample_lz SIMD8 Surface = 1 Sampler = 0 mlen 3 rlen 0 { align1 1Q EOT };
|
||||
sendc(16) nullUD g123<8,8,1>UD 0x8a0d8001
|
||||
sendc(16) nullUD g123UD 0x8a0d8001
|
||||
sampler MsgDesc: sample_lz SIMD16 Surface = 1 Sampler = 0 mlen 5 rlen 0 { align1 1H EOT };
|
||||
|
|
|
|||
|
|
@ -1,132 +1,132 @@
|
|||
32 00 60 05 00 3a 00 20 80 0f 00 06 00 14 03 88
|
||||
32 00 80 05 00 3a 00 20 00 0f 00 06 00 10 03 90
|
||||
32 00 80 05 00 3a 00 20 40 0e 00 06 00 11 03 82
|
||||
32 00 60 02 00 02 00 20 80 0f 8d 06 01 a0 0b 88
|
||||
32 00 80 02 00 02 00 20 20 0f 8d 06 01 a0 0d 8e
|
||||
32 00 60 02 00 02 00 20 a0 0f 8d 06 01 00 0a 86
|
||||
32 00 80 02 00 02 00 20 60 0f 8d 06 01 00 0c 8a
|
||||
32 00 61 05 01 3a 00 20 80 0f 00 06 00 14 03 88
|
||||
32 00 60 02 00 02 00 20 40 0f 8d 06 01 e0 0b 8c
|
||||
32 00 80 02 00 02 00 20 a0 0e 8d 06 01 e0 0d 96
|
||||
32 00 60 02 00 02 00 20 80 0f 8d 06 01 00 0a 88
|
||||
32 00 80 02 00 02 00 20 20 0f 8d 06 01 00 0c 8e
|
||||
32 00 60 02 00 02 00 20 c0 0e 8d 06 01 40 0a 94
|
||||
32 00 60 02 00 02 00 20 a0 2f 8d 00 00 02 00 80
|
||||
32 00 60 02 00 02 00 20 80 0f 8d 06 01 40 0a 88
|
||||
32 00 60 02 00 02 00 20 20 0f 8d 06 01 c0 0b 8e
|
||||
32 00 60 02 00 02 00 20 20 0f 8d 06 01 40 0a 8e
|
||||
32 00 60 02 00 02 00 20 a0 0f 8d 06 01 20 0a 86
|
||||
32 00 80 02 00 02 00 20 60 0f 8d 06 01 20 0c 8a
|
||||
32 00 60 05 00 3a 00 20 40 0f 00 06 01 14 0b 8c
|
||||
32 00 80 05 00 3a 00 20 c0 0e 00 06 01 10 0b 94
|
||||
32 00 60 05 00 3a 00 20 a0 01 00 06 01 04 0b 0e
|
||||
32 00 60 05 00 3a 00 20 20 0f 00 06 02 14 0b 8e
|
||||
32 00 80 05 00 3a 00 20 e0 00 00 06 01 00 0b 18
|
||||
32 00 80 05 00 3a 00 20 80 0e 00 06 02 10 0b 98
|
||||
32 00 60 02 00 02 00 20 60 0f 8d 06 01 10 0a 8a
|
||||
32 00 80 02 00 02 00 20 e0 0e 8d 06 01 10 0c 92
|
||||
32 00 00 0a 4c 12 40 20 40 00 00 06 00 c0 09 02
|
||||
32 00 60 02 00 02 00 20 00 0f 8d 06 01 40 0b 90
|
||||
32 00 60 02 00 02 00 20 60 0f 8d 06 01 40 0b 8a
|
||||
32 00 60 05 e8 02 c0 20 40 00 00 06 00 41 4b 04
|
||||
32 00 80 05 e8 02 20 21 60 03 00 06 00 40 8b 04
|
||||
32 00 60 02 00 02 00 20 80 0f 8d 06 01 30 0a 88
|
||||
32 00 80 02 00 02 00 20 20 0f 8d 06 01 30 0c 8e
|
||||
32 00 60 05 00 3a 00 20 60 0f 00 06 00 14 03 8a
|
||||
32 00 80 05 00 3a 00 20 c0 0e 00 06 00 10 03 94
|
||||
32 00 60 05 00 3a 00 20 a0 00 00 06 00 04 0b 0c
|
||||
32 00 60 05 00 3a 00 20 a0 00 00 06 01 04 0b 0c
|
||||
32 00 60 05 00 3a 00 20 a0 00 00 06 02 04 0b 0c
|
||||
32 00 60 05 00 3a 00 20 a0 00 00 06 03 04 0b 0c
|
||||
32 00 60 05 00 3a 00 20 a0 00 00 06 04 04 0b 0c
|
||||
32 00 60 05 00 3a 00 20 40 0f 00 06 05 14 0b 8c
|
||||
32 00 80 05 00 3a 00 20 a0 00 00 06 00 00 0b 14
|
||||
32 00 80 05 00 3a 00 20 a0 00 00 06 01 00 0b 14
|
||||
32 00 80 05 00 3a 00 20 a0 00 00 06 02 00 0b 14
|
||||
32 00 80 05 00 3a 00 20 a0 00 00 06 03 00 0b 14
|
||||
32 00 80 05 00 3a 00 20 a0 00 00 06 04 00 0b 14
|
||||
32 00 80 05 00 3a 00 20 c0 0e 00 06 05 10 0b 94
|
||||
32 00 60 05 e8 02 c0 20 c0 00 00 06 01 41 4b 04
|
||||
32 00 60 05 e8 02 40 21 40 01 00 06 02 41 4b 04
|
||||
32 00 60 05 e8 02 c0 21 c0 01 00 06 03 41 4b 04
|
||||
32 00 60 05 00 3a 00 20 40 0f 00 06 03 14 0b 8c
|
||||
32 00 80 05 e8 02 00 24 c0 01 00 06 01 40 8b 04
|
||||
32 00 80 05 e8 02 00 25 00 02 00 06 02 40 8b 04
|
||||
32 00 80 05 e8 02 00 26 40 02 00 06 03 40 8b 04
|
||||
32 00 80 05 00 3a 00 20 c0 0e 00 06 03 10 0b 94
|
||||
32 00 60 02 00 02 00 20 80 0f 8d 06 01 10 0a 88
|
||||
32 00 80 02 00 02 00 20 20 0f 8d 06 01 10 0c 8e
|
||||
32 00 60 02 00 02 00 20 a0 0f 8d 06 01 a0 0b 86
|
||||
32 00 80 02 00 02 00 20 60 0f 8d 06 01 a0 0d 8a
|
||||
32 00 60 02 00 02 00 20 c0 0f 8d 06 01 00 0a 84
|
||||
32 00 80 02 00 02 00 20 a0 0f 8d 06 01 00 0c 86
|
||||
32 00 60 02 00 02 00 20 80 0f 8d 06 01 20 0a 88
|
||||
32 00 80 02 00 02 00 20 20 0f 8d 06 01 20 0c 8e
|
||||
32 00 60 02 00 02 00 20 60 0f 8d 06 01 e0 0b 8a
|
||||
32 00 80 02 00 02 00 20 e0 0e 8d 06 01 e0 0d 92
|
||||
32 00 60 02 00 02 00 20 00 0f 8d 06 01 40 0a 90
|
||||
32 00 60 02 00 02 00 20 60 0f 8d 06 01 20 0a 8a
|
||||
32 00 80 02 00 02 00 20 e0 0e 8d 06 01 20 0c 92
|
||||
32 00 60 02 00 02 00 20 a0 0f 8d 06 04 03 0a 86
|
||||
32 00 80 02 00 02 00 20 60 0f 8d 06 04 03 0c 8a
|
||||
32 00 60 02 00 02 00 20 40 0f 8d 06 01 10 0a 8c
|
||||
32 00 80 02 00 02 00 20 a0 0e 8d 06 01 10 0c 96
|
||||
32 00 60 02 00 02 00 20 a0 0f 8d 06 01 30 0a 86
|
||||
32 00 80 02 00 02 00 20 60 0f 8d 06 01 30 0c 8a
|
||||
32 00 60 05 00 3a 00 20 40 0f 00 06 02 14 0b 8c
|
||||
32 00 80 05 00 3a 00 20 c0 0e 00 06 02 10 0b 94
|
||||
32 00 60 02 00 02 00 20 80 0f 8d 06 01 60 0a 88
|
||||
32 00 80 02 00 02 00 20 20 0f 8d 06 01 60 0c 8e
|
||||
32 00 60 02 00 02 00 20 60 0f 8d 06 01 50 0a 8a
|
||||
32 00 80 02 00 02 00 20 e0 0e 8d 06 01 50 0c 92
|
||||
32 00 60 02 00 02 00 20 40 0f 8d 06 01 20 0a 8c
|
||||
32 00 80 02 00 02 00 20 a0 0e 8d 06 01 20 0c 96
|
||||
32 00 60 02 00 02 00 20 40 0f 8d 06 01 c0 0b 8c
|
||||
32 00 80 02 00 02 00 20 a0 0e 8d 06 01 c0 0d 96
|
||||
32 00 60 05 00 3a 00 20 40 0f 00 06 00 14 0b 8c
|
||||
32 00 80 05 00 3a 00 20 c0 0e 00 06 00 10 0b 94
|
||||
32 00 60 02 00 02 00 20 80 0f 8d 06 01 70 0a 88
|
||||
32 00 80 02 00 02 00 20 20 0f 8d 06 01 70 0c 8e
|
||||
32 00 60 05 00 3a 00 20 c0 0e 00 06 00 12 0b 94
|
||||
32 00 60 05 00 3a 00 20 60 00 00 06 00 12 0b 14
|
||||
32 10 60 05 00 3a 00 20 c0 0e 00 06 00 13 0b 94
|
||||
32 00 60 02 00 02 00 20 60 0f 8d 06 01 00 0a 8a
|
||||
32 00 80 02 00 02 00 20 e0 0e 8d 06 01 00 0c 92
|
||||
32 00 80 05 e8 02 60 21 a0 04 00 06 00 60 8b 04
|
||||
32 00 60 05 00 3a 00 20 e0 02 00 06 05 04 0b 0c
|
||||
32 00 60 05 00 3a 00 20 a0 03 00 06 06 04 0b 0c
|
||||
32 00 60 05 00 3a 00 20 40 0f 00 06 07 14 0b 8c
|
||||
32 00 80 05 00 3a 00 20 20 07 00 06 05 00 0b 14
|
||||
32 00 80 05 00 3a 00 20 60 08 00 06 06 00 0b 14
|
||||
32 00 80 05 00 3a 00 20 c0 0e 00 06 07 10 0b 94
|
||||
32 00 60 02 00 02 00 20 a0 0f 8d 06 01 10 0a 86
|
||||
32 00 80 02 00 02 00 20 60 0f 8d 06 01 10 0c 8a
|
||||
32 00 60 05 00 3a 00 20 40 01 00 06 00 04 0b 0e
|
||||
32 00 60 05 00 3a 00 20 20 0f 00 06 01 14 0b 8e
|
||||
32 00 80 05 00 3a 00 20 40 00 00 06 00 00 0b 16
|
||||
32 00 80 05 00 3a 00 20 a0 0e 00 06 01 10 0b 96
|
||||
32 00 60 05 00 3a 00 20 40 0f 00 06 04 14 0b 8c
|
||||
32 00 80 05 00 3a 00 20 c0 0e 00 06 04 10 0b 94
|
||||
32 00 60 05 00 3a 00 20 40 0f 00 06 06 14 0b 8c
|
||||
32 00 80 05 00 3a 00 20 c0 0e 00 06 06 10 0b 94
|
||||
32 00 80 05 00 3a 00 20 e0 0e 00 06 00 10 03 92
|
||||
32 00 80 05 00 3a 00 20 80 0e 00 06 01 10 0b 98
|
||||
32 00 60 02 00 02 00 20 60 0f 8d 06 01 60 0a 8a
|
||||
32 00 80 02 00 02 00 20 e0 0e 8d 06 01 60 0c 92
|
||||
32 00 60 02 00 02 00 20 a0 0f 8d 06 02 01 0a 86
|
||||
32 00 80 02 00 02 00 20 60 0f 8d 06 02 01 0c 8a
|
||||
32 00 60 02 00 02 00 20 80 0f 8d 06 01 50 0a 88
|
||||
32 00 80 02 00 02 00 20 20 0f 8d 06 01 50 0c 8e
|
||||
32 00 60 02 00 02 00 20 60 0f 8d 06 01 40 0a 8a
|
||||
32 00 60 02 00 02 00 20 60 0f 8d 06 01 30 0a 8a
|
||||
32 00 80 02 00 02 00 20 e0 0e 8d 06 01 30 0c 92
|
||||
32 00 60 02 00 02 00 20 a0 0f 8d 06 10 0f 0a 86
|
||||
32 00 80 02 00 02 00 20 60 0f 8d 06 10 0f 0c 8a
|
||||
32 00 60 02 00 02 00 20 c0 0f 8d 06 02 01 0a 84
|
||||
32 00 80 02 00 02 00 20 a0 0f 8d 06 02 01 0c 86
|
||||
32 00 80 05 00 3a 00 20 60 01 00 06 00 00 0b 18
|
||||
32 00 60 05 00 3a 00 20 40 0f 00 06 00 14 03 8c
|
||||
32 00 60 02 00 02 00 20 a0 0f 8d 06 06 05 0a 86
|
||||
32 00 80 02 00 02 00 20 60 0f 8d 06 06 05 0c 8a
|
||||
32 00 60 02 00 02 00 20 a0 0f 8d 06 01 80 0b 86
|
||||
32 00 80 02 00 02 00 20 60 0f 8d 06 01 80 0d 8a
|
||||
32 00 60 05 00 02 00 20 80 0f 00 06 00 14 03 88
|
||||
32 00 80 05 00 02 00 20 00 0f 00 06 00 10 03 90
|
||||
32 00 80 05 00 02 00 20 40 0e 00 06 00 11 03 82
|
||||
32 00 60 02 00 02 00 20 80 0f 00 06 01 a0 0b 88
|
||||
32 00 80 02 00 02 00 20 20 0f 00 06 01 a0 0d 8e
|
||||
32 00 60 02 00 02 00 20 a0 0f 00 06 01 00 0a 86
|
||||
32 00 80 02 00 02 00 20 60 0f 00 06 01 00 0c 8a
|
||||
32 00 61 05 01 02 00 20 80 0f 00 06 00 14 03 88
|
||||
32 00 60 02 00 02 00 20 40 0f 00 06 01 e0 0b 8c
|
||||
32 00 80 02 00 02 00 20 a0 0e 00 06 01 e0 0d 96
|
||||
32 00 60 02 00 02 00 20 80 0f 00 06 01 00 0a 88
|
||||
32 00 80 02 00 02 00 20 20 0f 00 06 01 00 0c 8e
|
||||
32 00 60 02 00 02 00 20 c0 0e 00 06 01 40 0a 94
|
||||
32 00 60 02 00 02 00 20 a0 2f 00 00 00 02 00 80
|
||||
32 00 60 02 00 02 00 20 80 0f 00 06 01 40 0a 88
|
||||
32 00 60 02 00 02 00 20 20 0f 00 06 01 c0 0b 8e
|
||||
32 00 60 02 00 02 00 20 20 0f 00 06 01 40 0a 8e
|
||||
32 00 60 02 00 02 00 20 a0 0f 00 06 01 20 0a 86
|
||||
32 00 80 02 00 02 00 20 60 0f 00 06 01 20 0c 8a
|
||||
32 00 60 05 00 02 00 20 40 0f 00 06 01 14 0b 8c
|
||||
32 00 80 05 00 02 00 20 c0 0e 00 06 01 10 0b 94
|
||||
32 00 60 05 00 02 00 20 a0 01 00 06 01 04 0b 0e
|
||||
32 00 60 05 00 02 00 20 20 0f 00 06 02 14 0b 8e
|
||||
32 00 80 05 00 02 00 20 e0 00 00 06 01 00 0b 18
|
||||
32 00 80 05 00 02 00 20 80 0e 00 06 02 10 0b 98
|
||||
32 00 60 02 00 02 00 20 60 0f 00 06 01 10 0a 8a
|
||||
32 00 80 02 00 02 00 20 e0 0e 00 06 01 10 0c 92
|
||||
32 00 00 0a 0c 02 40 20 40 00 00 06 00 c0 09 02
|
||||
32 00 60 02 00 02 00 20 00 0f 00 06 01 40 0b 90
|
||||
32 00 60 02 00 02 00 20 60 0f 00 06 01 40 0b 8a
|
||||
32 00 60 05 08 02 c0 20 40 00 00 06 00 41 4b 04
|
||||
32 00 80 05 08 02 20 21 60 03 00 06 00 40 8b 04
|
||||
32 00 60 02 00 02 00 20 80 0f 00 06 01 30 0a 88
|
||||
32 00 80 02 00 02 00 20 20 0f 00 06 01 30 0c 8e
|
||||
32 00 60 05 00 02 00 20 60 0f 00 06 00 14 03 8a
|
||||
32 00 80 05 00 02 00 20 c0 0e 00 06 00 10 03 94
|
||||
32 00 60 05 00 02 00 20 a0 00 00 06 00 04 0b 0c
|
||||
32 00 60 05 00 02 00 20 a0 00 00 06 01 04 0b 0c
|
||||
32 00 60 05 00 02 00 20 a0 00 00 06 02 04 0b 0c
|
||||
32 00 60 05 00 02 00 20 a0 00 00 06 03 04 0b 0c
|
||||
32 00 60 05 00 02 00 20 a0 00 00 06 04 04 0b 0c
|
||||
32 00 60 05 00 02 00 20 40 0f 00 06 05 14 0b 8c
|
||||
32 00 80 05 00 02 00 20 a0 00 00 06 00 00 0b 14
|
||||
32 00 80 05 00 02 00 20 a0 00 00 06 01 00 0b 14
|
||||
32 00 80 05 00 02 00 20 a0 00 00 06 02 00 0b 14
|
||||
32 00 80 05 00 02 00 20 a0 00 00 06 03 00 0b 14
|
||||
32 00 80 05 00 02 00 20 a0 00 00 06 04 00 0b 14
|
||||
32 00 80 05 00 02 00 20 c0 0e 00 06 05 10 0b 94
|
||||
32 00 60 05 08 02 c0 20 c0 00 00 06 01 41 4b 04
|
||||
32 00 60 05 08 02 40 21 40 01 00 06 02 41 4b 04
|
||||
32 00 60 05 08 02 c0 21 c0 01 00 06 03 41 4b 04
|
||||
32 00 60 05 00 02 00 20 40 0f 00 06 03 14 0b 8c
|
||||
32 00 80 05 08 02 00 24 c0 01 00 06 01 40 8b 04
|
||||
32 00 80 05 08 02 00 25 00 02 00 06 02 40 8b 04
|
||||
32 00 80 05 08 02 00 26 40 02 00 06 03 40 8b 04
|
||||
32 00 80 05 00 02 00 20 c0 0e 00 06 03 10 0b 94
|
||||
32 00 60 02 00 02 00 20 80 0f 00 06 01 10 0a 88
|
||||
32 00 80 02 00 02 00 20 20 0f 00 06 01 10 0c 8e
|
||||
32 00 60 02 00 02 00 20 a0 0f 00 06 01 a0 0b 86
|
||||
32 00 80 02 00 02 00 20 60 0f 00 06 01 a0 0d 8a
|
||||
32 00 60 02 00 02 00 20 c0 0f 00 06 01 00 0a 84
|
||||
32 00 80 02 00 02 00 20 a0 0f 00 06 01 00 0c 86
|
||||
32 00 60 02 00 02 00 20 80 0f 00 06 01 20 0a 88
|
||||
32 00 80 02 00 02 00 20 20 0f 00 06 01 20 0c 8e
|
||||
32 00 60 02 00 02 00 20 60 0f 00 06 01 e0 0b 8a
|
||||
32 00 80 02 00 02 00 20 e0 0e 00 06 01 e0 0d 92
|
||||
32 00 60 02 00 02 00 20 00 0f 00 06 01 40 0a 90
|
||||
32 00 60 02 00 02 00 20 60 0f 00 06 01 20 0a 8a
|
||||
32 00 80 02 00 02 00 20 e0 0e 00 06 01 20 0c 92
|
||||
32 00 60 02 00 02 00 20 a0 0f 00 06 04 03 0a 86
|
||||
32 00 80 02 00 02 00 20 60 0f 00 06 04 03 0c 8a
|
||||
32 00 60 02 00 02 00 20 40 0f 00 06 01 10 0a 8c
|
||||
32 00 80 02 00 02 00 20 a0 0e 00 06 01 10 0c 96
|
||||
32 00 60 02 00 02 00 20 a0 0f 00 06 01 30 0a 86
|
||||
32 00 80 02 00 02 00 20 60 0f 00 06 01 30 0c 8a
|
||||
32 00 60 05 00 02 00 20 40 0f 00 06 02 14 0b 8c
|
||||
32 00 80 05 00 02 00 20 c0 0e 00 06 02 10 0b 94
|
||||
32 00 60 02 00 02 00 20 80 0f 00 06 01 60 0a 88
|
||||
32 00 80 02 00 02 00 20 20 0f 00 06 01 60 0c 8e
|
||||
32 00 60 02 00 02 00 20 60 0f 00 06 01 50 0a 8a
|
||||
32 00 80 02 00 02 00 20 e0 0e 00 06 01 50 0c 92
|
||||
32 00 60 02 00 02 00 20 40 0f 00 06 01 20 0a 8c
|
||||
32 00 80 02 00 02 00 20 a0 0e 00 06 01 20 0c 96
|
||||
32 00 60 02 00 02 00 20 40 0f 00 06 01 c0 0b 8c
|
||||
32 00 80 02 00 02 00 20 a0 0e 00 06 01 c0 0d 96
|
||||
32 00 60 05 00 02 00 20 40 0f 00 06 00 14 0b 8c
|
||||
32 00 80 05 00 02 00 20 c0 0e 00 06 00 10 0b 94
|
||||
32 00 60 02 00 02 00 20 80 0f 00 06 01 70 0a 88
|
||||
32 00 80 02 00 02 00 20 20 0f 00 06 01 70 0c 8e
|
||||
32 00 60 05 00 02 00 20 c0 0e 00 06 00 12 0b 94
|
||||
32 00 60 05 00 02 00 20 60 00 00 06 00 12 0b 14
|
||||
32 10 60 05 00 02 00 20 c0 0e 00 06 00 13 0b 94
|
||||
32 00 60 02 00 02 00 20 60 0f 00 06 01 00 0a 8a
|
||||
32 00 80 02 00 02 00 20 e0 0e 00 06 01 00 0c 92
|
||||
32 00 80 05 08 02 60 21 a0 04 00 06 00 60 8b 04
|
||||
32 00 60 05 00 02 00 20 e0 02 00 06 05 04 0b 0c
|
||||
32 00 60 05 00 02 00 20 a0 03 00 06 06 04 0b 0c
|
||||
32 00 60 05 00 02 00 20 40 0f 00 06 07 14 0b 8c
|
||||
32 00 80 05 00 02 00 20 20 07 00 06 05 00 0b 14
|
||||
32 00 80 05 00 02 00 20 60 08 00 06 06 00 0b 14
|
||||
32 00 80 05 00 02 00 20 c0 0e 00 06 07 10 0b 94
|
||||
32 00 60 02 00 02 00 20 a0 0f 00 06 01 10 0a 86
|
||||
32 00 80 02 00 02 00 20 60 0f 00 06 01 10 0c 8a
|
||||
32 00 60 05 00 02 00 20 40 01 00 06 00 04 0b 0e
|
||||
32 00 60 05 00 02 00 20 20 0f 00 06 01 14 0b 8e
|
||||
32 00 80 05 00 02 00 20 40 00 00 06 00 00 0b 16
|
||||
32 00 80 05 00 02 00 20 a0 0e 00 06 01 10 0b 96
|
||||
32 00 60 05 00 02 00 20 40 0f 00 06 04 14 0b 8c
|
||||
32 00 80 05 00 02 00 20 c0 0e 00 06 04 10 0b 94
|
||||
32 00 60 05 00 02 00 20 40 0f 00 06 06 14 0b 8c
|
||||
32 00 80 05 00 02 00 20 c0 0e 00 06 06 10 0b 94
|
||||
32 00 80 05 00 02 00 20 e0 0e 00 06 00 10 03 92
|
||||
32 00 80 05 00 02 00 20 80 0e 00 06 01 10 0b 98
|
||||
32 00 60 02 00 02 00 20 60 0f 00 06 01 60 0a 8a
|
||||
32 00 80 02 00 02 00 20 e0 0e 00 06 01 60 0c 92
|
||||
32 00 60 02 00 02 00 20 a0 0f 00 06 02 01 0a 86
|
||||
32 00 80 02 00 02 00 20 60 0f 00 06 02 01 0c 8a
|
||||
32 00 60 02 00 02 00 20 80 0f 00 06 01 50 0a 88
|
||||
32 00 80 02 00 02 00 20 20 0f 00 06 01 50 0c 8e
|
||||
32 00 60 02 00 02 00 20 60 0f 00 06 01 40 0a 8a
|
||||
32 00 60 02 00 02 00 20 60 0f 00 06 01 30 0a 8a
|
||||
32 00 80 02 00 02 00 20 e0 0e 00 06 01 30 0c 92
|
||||
32 00 60 02 00 02 00 20 a0 0f 00 06 10 0f 0a 86
|
||||
32 00 80 02 00 02 00 20 60 0f 00 06 10 0f 0c 8a
|
||||
32 00 60 02 00 02 00 20 c0 0f 00 06 02 01 0a 84
|
||||
32 00 80 02 00 02 00 20 a0 0f 00 06 02 01 0c 86
|
||||
32 00 80 05 00 02 00 20 60 01 00 06 00 00 0b 18
|
||||
32 00 60 05 00 02 00 20 40 0f 00 06 00 14 03 8c
|
||||
32 00 60 02 00 02 00 20 a0 0f 00 06 06 05 0a 86
|
||||
32 00 80 02 00 02 00 20 60 0f 00 06 06 05 0c 8a
|
||||
32 00 60 02 00 02 00 20 a0 0f 00 06 01 80 0b 86
|
||||
32 00 80 02 00 02 00 20 60 0f 00 06 01 80 0d 8a
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue