Commit graph

40809 commits

Author SHA1 Message Date
Boris Brezillon
b196e1a8cf gallium: Fix the ->set_damage_region() implementation
BACK_LEFT attachment can be outdated when the user calls
KHR_partial_update() (->lastStamp != ->texture_stamp), leading to a
damage region update on the wrong pipe_resource object.
Let's delay the ->set_damage_region() call until the attachments are
updated when we're in that case.

Reported-by: Carsten Haitzler <raster@rasterman.com>
Fixes: 492ffbed63 ("st/dri2: Implement DRI2bufferDamageExtension")
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-11-29 10:20:29 +01:00
Erik Faye-Lund
5fcb503c73 zink: silence coverity error
Coverity doesn't know that we always have coordinates if we have lod. To
avoid annoying errors, let's just zero-initialize this.

CoverityID: 1455202
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-11-29 09:54:25 +01:00
Erik Faye-Lund
7a63124a06 zink: error-check right variable
That's not the value we just allocated...

CoverityID: 1455177
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-11-29 09:54:25 +01:00
Erik Faye-Lund
c8769ff8dd zink: avoid NULL-deref
Same story as the previous two commits; these functions dereference the
memory they are pointed at. We can't do that.

CoverityID: 1455180
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-11-29 09:54:25 +01:00
Erik Faye-Lund
e54240f153 zink: avoid NULL-deref
Similar to the previous commit, pipe_resource_reference also dereference
the memory pointed at. Let's avoid it.

CoverityID: 1455198
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-11-29 09:54:25 +01:00
Erik Faye-Lund
bda64440e4 zink: avoid NULL-deref
zink_render_pass_reference will dereference the memory 'dst' points at,
which can't really go well. All we want to do here is to increase the
reference-count, so let's use a different helper for that instead.

CoverityID: 1455200
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-11-29 09:54:25 +01:00
Erik Faye-Lund
8e1dca35ab zink: handle calloc-failure
In case we fail to allocate the context, we should notice and fail
gracefully.

CoverityID: 1455193
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-11-29 09:54:25 +01:00
Erik Faye-Lund
8772d95d40 zink: do not try to destroy NULL-fence
destroy_fence doesn't handle NULL-pointers gracefully. So let's avoid
hitting that code-path, by simply returning NULL early here instead.

CoverityID: 1455179
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-11-29 09:54:25 +01:00
Erik Faye-Lund
49f53ee336 zink: delete query rather than allocating a new one
It seems I had some fat fingers when writing this function, and I
accidentally ended up allocating a new query and immediately trying to
delete an uninitialized pool instead of just deleting the pool of the
query that was passed.

CoverityID: 1455196
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-11-29 09:54:25 +01:00
Erik Faye-Lund
f2188e58ce zink: fix crash when restoring sampler-states
When I changed to heap-allocated sampler-objects, I missed the code-path
that restores sampler-states after the blitter; it needs an array of
pointers, not an array of VkSampler objects to behave.

This fixes spec@arb_texture_cube_map@copyteximage for me.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: 5ea787950f ("zink: heap-allocate samplers objects")
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-11-29 09:19:54 +01:00
Erik Faye-Lund
655b9aa711 zink: reject invalid sample-counts
Vulkan only allows power-of-two sample counts. We already kinda checked
for this, but forgot to validate the result in the end. Let's check the
result and error properly.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-11-29 08:58:05 +01:00
Erik Faye-Lund
927363e0b9 zink: use true/false instead of TRUE/FALSE
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-11-29 08:57:33 +01:00
Vinson Lee
de2e5f6f54 panfrost: Fix gnu-empty-initializer build errors.
Fixes: a24d6fbae6 ("meson: Add -Werror=gnu-empty-initializer to MSVC compat args")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-11-28 16:12:38 -08:00
Jonathan Gray
3fe3bde4f2 winsys/amdgpu: avoid double simple_mtx_unlock()
pthread_mutex_unlock() when unlocked is documented by posix as
being undefined behaviour.  On OpenBSD pthread_mutex_unlock() will call
abort(3) if this happens.

This occurs in amdgpu_winsys_create() after
cb446dc0fa
winsys/amdgpu: Add amdgpu_screen_winsys

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Cc: 19.2 19.3 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-11-28 15:03:59 -05:00
Dave Airlie
18f896e55d llvmpipe: add initial nir support
This adds the hooks between llvmpipe and the gallivm NIR
code, for compute and fragment shaders.

NIR support is hidden behind LP_DEBUG=nir for now until
all the intergration issues are solved

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2019-11-28 14:49:23 +10:00
Dave Airlie
5363cda52b gallivm: add swizzle support where one channel isn't defined.
NIR doesn't always define all output channels
relies on outputs being memset to 0

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2019-11-28 14:49:16 +10:00
Dave Airlie
3eb27cfccd gallium: add nir lowering passes for the draw pipe stages. (v2)
This transforms the NIR shaders like the TGSI transforms worked.

v2: fix some nir info requirements, use 32-bit bools

Acked-by: Roland Scheidegger <sroland@vmware.com>
2019-11-28 14:49:05 +10:00
Dave Airlie
bf12bc2dd7 draw: add nir info gathering and building support
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2019-11-28 14:48:56 +10:00
Dave Airlie
44a6b0107b gallivm: add nir->llvm translation (v2)
This add the initial implementation of the NIR->LLVM conversion
for llvmpipe NIR support.

v2: lower bool to int32 in nir not llvm

Acked-by: Roland Scheidegger <sroland@vmware.com>
2019-11-28 14:48:44 +10:00
Dave Airlie
18ed09d449 gallivm: add selection for non-32 bit types
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2019-11-28 14:48:38 +10:00
Dave Airlie
9461f2b5df gallivm: add cttz wrapper
this will be used to write find_lsb support

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2019-11-28 14:48:32 +10:00
Dave Airlie
1a608901cc gallivm: add popcount intrinsic wrapper
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2019-11-28 14:48:25 +10:00
Dave Airlie
3b9950098b gallivm: nir->tgsi info convertor (v2)
This is a port of the old radeonsi code to be used for llvmpipe NIR support.

Once we remove TGSI support from llvmpipe (I can dream? :-), then
we should be able to refine most of this down and remove it.

v2: port to later radeonsi code for vertex inputs and sampler/io parsing.

Acked-by: Roland Scheidegger <sroland@vmware.com>
2019-11-28 14:48:11 +10:00
Dave Airlie
c879efec09 gallivm: split out the flow control ir to a common file.
We can share a bunch of flow control handling between NIR and TGSI.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2019-11-28 14:47:54 +10:00
Marek Olšák
754c7b8939 radeonsi: enable SPIR-V and GL 4.6 for NIR
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-11-27 19:28:35 -05:00
Marek Olšák
cf240ea6a5 radeonsi/nir: support interface output types to fix SPIR-V xfb piglits
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-11-27 19:28:34 -05:00
Marek Olšák
1b45da15a9 radeonsi/nir: fix location_frac handling for TCS outputs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-11-27 19:28:32 -05:00
Marek Olšák
268e42e4f8 radeonsi/nir: don't rely on data.patch for tess factors
GLCTS SPIR-V tests have this issue.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-11-27 19:28:30 -05:00
Marek Olšák
59daac686d radeonsi/nir: validate is_patch because SPIR-V doesn't set it for tess factors
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-11-27 19:28:29 -05:00
Marek Olšák
272f1369ec radeonsi: simplify get_tcs_tes_buffer_address_from_generic_indices
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-11-27 19:28:28 -05:00
Marek Olšák
1e3aab4cd0 radeonsi: simplify the interface of get_dw_address_from_generic_indices
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-11-27 19:28:26 -05:00
Marek Olšák
756fc9f1bb radeonsi/nir: implement subgroup system values for SPIR-V
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-11-27 19:28:23 -05:00
Kenneth Graunke
9b577f2a88 driconf, glsl: Add a vs_position_always_invariant option
Many applications use multi-pass rendering and require their vertex
shader position to be computed the same way each time.  Optimizations
may consider, say, fusing a multiply-add based on global usage of an
expression in a shader.  But a second shader with the same expression
may have different code, causing that optimization to make the other
choice the second time around.

The correct solution is for applications to mark their VS outputs
'invariant', indicating they need multiple shaders to compute that
output in the same manner.  However, most applications fail to do so.

So, we add a new driconf option - vs_position_always_invariant - which
forces the gl_Position output in vertex shaders to be marked invariant.

Fixes: 7025dbe794 ("nir: Skip emitting no-op movs from the builder.")
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2019-11-27 18:48:04 +00:00
Iago Toral Quiroga
18a09e788d v3d: fix indirect BO allocation for uniforms
We were always ensuring a minimum size of 4 bytes for uniforms
for the case where we don't have any, to account for hardware pre-fetching
of the uniform stream, however, pre-fetching could also lead to to out
of bounds reads when have read the last uniform in the stream, so we
probably want to have the extra 4 bytes to prevent the kernel from
observing invalid memory accesses when the uniform stream sits right at
the end of a page.

This seems to fix MMU exceptions reported with a Linux 5.4 kernel.

Credit goes to Phil Elwell for identifying the problem and narrowing
it down to memory accesses in the uniform stream.

Reported-by: Phil Elwell <phil@raspberrypi.org>
Tested-by: Phil Elwell <phil@raspberrypi.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-11-27 08:43:13 +01:00
Dylan Baker
25e58e3718 gallium/auxiliary: Fix uses of gnu struct = {} extension
Most of these will never actually be compiled by windows, but in the
interest of being able to make using struct foo = {}; an error and
avoiding breaking windows removing a handful of safe uses seems like a
good trade off.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-26 12:48:11 -08:00
Kenneth Graunke
3fdf2bb313 iris: Disable VF cache partial address workaround on Gen11+
The vertex cache uses the full 48-bit address on Gen11+.  See the
documentation for 3DSTATE_VERTEX_BUFFERS, which describes the
workaround and lists it as pre-Icelake.

Interestingly, the docs don't mention index buffers as needing a
workaround at all.  So either we've been overzealous, or the docs
never got updated to record that.  Which begs the question of whether
the issue there was fixed, if there was one...

Cuts 40% of the PIPE_CONTROLs from Civilization VI's benchmark; appears
that it improves performance by about 1-2% on Icelake 8x8 (not frequency
locked).
2019-11-26 12:13:34 -08:00
Rob Clark
8d9f5a28e3 freedreno: switch to layout helper
The slices table and most of the other layout fields in the
freedreno_resource moves into fdl_layout.

v2: Changes by anholt to not have duplicate fields, which was introducing
    a surprising behavior change in resource layout (using the
    level_linear helper before the setup of the shadowed fields)

Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Clark <robdclark@chromium.org>
2019-11-26 18:46:08 +00:00
Eric Anholt
997b8d4749 freedreno/a6xx: Log the tiling mode in resource layout debug.
This was important for figuring out what went wrong with the layout
refactor.

Acked-by: Rob Clark <robdclark@chromium.org>
2019-11-26 18:46:07 +00:00
Eric Anholt
2e62a622e7 freedreno: Convert the slice struct to the new resource header.
This gets the worst of the sed required for shared resource layout out of
the way.  The texture layout comment is dropped now that we're referencing
the shared header, which has a more complete description.

Acked-by: Rob Clark <robdclark@chromium.org>
2019-11-26 18:46:07 +00:00
Eric Anholt
2ec420b264 freedreno: Introduce a fd_resource_tile_mode() helper.
Multiple places were doing the same thing to get the tile mode of a level,
so refactor it out.  This will make the shared resource helper transition
cleaner.

Acked-by: Rob Clark <robdclark@chromium.org>
2019-11-26 18:46:07 +00:00
Eric Anholt
6b09227ede freedreno: Introduce a fd_resource_layer_stride() helper.
This factors out a bit of duplicated code, but will also make the shared
resource layout transition process clearer.

Acked-by: Rob Clark <robdclark@chromium.org>
2019-11-26 18:46:07 +00:00
Rob Clark
9e9a26c768 freedreno: use rsc->slice accessor everywhere
This will make it easier to extract the slice table out into a layout
helper.

Acked-by: Rob Clark <robdclark@chromium.org>
2019-11-26 18:46:07 +00:00
Jonathan Marek
2da4a58ed9 etnaviv: support 3d/array/integer formats in texture descriptors
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2019-11-26 19:07:04 +01:00
Jonathan Marek
7806e058c9 etnaviv: blt: fix partial ZS clears with TS
If not all bits are cleared, then BLT needs to be given the current clear
value and not the new one.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2019-11-26 19:04:51 +01:00
Gert Wollny
e41958e344 r600: Disable eight bit three channel formats
Commit 0899bf55 made some deqp-gles3 tests related to RGB8 PBOs fail
on R600 because it exposed PIPE_FORMAT_R8G8B8_UNORM and R600 doesn't
propely handle this. Disabling this format also for buffers fixes the
issue.

In addition, disabling also the related RGB8 integer formats for buffers
fixes some deqp-gles3 tests:

  dEQP-GLES3.functional.texture.specification.teximage2d_pbo.rgb8ui_cube
  dEQP-GLES3.functional.texture.specification.texsubimage2d_pbo.rgb8i_2d
  dEQP-GLES3.functional.texture.specification.texsubimage2d_pbo.rgb8i_cube
  dEQP-GLES3.functional.texture.specification.texsubimage2d_pbo.rgb8ui_2d
  dEQP-GLES3.functional.texture.specification.texsubimage2d_pbo.rgb8ui_cube
  dEQP-GLES3.functional.texture.specification.teximage3d_pbo.rgb8i_2d_array
  dEQP-GLES3.functional.texture.specification.teximage3d_pbo.rgb8i_3d
  dEQP-GLES3.functional.texture.specification.teximage3d_pbo.rgb8ui_2d_array
  dEQP-GLES3.functional.texture.specification.teximage3d_pbo.rgb8ui_3d
  dEQP-GLES3.functional.texture.specification.texsubimage3d_pbo.rgb8i_2d_array
  dEQP-GLES3.functional.texture.specification.texsubimage3d_pbo.rgb8i_3d
  dEQP-GLES3.functional.texture.specification.texsubimage3d_pbo.rgb8ui_2d_array
  dEQP-GLES3.functional.texture.specification.texsubimage3d_pbo.rgb8ui_3d

Fixes: 0899bf55
  st/mesa: Map MESA_FORMAT_RGB_UNORM8 <-> PIPE_FORMAT_R8G8B8_UNORM

Closes #2118

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-11-26 09:28:52 +01:00
Kenneth Graunke
f6aa51103b iris: Update SURFACE_STATE addresses when setting sampler views
We may have replaced the backing storage for a texture buffer while it
was unbound, at which point iris_rebind_buffer would not have caught it
and updated it.  We need to ensure that the current resource's address
matches the one our SURFACE_STATE points at.  If not, update addresses
and re-upload the SURFACE_STATE.

Shader images and buffers do not suffer from this problem because we
re-stream the surface state on every set call, since there isn't a
created CSO object for those with a saved SURFACE_STATE.  Constant
buffers are also currently re-streamed (we pitch the SURFACE_STATE
on every set_constant_buffer call).  Surfaces would need this
treatment (as they're created CSOs) except that we never swap out
their backing storage today (we only do it for buffers), so it's OK
for now.

Fixes misrendering in Unreal 4 demos (Elemental, Matinee Fight Scene).
Huge thanks to Andrii Simiklit for tracking down the problem - it was
quite difficult to find!  Also fixes Andrii's new Piglit test for the
bug, 'arb_texture_buffer_object-re-init'.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1365
2019-11-25 15:54:54 -08:00
Kenneth Graunke
060a2c52fa iris: Maintain CPU-side SURFACE_STATE copies for views and surfaces.
When replacing the backing storage for texture buffers, image buffers,
and so on, we may need to update the "Surface Base Address" field in
any corresponding SURFACE_STATE.  This is easier to accomplish if we
have a copy on the CPU - we can just compare the current field, update
it, and re-upload.

This patch adds a CPU-side copy to the new iris_surface_state wrapper
struct, and reworks allocation and upload to fill things out on the
CPU copy first, then upload that to the GPU when finished.

This will be necessary to fix iris_invalidate_resource bugs shortly.

Technically, we never replace the backing storage for pipe_surfaces
(render targets), so we don't need to make this change there.  However,
it's nice to have surfaces, sampler views, and image views handled
similarly.  Plus, if we ever wanted to swap out backing storage for
busy textures, we'd need this infrastructure.

v2: Properly free memory (caught by Andrii Simiklit)
2019-11-25 15:54:54 -08:00
Kenneth Graunke
2b09e818dc iris: Create an "iris_surface_state" wrapper struct
Today, we only have a state reference to the GPU buffer containing our
uploaded SURFACE_STATEs.  However, we're going to want a CPU-side copy
soon.  Making a wrapper struct means we can talk about both together,
and also put both in the field called "surface_state".
2019-11-25 15:54:54 -08:00
Kenneth Graunke
4c1f81ad62 iris: Drop 'old_address' parameter from iris_rebind_buffer
We can just compare the VERTEX_BUFFER_STATE address field to the
current BO's address.  When calling rebind, we've already updated
the resource to the new buffer, but the state will have the old
address.
2019-11-25 15:54:54 -08:00
Kenneth Graunke
518be59c1a iris: Stop mutating the resource in get_rt_read_isl_surf().
Mutating fields of global resources is generally not safe, and the only
reason we were doing it was to avoid passing an extra parameter to
the fill_surface_state helper.
2019-11-25 15:54:54 -08:00