radeonsi/nir: don't rely on data.patch for tess factors

GLCTS SPIR-V tests have this issue.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
This commit is contained in:
Marek Olšák 2019-11-06 20:18:23 -05:00
parent 59daac686d
commit 268e42e4f8

View file

@ -1341,7 +1341,6 @@ static void si_nir_store_output_tcs(struct ac_shader_abi *abi,
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
struct tgsi_shader_info *info = &ctx->shader->selector->info;
const unsigned component = var->data.location_frac;
const bool is_patch = var->data.patch;
unsigned driver_location = var->data.driver_location;
LLVMValueRef dw_addr, stride;
LLVMValueRef buffer, base, addr;
@ -1357,6 +1356,10 @@ static void si_nir_store_output_tcs(struct ac_shader_abi *abi,
if (!param_index)
param_index = LLVMConstInt(ctx->i32, const_index, 0);
const bool is_patch = var->data.patch ||
var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
assert((name == TGSI_SEMANTIC_PATCH ||
name == TGSI_SEMANTIC_TESSINNER ||
name == TGSI_SEMANTIC_TESSOUTER) == is_patch);