Marek Olšák
b11ebbe2f6
amd: enable displayable DCC for everything newer than Navi1x
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6100 >
2020-07-28 19:47:10 +00:00
Marek Olšák
abed921ce7
amd: add support for Navy Flounder
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6100 >
2020-07-28 19:47:10 +00:00
Marek Olšák
037b84df11
amd: rename SIENNA -> SIENNA_CICHLID
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6100 >
2020-07-28 19:47:10 +00:00
Bas Nieuwenhuizen
fb5237910b
amd: Add detection of timeline semaphore support.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5600 >
2020-07-23 17:36:46 +00:00
Marek Olšák
89d2dac554
radeonsi: enable preemption if the kernel enabled it
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798 >
2020-07-22 12:08:33 -04:00
Marek Olšák
95c9048591
radeonsi: add debug code for register shadowing
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798 >
2020-07-22 12:08:33 -04:00
Marek Olšák
5a5467ccc8
ac: add tables for CP register shadowing
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798 >
2020-07-22 12:08:19 -04:00
Marek Olšák
dc3dade475
ac: add helper ac_get_register_name
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798 >
2020-07-22 12:08:19 -04:00
Pierre-Eric Pelloux-Prayer
87ecfdfbf0
ac/surface: adapt surf_size when modifying surf_pitch
...
Otherwise we might get VM_L2_PROTECTION_FAULT_STATUS errors.
Fixes: 8275dc1ed5 ("ac/surface: fix epitch when modifying surf_pitch")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5841 >
2020-07-20 10:32:44 +00:00
Bas Nieuwenhuizen
862d85a63f
amd/addrlib: Clean up unused colorFlags argument
...
Cleanup.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5865 >
2020-07-18 00:28:35 +00:00
Bas Nieuwenhuizen
a37aeb128d
amd/common: Cache intra-tile addresses for retile map.
...
However complicated DCC addressing is it is still based on tiles.
If we have the intra-tile offsets + tile dimensions we can expand
that to the full image ourselves.
Behavior around ~1080p on a 2500U:
old:
30-60 ms on every miss
new:
5 ms initally (miss in the tile cache)
<0.5 ms afterwards
The most common case is that the tile cache only contains data for
2 tiles, which for Raven/Renoir/Navi14 will be 4 KiB each, so the
size increase is fairly modest.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5865 >
2020-07-18 00:28:35 +00:00
Marek Olšák
55cf97f56e
Revert "ac/surface: require that gfx8 doesn't have DCC in order to be displayable"
...
This reverts commit 7406ea37e6 .
Fixes: 7406ea37 "ac/surface: require that gfx8 doesn't have DCC in order to be displayable"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3190
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5780 >
2020-07-08 19:16:15 +00:00
Marek Olšák
2866a6f78d
ac/gpu_info: fix num_physical_sgprs_per_simd for gfx10
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524 >
2020-06-30 10:56:41 +00:00
Marek Olšák
c7680625c3
ac,winsys/amdgpu: align IBs the same as the kernel
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603 >
2020-06-26 07:02:57 +00:00
Marek Olšák
556f4458fe
amd: add proper definitions for NOP packets
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603 >
2020-06-26 07:02:57 +00:00
Samuel Pitoiset
013d096d15
ac: add ac_choose_spi_color_formats() to common code
...
It's similar between RADV and RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5436 >
2020-06-15 08:16:07 +02:00
Marek Olšák
0b3e344212
ac/surface: don't free dcc_retile_map on failure
...
because the hash table now owns it.
Fixes: bd553f0546 - ac/surface: cache DCC retile maps (v2)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424 >
2020-06-11 10:01:57 +00:00
Marek Olšák
56f2a77a41
ac/surface: enable DCC for the first level in the mip tail on gfx10
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424 >
2020-06-11 10:01:57 +00:00
Marek Olšák
7406ea37e6
ac/surface: require that gfx8 doesn't have DCC in order to be displayable
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424 >
2020-06-11 10:01:57 +00:00
Marek Olšák
374f6d568f
ac/surface: don't set is_displayable if displayable DCC is missing
...
If flags.display isn't set, then displayable DCC will not be computed, so
is_displayable will always be false.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424 >
2020-06-11 10:01:57 +00:00
Marek Olšák
bd553f0546
ac/surface: cache DCC retile maps (v2)
...
This reduces overhead when resizing windows or when allocating
similar image sizes over and over again.
v2: optimize the memory footprint of the cache
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5398 >
2020-06-10 15:35:46 +00:00
Marek Olšák
4cf674c8f7
ac/surface: add a wrapper structure to hold ADDR_HANDLE
...
and more things in the future.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5398 >
2020-06-10 15:35:46 +00:00
Marek Olšák
e6996d6fbd
amd/addrlib: remove unused members of ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5398 >
2020-06-10 15:35:46 +00:00
Marek Olšák
a99f4d5382
amd/addrlib: don't recompute DCC info for every ComputeDccAddrFromCoord call
...
This decreases the DCC retile map overhead from 23% to 18%.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5398 >
2020-06-10 15:35:46 +00:00
Marek Olšák
a1b9eb62f6
ac/surface: don't recompute the DCC retile map for imported textures
...
The retile map is not used in this case, and the retile map computation
takes 39% of CPU time when resizing a window.
This brings it down to 23%.
The dcc_retile_use_uint16 setting has to be derived from DCC sizes.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5398 >
2020-06-10 15:35:46 +00:00
Pierre-Eric Pelloux-Prayer
8275dc1ed5
ac/surface: fix epitch when modifying surf_pitch
...
This is needed otherwise it can cause bad rendering of UYVY files.
The align(..., 256 / surf->bpe) constraint comes from addrlib.
Fixes: 69aadc4933 ("radeonsi: fix surf_pitch for subsampled surface")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5314 >
2020-06-10 09:11:23 +00:00
Pierre-Eric Pelloux-Prayer
e9826a1bb2
ac/surface: set SCANOUT if surf->is_displayable
...
Fixes: ba10fb3f7f ("radeonsi: preserve the scanout flag for shared resources on gfx9 and gfx10")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5314 >
2020-06-10 09:11:23 +00:00
Marek Olšák
9538b9a68e
radeonsi: add support for Sienna Cichlid
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383 >
2020-06-09 16:17:36 +00:00
Marek Olšák
789cdab3b6
ac: align num_vgprs for gfx10.3
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383 >
2020-06-09 16:17:36 +00:00
Marek Olšák
a54bcb9429
radeonsi: enable larger SDMA clears and copies on gfx10.3
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383 >
2020-06-09 16:17:36 +00:00
Marek Olšák
abe89e1329
ac/surface: add displayable DCC code for gfx10.3
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383 >
2020-06-09 16:17:36 +00:00
Marek Olšák
a23802bcb9
ac,radeonsi: start adding support for gfx10.3
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383 >
2020-06-09 16:17:36 +00:00
Marek Olšák
ceaf848c56
radeonsi: enable ARB_sparse_buffer
...
This seems to be working now, but it wasn't working before.
I don't know what fixed this. Tested on Raven and Navi14.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5402 >
2020-06-09 16:00:38 +00:00
Rhys Perry
1234faa7bf
ac/gpu_info, radv: set max_wave64_per_simd to 20 on GFX10
...
Fixes RADV max_waves reporting for GFX10
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5356 >
2020-06-08 10:26:59 +00:00
Bas Nieuwenhuizen
63db31fdfc
amd/common: Add total alignment calculation.
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194 >
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen
ffae3589c9
radv: Rely on ac_surface for avoiding cmask for linear images.
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194 >
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen
b5488a863c
radv: Enforce the contiguous memory for DCC layers in ac_surface.
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5194 >
2020-06-05 13:27:55 +00:00
Bas Nieuwenhuizen
b351a50763
radeonsi: Define gfx10_format in the common header.
...
So we don't have to have multiple definitions of the struct when
sharing with radv.
While at it put the table properly in a C file so we don't have to
deal with multiple definitions, and the struct definition isn't
in generated source.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5291 >
2020-06-03 00:17:00 +00:00
Bas Nieuwenhuizen
c98e52f88a
amd/common,radeonsi: Move gfx10_format_table to common.
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5291 >
2020-06-03 00:17:00 +00:00
Marek Olšák
116ec85012
ac: rename has_double_rate_fp16 -> has_packed_math_16bit
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5003 >
2020-06-02 16:29:25 -04:00
Dylan Baker
a8e2d79e02
meson: use gnu_symbol_visibility argument
...
This uses a meson builtin to handle -fvisibility=hidden. This is nice
because we don't need to track which languages are used, if C++ is
suddenly added meson just does the right thing.
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4740 >
2020-06-01 18:59:18 +00:00
James Zhu
a91306677c
ac/gpu_info: Correct Acturus cu bitmap
...
The cu bitmap in amd gpu info structure is
4x4 size array, and it's usually suitable for Vega
ASICs which has 4*2 SE/SH layout.
But for Arcturus, SE/SH layout is changed to 8*1.
To mostly reduce the impact, we make it compatible
with current bitmap array as below:
SE4,SH0 --> cu_bitmap[0][1]
SE5,SH0 --> cu_bitmap[1][1]
SE6,SH0 --> cu_bitmap[2][1]
SE7,SH0 --> cu_bitmap[3][1]
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5212 >
2020-05-27 10:49:02 -04:00
Marek Olšák
2cf46f2e3d
ac/gpu_info: replace num_good_cu_per_sh with min/max_good_cu_per_sa
...
Perf counters use the new max number.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5184 >
2020-05-26 06:00:54 -04:00
Marek Olšák
3509d3bd53
ac: update register and packet definitions for preemption
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095 >
2020-05-23 03:45:07 -04:00
Marek Olšák
8db739880a
ac/surface: don't compute single-sample CMASK if it's unaligned
...
Displayable DCC can cause this and fail the assertion later.
Fixes: cf61f635ff
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095 >
2020-05-23 03:44:44 -04:00
Marek Olšák
21504eab78
ac/gpu_info: compute the best safe IB alignment
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095 >
2020-05-23 03:44:44 -04:00
Serge Martin
9c839e6394
amd/common: Fix incorrect use of asprintf instead of vasprintf
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2020-05-11 12:54:41 +02:00
Pierre-Eric Pelloux-Prayer
506f5d9bda
ac/surface: remove shadowing declaration
...
Fixes: 7691de0dce ("ac/surface,radeonsi: move the set/get_bo_metadata code to ac_surface.c")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2929
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4983 >
2020-05-11 08:15:15 +00:00
Marek Olšák
1a59590e5d
ac/surface: fix broken pitch override on gfx8
...
Fixes: 441eaef6a9 - amd: unify code for overriding offset and stride for imported buffers
Closes : #2920
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4968 >
2020-05-08 16:37:10 -04:00
Marek Olšák
c9e7362402
ac/surface: override all offsets including metadata offsets
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863 >
2020-05-07 20:13:41 +00:00