fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-05 16:08:04 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

ac/gpu_info: Correct Acturus cu bitmap

Browse source 
The cu bitmap in amd gpu info structure is
4x4 size array, and it's usually suitable for Vega
ASICs which has 4*2 SE/SH layout.
But for Arcturus, SE/SH layout is changed to 8*1.
To mostly reduce the impact, we make it compatible
with current bitmap array as below:
	SE4,SH0 --> cu_bitmap[0][1]
	SE5,SH0 --> cu_bitmap[1][1]
	SE6,SH0 --> cu_bitmap[2][1]
	SE7,SH0 --> cu_bitmap[3][1]

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5212>
This commit is contained in:
James Zhu 2020-05-26 09:28:41 -04:00
parent 296c04d78c
commit a91306677c
1 changed files with 13 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

14
src/amd/common/ac_gpu_info.c
View file

@ -619,7 +619,19 @@ bool ac_query_gpu_info(int fd, void *dev_p,
info->num_good_compute_units = 0;
for (i = 0; i < info->max_se; i++) {
for (j = 0; j < info->max_sh_per_se; j++) {
info->cu_mask[i][j] = amdinfo->cu_bitmap[i][j];
/*
* The cu bitmap in amd gpu info structure is
* 4x4 size array, and it's usually suitable for Vega
* ASICs which has 4*2 SE/SH layout.
* But for Arcturus, SE/SH layout is changed to 8*1.
* To mostly reduce the impact, we make it compatible
* with current bitmap array as below:
* SE4,SH0 --> cu_bitmap[0][1]
* SE5,SH0 --> cu_bitmap[1][1]
* SE6,SH0 --> cu_bitmap[2][1]
* SE7,SH0 --> cu_bitmap[3][1]
*/
info->cu_mask[i%4][j+i/4] = amdinfo->cu_bitmap[i%4][j+i/4];
info->num_good_compute_units +=
util_bitcount(info->cu_mask[i][j]);
}