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Author SHA1 Message Date
Georg Lehmann
ad80b554f4 spirv: use feq for OpIsInf
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This effectively reverts fcca6a83cd because feq was clarified to be ordered
when used with exact and without fast math flags.

It's common for HW to only have free abs for floating point instructions.

Foz-DB Navi21:
Totals from 63 (0.08% of 80065) affected shaders:
Instrs: 337027 -> 336667 (-0.11%); split: -0.12%, +0.02%
CodeSize: 1846752 -> 1845000 (-0.09%); split: -0.13%, +0.03%
Latency: 3401087 -> 3400633 (-0.01%); split: -0.04%, +0.03%
InvThroughput: 847299 -> 845939 (-0.16%); split: -0.19%, +0.03%
VClause: 7693 -> 7694 (+0.01%)
Copies: 45175 -> 45240 (+0.14%); split: -0.12%, +0.27%
PreSGPRs: 3555 -> 3553 (-0.06%)
PreVGPRs: 4565 -> 4564 (-0.02%)
VALU: 225473 -> 225245 (-0.10%); split: -0.13%, +0.03%
SALU: 44735 -> 44625 (-0.25%)

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35437>
 2025-06-11 18:34:21 +00:00
Rob Clark
cd4f6caa0d vtn: Handle non-32b tex dests 
With cl_khr_fp16 we can get texture instructions w/ f16 dest.  Not all
drivers handle this, so convert to 32b dest and insert alu conversion to
the requested type.  Drivers that can handle f16 texture loads would
fold away the extra conversion with nir_opt_16bit_tex_image.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35470>
 2025-06-11 17:48:10 +00:00
Karol Herbst
a482ec7f05 clc: fix DiagnosticOptions related build failure with llvm-21 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13257
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35399>
 2025-06-10 13:16:29 +02:00
Karol Herbst
392ad203eb clc: use new createTargetMachine overload with llvm-21 
The old one is deprecated, so let's move and silence the warning.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35399>
 2025-06-10 13:16:16 +02:00
Mel Henning
42ba492b88 compiler/rust/bitset: BitSetStream takes Key type 
This was an oversight when BitSet was parameterized on a key type.
BitSetStream needs to also take a key type to prevent users from mixing
different key types in binary operators. Constraining this makes BitSet
usage more type safe.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35328>
 2025-06-09 21:49:29 +00:00
Marek Olšák
f2c48652da nir: add shader_info::tess::tcs_*outputs_read_by_tes* 
Gather no_varying for AMD.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
 2025-06-07 16:29:39 +00:00
Marek Olšák
a59464b6e3 radv,radeonsi: precompute and pass TCS per-vertex output stride via a user SGPR 
It's a stride of 1 output, which isn't 16. It's 16 * num_threads,
aligned to 256.

tcs_offchip_layout has 5 unused bits, so let's use them.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
 2025-06-07 16:29:39 +00:00
Marek Olšák
534b282573 ac/nir/tess: adjust memory layout of TCS outputs to have aligned store offsets 
There is a comment that explains it.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
 2025-06-07 16:29:38 +00:00
Mel Henning
5f0e4a7605 nak,nir: Stop using std::mem::zeroed() 
We can replace all of these with safe alternatives if we ask bindgen for
implementations of Default.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35390>
 2025-06-06 18:58:35 +00:00
Mel Henning
d15b5fadbb nir/divergence_analysis: Update LCSSA comment 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35271>
 2025-06-06 18:15:05 +00:00
Lionel Landwerlin
49def5ca9d spirv: bump headers 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35382>
 2025-06-06 14:38:17 +00:00
Karol Herbst
33fb1eca3e nir/scale_fdiv: handle fp16 fdiv 
Not strictly scaling, but we upcast fo fp32, do the fdiv there and cast
back again.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34053>
 2025-06-05 13:17:27 +00:00
Karol Herbst
aa5a981b83 vtn/opencl: support fp16 builtins 
If we can't find an appropiate builtin in the libclc library, we add our
own wrapper at runtime executing the op in fp32 space.

Libclc has variying support for fp16 opcodes and with a libclc prior
llvm-19 it does not work as good as with the newer one.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34053>
 2025-06-05 13:17:27 +00:00
Karol Herbst
ca01635075 clc: support fp16 spec constants 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34053>
 2025-06-05 13:17:27 +00:00
Mike Blumenkrantz
208450fc57 nir/lower_to_scalar: fix opt_varying with output reads 
no_varying cannot be used to eliminate stores on locations which may
be subsequently read

Fixes: 0058989357 ("nir/lower_io_to_scalar: don't create output stores that have no effect")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35325>
 2025-06-04 18:21:16 +00:00
Marek Olšák
c3034fa82c amd: replace most u_bit_consecutive* with BITFIELD_MASK/RANGE
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Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35346>
 2025-06-04 17:46:38 +00:00
Lionel Landwerlin
978933c015 nir/opt_algebraic: extend lowering for (i|u)bitfield_extract 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35334>
 2025-06-04 16:28:39 +00:00
Ashley Smith
c5500cd12f mesa: Add support for GL_EXT_shader_realtime_clock 
This is similar to ARB_shader_clock

Signed-off-by: Ashley Smith <ashley.smith@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34345>
 2025-06-04 14:49:00 +00:00
Georg Lehmann
1c4070f3e9 nir/opt_if: limit rewrite_uniform_uses iand recursion 
https://github.com/doitsujin/dxvk/issues/4970 has a shader
where unrolled loops caused large iand chains and if we don't
limit this  we won't finish compiling in reasonable time.

Cc: mesa-stable

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35312>
 2025-06-04 10:49:05 +00:00
Georg Lehmann
eaeaf9554d nir/opt_if: don't replace constant uses with other uniform values 
If constant folding wasn't run, this could replace constant uses with different
constants.

Additional, it could also create worse code for "if (subgroupXor(1) == 1)".

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13281

Cc: mesa-stable

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35312>
 2025-06-04 10:49:05 +00:00
Samuel Pitoiset
226b0e28db nir: generalize bitfield insert/extract sizes 
Original patch from Alyssa Rosenzweig

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35209>
 2025-06-04 09:37:53 +00:00
Samuel Pitoiset
2474118a06 spirv: disable mediump for bitfield insert/extract 
This prevents a regression with the next change that generalizes
bitfield insert/extract sizes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35209>
 2025-06-04 09:37:53 +00:00
Caio Oliveira
542836afe5 intel: Don't require dpas_intel src2 to match destination 
With upcoming configurations, the number of elements in the src2
slice might not match the destination.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35301>
 2025-06-03 21:31:23 +00:00
Rhys Perry
dd45bf5bce nir/load_store_vectorize: stabilize entry sort 
I think this was unlikely to cause issues, even if the qsort()
implementation is unstable.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35255>
 2025-06-03 09:45:01 +00:00
Rhys Perry
397920c16e nir: fix left shift of negative value in ibfe constant folding 
Fixes "left shift of negative value -128" with parallel_rdp/00f93a9497dfbb3b
and UBSan.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35255>
 2025-06-03 09:45:01 +00:00
Rhys Perry
78aae4b1ba nir: fix signed overflow in pack_half_2x16 constant folding 
Without this cast, the left shift is promoted to 'int'.

Fixes "left shift of 50432 by 16 places cannot be represented in type 'int'"
with horizon_zero_dawn/001064f580f8e3be and UBSan.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35255>
 2025-06-03 09:45:01 +00:00
Rhys Perry
6852538ba0 nir: fix unpack_unorm_2x16/unpack_snorm_2x16 constant folding 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Backport-to: 25.0
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35255>
 2025-06-03 09:45:01 +00:00
Marek Olšák
bf2ed20eb9 nir: remove unused nir_io_semantics::invariant
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Acked-by: Alyssa on IRC
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35256>
 2025-06-02 23:08:58 +00:00
Marek Olšák
44fcda9631 nir/opt_clip_cull_const: support GS 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35256>
 2025-06-02 23:08:58 +00:00
Marek Olšák
6677d087c0 nir/xfb_info: add new fields to describe 16-bit XFB better 
for drivers that need this information

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35256>
 2025-06-02 23:08:58 +00:00
Marek Olšák
7b70b419b5 nir: always index SSA defs before printing 
This makes the output more readable.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35256>
 2025-06-02 23:08:58 +00:00
Marek Olšák
cf94ae8544 nir: change the type of shader_info::patch_* fields to 32 bits 
Patch outputs only use 32 bits.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35256>
 2025-06-02 23:08:58 +00:00
Jesse Natalie
f0dde6ca7f nir_gather_output_deps: Fix incorrect enum in switch 
Cc: mesa-stable
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35247>
 2025-05-30 17:04:18 +00:00
Lionel Landwerlin
f0e18c475b intel: remove GRL/intel-clc 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35227>
 2025-05-29 20:17:13 +00:00
Samuel Pitoiset
cecf6675be nir/lower_int64: add bitfield_extract lowering 
This will be used by RADV for ACO/LLVM.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35187>
 2025-05-29 08:45:40 +02:00
Alyssa Rosenzweig
d696b19dd0 nir/lower_int64: add bitfield_reverse lowering 
now that we can represent 64-bit bitfield_reverse in NIR, we need a lowering for
it as well.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35198>
 2025-05-28 16:29:30 +00:00
Alyssa Rosenzweig
c3fb0645d8 nir/lower_alu: compact bitcount lowering 
while in the area.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35198>
 2025-05-28 16:29:30 +00:00
Alyssa Rosenzweig
759dc70bde nir: generalize bitfield_reverse bit size 
No reason we can't reverse other bit sizes, we just need to generalize the
constant folding & bit size lowering.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35198>
 2025-05-28 16:29:30 +00:00
Marek Olšák
45cbd60c3b glsl,gallium: add an option not to lower mediump tex & image dst 
ACO doesn't support it for gfx8.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Dieter Nützel Dieter@nuetzel-hh.de on gfx8 (Polaris 20)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34959>
 2025-05-28 11:01:12 +00:00
Marek Olšák
bd5d623674 glsl: fix sampler and image type checking in lower_precision 
Use the param type, not the referenced variable. The referenced variable
can be a structure, which wouldn't be recognized as a sampler or image.

Fixes: 733bee57eb - glsl: lower samplers with highp coordinates correctly

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Dieter Nützel Dieter@nuetzel-hh.de on gfx8 (Polaris 20)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34959>
 2025-05-28 11:01:12 +00:00
Marek Olšák
35c76bc7f7 nir/tcs_info: use range analysis to determine the range of tess levels 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35195>
 2025-05-28 06:46:56 +00:00
Marek Olšák
24c3f30e4a nir/tcs_info: gather which patch outputs are only read/written by invoc 0 
Tested thoroughly by a shader test.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35195>
 2025-05-28 06:46:56 +00:00
Marek Olšák
a3632d7d88 nir/tcs_info: gather for all patch outputs whether they're written by all invocs 
This substantially rewrites the pass. It also makes it easier to read.
Tested thoroughly by a shader test.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35195>
 2025-05-28 06:46:56 +00:00
Lorenzo Rossi
2c0d0bad01 nak: Remove unused intrinsic image_load_raw_nv 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34975>
 2025-05-28 01:47:19 +00:00
Lorenzo Rossi
5fbcdd6e32 nir,nak: Add NV-specific image intrinsics 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34975>
 2025-05-28 01:47:19 +00:00
Adam Jackson
4b1c824b67 vtn/opencl: Handle OpenCLstd_F{Min,Max}_common 
Normal fmin doesn't make any promises about NaN, common additionally
doesn't make any promises about infinities. Would be nice to hook that
up to codegen but lowering them to normal works for now.

Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34941>
 2025-05-28 01:08:20 +00:00
Adam Jackson
92f07860a4 vtn: (Silently) handle FunctionParameterAttributeNo{Capture,Write} 
Silences a few thousand warnings in sycl/test-e2e

Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34941>
 2025-05-28 01:08:20 +00:00
Adam Jackson
fd7589d775 vtn: Handle SPV_KHR_uniform_group_instructions 
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34941>
 2025-05-28 01:08:20 +00:00
Karol Herbst
f5a9a80f29 clc: wire up cl_khr_kernel_clock 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35179>
 2025-05-27 19:57:28 +00:00
Lorenzo Rossi
47f6c74b71 nir,nak: Add KeplerB shared atomics intrinsics and lowering 
Kepler cards do not support shared atomic operations directly, but they
have special ldslk and stsul that can implement mutex locks on
addresses. Shared atomics can be lowered into operations in mutexes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35028>
 2025-05-26 16:29:05 +00:00