Commit graph

98299 commits

Author SHA1 Message Date
Fabian Bieler
9bdb5457f4 glsl: Match order of gl_LightSourceParameters elements.
spotExponent and spotCosCutoff were swapped in the
gl_builtin_uniform_element struct.
Now the order matches across gl_builtin_uniform_element,
glsl_struct_field and the spec.

Reviewed-by: Brian Paul <brianp@vmware.com>
2017-12-03 21:14:14 -07:00
Fabian Bieler
c3ee464d7a glsl: Fix gl_NormalScale.
GLSL shaders can access the normal scale factor with the built-in
gl_NormalScale.  Mesa's modelspace lighting optimization uses a different
normal scale factor than defined in the spec.  We have to take care not
to use this factor for gl_NormalScale.

Mesa already defines two seperate states: state.normalScale and
state.internal.normalScale.  The first is used by the glsl compiler
while the later is used by the fixed function T&L pipeline.  Previously
the only difference was some component swizzling.  With this commit
state.normalScale always uses the normal scale factor for eyespace
lighting.

Reviewed-by: Brian Paul <brianp@vmware.com>
2017-12-03 21:13:46 -07:00
Timothy Arceri
27888977c1 st/glsl_to_nir/radeonsi: enable gs support for nir backend
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:19 +11:00
Timothy Arceri
ccd1810bba ac: add si_nir_load_input_gs() to the abi
V2: make use of driver_location and don't expose NIR to the ABI.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:19 +11:00
Timothy Arceri
caf15ce670 ac: move build_varying_gather_values() to ac_llvm_build.h and expose
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:19 +11:00
Timothy Arceri
6fd6cb6616 ac: add basic nir -> llvm type helper
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
4184e7c417 radeonsi: create si_llvm_load_input_gs()
This creates a common function that can be shared by the tgsi
and nir backends.

v2: use LLVMBuildBitCast() directly

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
c4c8df94bd radeonsi: pass llvm type to lds_load()
v2: use LLVMBuildBitCast() directly

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
650126f3e0 radeonsi: add llvm_type_is_64bit() helper
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
7ef1e42c14 radeonsi: pass llvm type to si_llvm_emit_fetch_64bit()
v2: use LLVMBuildBitCast() directly

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
e51ecbe980 radeonsi: add nir support for gs epilogue
v2: add emit_gs_epilogue() helper function to reduce duplication.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
73918b3172 radeonsi: add nir support for es epilogue
v2: make use of existing si_tgsi_emit_epilogue()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
204f547852 radeonsi: add nir support for ls epilogue
v2: make use of existing si_tgsi_emit_epilogue()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
164b6d4aeb st/glsl_to_nir: add gs support to st_nir_assign_var_locations()
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
c86baf71fb st/glsl_to_nir: use nir_lower_io_arrays_to_elements() to lower arrays
This pass is more fully featured, it supports geom and tess shaders.
It also supports interpolation intrinsics.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
d99c7e0ff1 nir: allow builin arrays to be lowered
Galliums nir drivers expect this to be done.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
2bc49ac3e6 nir: add array lowering function that assumes there are no indirects
The gallium glsl->nir pass currently lowers away all indirects on both inputs
and outputs. This fuction allows us to lower vs inputs and fs outputs and also
lower things one stage at a time as we don't need to worry about indirects
on the other side of the shaders interface.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
f13790c92f radv: enable nir varying array splitting
Acked-by: Dave Airlie <airlied@redhat.com>
2017-12-04 12:52:18 +11:00
Timothy Arceri
6648bd68fd st/glsl_to_nir: enable NIR link time opts
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-04 09:10:30 +11:00
Timothy Arceri
c16a0e11d3 radeonsi/nir: add support for packed inputs
Because NIR can create non vec4 variables when implementing component
packing we need to make sure not to reprocess the same slot again.

Also we can drop the fs_attr_idx counter and just use driver_location.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-04 09:10:30 +11:00
Timothy Arceri
c3a5d74377 st/glsl_to_nir: move some calls out of st_glsl_to_nir_post_opts()
NIR component packing will be inserted between these calls and the
calling of st_glsl_to_nir_post_opts().

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-04 09:10:30 +11:00
Timothy Arceri
90abaf8a21 st/glsl_to_nir: call some lowering passes earlier
This is required so that we can enbale NIR linking optimisations.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-04 09:10:30 +11:00
Timothy Arceri
bd98b8c74e st/glsl_to_nir: add basic NIR opt loop helper
We need to be able to do these NIR opts in the state tracker
rather than the driver in order for the NIR linking opts to
be useful.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-04 09:10:30 +11:00
Timothy Arceri
a9ac01b96f st/glsl_to_nir: make st_glsl_to_nir() static
Here we also move the extern C functions to the bottom of the file.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-04 09:10:30 +11:00
Timothy Arceri
d586f39cb0 st/glsl_to_nir: split the st_glsl_to_nir() function in two
We want to be able to generate NIR then apply NIR optimisations.
Once the optimisations are done we can then apply the new post opt
function which assigns uniforms etc based on the optimised IR.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-04 09:10:30 +11:00
Timothy Arceri
d38f99baec st/glsl_to_nir: create set_st_program() helper
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-04 09:10:30 +11:00
Timothy Arceri
da953b641d st/glsl: move nir linking loop to new function st_link_nir()
This will allow us to refactor linking and include some nir link
time optimisations.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-04 09:10:30 +11:00
Timothy Arceri
2a35021bc6 nir: fix support for scalar arrays in nir_lower_io_types()
This was just recreating the same vector type we alreay had and
hitting an assert for scalars.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-04 09:10:30 +11:00
Timothy Arceri
9530b786d2 st/glsl_to_nir: add st_nir_assign_var_locations() helper
This avoids packed varyings being assigned different driver locations.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-04 09:10:30 +11:00
Timothy Arceri
aecb9bec87 radv: enable nir component packing
SaschaWillems Vulkan demo tessellation:

~4000fps -> ~4600fps

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-12-04 09:10:30 +11:00
Timothy Arceri
1c9c42d16b nir: add varying component packing helpers
v2: update shader info input/output masks when pack components
v3: make sure interpolation loc matches, this is required for the
    radeonsi NIR backend.
v4: 33dca36f4f fixed nir_gather_info to update outputs_read
    correct, make sure we also adjust this correctly when
    packing components.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v3)
2017-12-04 09:10:30 +11:00
Timothy Arceri
c797bc6aa7 nir: add varying array splitting pass
V2:
 - fix matrix support, non-array matrices were being skipped in v1

v3:
 - handle lowering of tcs output loads correctly
 - correctly mark indirect locations for either in or out not both
   when processing a stage.
 - use nir_src_copy() when lowering stores.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-04 09:10:30 +11:00
Rob Clark
11efe42a73 freedreno/ir3: relax barriers
Instructions with no barrier_class can move wrt. an EVERYTHING barrier.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-12-03 14:17:41 -05:00
Rob Clark
48eef0c182 freedreno/ir3: all mem instructions have WAR hazzard
It isn't just load instructions that have write-after-read hazzard.

Fixes stk gaussian blur compute shaders.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-12-03 14:17:41 -05:00
Rob Clark
e6c6495d3a freedreno: add debug option to force emulated indirect
Useful mostly for debugging indirect draw.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-12-03 14:17:41 -05:00
Rob Clark
f93f2f7b1e freedreno: also mark draw-indirect buffer as read
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-12-03 14:17:41 -05:00
Rob Clark
4b1d0d2844 freedreno: small cleanups
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-12-03 14:17:41 -05:00
Rob Clark
91730fb0ff freedreno: avoid unneccessary batch flush
In some cases we can end up trying to add a write dependency on ourself,
which shouldn't trigger a flush.

Avoids an extra couple flushes per from in stk.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-12-03 14:17:41 -05:00
Rob Clark
4ab6ab8036 freedreno: avoid mem2gmem for invalidated buffers
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-12-03 14:17:41 -05:00
Rob Clark
2fcf6faa06 freedreno: deferred flush support
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-12-03 14:17:41 -05:00
Rob Clark
15ebf387fc freedreno: rework fence tracking
ctx->last_fence isn't such a terribly clever idea, if batches can be
flushed out of order.  Instead, each batch now holds a fence, which is
created before the batch is flushed (useful for next patch), that later
gets populated after the batch is actually flushed.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-12-03 14:17:40 -05:00
Rob Clark
deb57fb237 freedreno: proper locking for iterating dependent batches
In transfer_map(), when we need to flush batches that read from a
resource, we should be holding screen->lock to guard against race
conditions.  Somehow deferred flush seems to make this existing
race more obvious.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-12-03 14:17:40 -05:00
Rob Clark
ef6313ffd3 freedreno/a5xx: correct max_indicies for indirect draws
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-12-03 14:17:40 -05:00
Jason Ekstrand
e19c623128 spirv: Convert the supported_extensions struct to spirv_options
This is a bit more general and lets us pass additional options into the
spirv_to_nir pass beyond what capabilities we support.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
2017-12-02 08:09:11 -08:00
Jason Ekstrand
6bd876dcaa spirv: Only emit functions which are actually used
Instead of emitting absolutely everything, just emit the few functions
that are actually referenced in some way by the entrypoint.  This should
save us quite a bit of time when handed large shader modules containing
many entrypoints.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
2017-12-02 08:07:35 -08:00
Jason Ekstrand
f5aad36d2e spirv: Drop the impl field from vtn_builder
We have a nir_builder and it has an impl field.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
2017-12-02 08:07:35 -08:00
Jordan Justen
fc033742d2 i965: Serialize nir later in the linking process
Fixes MESA_GLSL=cache_fb with piglit
tests/spec/glsl-1.50/execution/geometry/clip-distance-vs-gs-out.shader_test

Fixes: 0610a624a1 i965/link: Serialize program to nir after linking for shader cache
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103988
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-12-01 23:17:44 -08:00
Marc Dietrich
d93fabb013 configure: avoid testing for negative compiler options
gcc seems to always accept unsupported negative compiler warning options:

echo "int i;" | gcc -c -xc -Wno-bob - # no error
echo "int i;" | gcc -c -xc -Walice -  # unsupported compiler option

Inverting the options fixes the tests.

V2: fix options in meson build

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
2017-12-01 17:09:42 -08:00
Eric Anholt
0ed952c7e9 broadcom/vc4: Use a single-entry cached last_hindex value.
Since almost all BOs will be in one CL at a time, this cache will almost
always hit except for the first usage of the BO in each CL.

This didn't show up as statistically significant on the minetest trace
(n=340), but if I lop off the throttled lobe of the bimodal distribution,
it very clearly does (0.74731% +/- 0.162093%, n=269).
2017-12-01 15:37:28 -08:00
Eric Anholt
230e646a40 broadcom/vc4: Decompose single QUADs to a TRIANGLE_FAN.
No significant difference in the minetest replay, but it should reduce
overhead by not requiring that we write quad indices to index buffers that
we repeatedly re-upload (and making the draw packet smaller, as well).

Over the course of the series the actual game seems to be up by 1-2 fps.
2017-12-01 15:37:28 -08:00