Use the convention for Rust subprojects that was adopted by Meson 1.5.0
and newer.
Distros would prefer to avoid vendored crate sources, and instead use
local sources from e.g. /usr/share/cargo/registry. While Meson does not
support a local registry, it can be emulated with MESON_PACKAGE_CACHE_DIR.
However, because the distro might not be using the exact version of the
package, but only one that has the same semver, packagers need to add
some hacks to rewrite the wrap files. For example, in Fedora:
export MESON_PACKAGE_CACHE_DIR="%{cargo_registry}/"
# So... Meson can't actually find them without tweaks
%define inst_crate_nameversion() %(basename %{cargo_registry}/%{1}-*)
%define rewrite_wrap_file() sed -e "/source.*/d" -e "s/%{1}-.*/%{inst_crate_nameversion %{1}}/" -i subprojects/%{1}.wrap
%rewrite_wrap_file proc-macro2
%rewrite_wrap_file quote
%rewrite_wrap_file syn
%rewrite_wrap_file unicode-ident
%rewrite_wrap_file paste
Having a common convention for the name of Rust wraps makes it possible
to perform this transformation with a script without listing
the wraps one by one, and to share the script across multiple packages
(which will be useful when QEMU starts using Rust in a similar way to Mesa).
For an example of such a script, see
https://lore.kernel.org/r/20250722083507.678542-1-pbonzini@redhat.com/.
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Tested-by: Gurchetan Singh <gurchetansingh@chromium.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36284>
Implement support for the texldgpcf instruction, which handles texture
gradient sampling with shadow comparison.
Blob generates such txf's for
dEQP-GLES3.functional.shaders.texture_functions.texturegrad.*shadow*
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35531>
These are benign style warnings. The code is generated by bindgen and it's a bug there that these
names get generated at all.
Silences these warnings since we can't do anything about them:
```
warning: method `use__raw` should have a snake case name
--> src/etnaviv/isa/isa_bindings.rs:358:19
|
358 | pub unsafe fn use__raw(this: *const Self) -> ::std::os::raw::c_uint {
| ^^^^^^^^ help: convert the identifier to snake case: `use_raw`
|
= note: `#[warn(non_snake_case)]` on by default
warning: method `use__raw` should have a snake case name
--> src/etnaviv/isa/isa_bindings.rs:1023:19
|
1023 | pub unsafe fn use__raw(this: *const Self) -> ::std::os::raw::c_uint {
| ^^^^^^^^ help: convert the identifier to snake case: `use_raw`
```
Fixes: 15a784689e ("etnaviv: isa: Generate Rust FFI bindings for asm.h")
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34969>
This instruction is used to implement texelfetch.
Blob generates such txf's for
dEQP-GLES3.functional.shaders.texture_functions.texelfetch.+
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34685>
Based on observations of the generated assembly, this instruction appears to:
- Swizzle the 8/16 component vector in src0 according to the pattern defined in src1.
- Apply a enable mask from src2 to selectively modify elements.
I encountered this instruction while experimenting with _viv_asm and
packed types.
Here is one exmaple kernel:
kernel void k(global int* out, int a, int b) {
_viv_char2_packed s;
_viv_asm(MOV, s.x, s, a);
_viv_asm(MOV, s.y, s, b);
out[0] = s.x + s.y;
}
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33474>
We need to add variants of these instructions, which are used with a shadow
samper and passed the shadow reference value via src2.
Fixes: abe5bd35 ("etnaviv: Switch to isa_assemble_instruction(..)")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32926>
We need to add a variant of the texld instruction, which is used with a shadow
samper and passed the shadow reference value via src2.
Blob generates such texld's for deqp's GLES3.functional.texture.shadow.2d.* (GC3000).
Fixes spec@arb_depth_texture@texdepth.
Fixes: abe5bd35 ("etnaviv: Switch to isa_assemble_instruction(..)")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32926>
Reverse engineered with the following OpenCL kernel:
kernel void add(global float* out, float a, float b) {
float r;
_viv_asm(CLAMP0MAX, r, a, b);
out[0] = r;
}
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31674>
This instruction is used to implement float type conversion. The source type
is defined via src1 immed (0: f32, 1: f16) and the dest type is defined via
the instruction type.
Blob generates such conv's for piglit's tests/cl/program/execute/mad-mix.cl
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30797>
This bumps the req for everything, but I think that's fine, because one
part restricting to a lower rust version doesn't make much sense as we are
also not doing it generally for C or C++.
This also makes it easier for packagers to know what requires rust.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30414>
Introduce unary and binary versions of the branch instruction. This will
give more ISA_OPC_BRANCH_XXX opcodes to work with. This helps to get rid
of these 'maybe' bitsets and is needed for the assembler.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30030>
In isaspec the displayname of a bitset defines what is shown in
dissassembly. The assembler only sees this representation and
needs to be able to handle it.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30030>
An extended instruction uses 0x7f as opcode and stores the extended
opcode in the IMMED of src2.
Reverse engineered with the following dEQPs:
- dEQP-GLES31.functional.shaders.builtin_functions.integer.findmsb.int_lowp_vertex
- dEQP-GLES31.functional.shaders.builtin_functions.integer.findlsb.uvec3_lowp_fragment
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30010>
As we switched to an isaspec powered encoder there is no
need for this strict mapping of opc to instruction bits.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30010>
With libetnaviv_parser we are able to parse the resulting string
representation into an etna_inst and assemble that to binary.
As we are not able to parse and/or assemble we need to mark some test
cases with special flags.
This allows us to test: bin -> disasm -> parsing -> assemble
If isa_parse_str(..) is not available we skip this part of the unit
test.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869>
Implement the following C API's:
- isa_parse_str(..)
- isa_parse_file(..)
- isa_asm_result_destroy(..)
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869>
This commit adds the actual parser, which makes use of the IsaParser
derive proc macro.
It provides two public functions:
- asm_process_str(..)
Parse the provided isa representation and return an etna_asm_result.
This will be used by our unit tests.
- asm_process_file(..)
Parse a whole file full of isa and return an etna_asm_result. This
will be used by our cli assembler.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869>
This struct contains the result of an assembler run and will be filled
in Rust and consumed via a C API.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869>
This proc derive macro does the following magic:
- read static rules file
- parse isaspec xml file
- generate valid pest PEG grammar and attaches it as grammar_inline to
the ast
- calls pest_generator::derive_parser(..) to generate the parser
- creates FromPestRule trait
- creates FromPestRule impl for enums and opcodes
This is the fundation of our assembler.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869>
This commits adds a meta elements with the following attributes:
- has_dest: does the instruction has a dest register?
- valid_srcs: which sources need to be valid?
Is used to generate PEST grammar and defines which of the three source
registers needs to be != void.
- type: which <template> shall be used?
Must match a known template name by the last part.
E.g.: <meta type=tex"/> --> <template name="INSTR_TEX">
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28869>
Remove this logic from the gallium driver and just use the src's as
provided by nir. The special cases, where there is no 1:1 mapping, do
still exist.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28922>
We will use struct etna_inst as starting point for our new assembler. The goal is
to do a smooth translation for the gallium driver.
Also apply clang-format rules and use SPDX license tag.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28183>
