Commit graph

219316 commits

Author SHA1 Message Date
Rhys Perry
a65089dfce ac/nir: pass ac_cu_info to ac_nir_compute_tess_wg_info
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
2026-03-03 08:50:11 +00:00
Rhys Perry
8801ca188d ac/nir: don't pass radeon_info to ac_nir_set_options
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
2026-03-03 08:50:10 +00:00
Rhys Perry
5a8a7dbb22 ac/nir: don't pass radeon_info to NGG lowering
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
2026-03-03 08:50:09 +00:00
Rhys Perry
36feec61c8 ac/nir: use ac_nir_lower_ngg_options for ac_nir_lower_ngg_mesh
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
2026-03-03 08:50:09 +00:00
Rhys Perry
2c7b8e6786 ac/gpu_info: move some NGG flags to ac_cu_info
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
2026-03-03 08:50:09 +00:00
Maaz Mombasawala
2a3c9d5ac6 svga: Use gfx-ci kernel in CI
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
We currently use a custom kernel in blu/linux to run the ci for svga,
instead switch to the kernel used by other drivers.

Signed-off-by: Maaz Mombasawala <maaz.mombasawala@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40016>
2026-03-03 00:09:59 +00:00
irql-notlessorequal
74e73b0e21 docs/features: Mark VK_KHR_maintenance6 complete for hasvk
Also does the same for VK_KHR_maintenance5 as that was missed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37434>
2026-03-02 23:16:11 +00:00
irql-notlessorequal
0988c68eeb hasvk: Advertise VK_KHR_maintenance6
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37434>
2026-03-02 23:16:11 +00:00
irql-notlessorequal
971cca33df hasvk: Add support for Cmd*DescriptorSet*2KHR
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37434>
2026-03-02 23:16:11 +00:00
irql-notlessorequal
9b8cb10e1d hasvk: Handle VkBindMemoryStatusKHR on buffer/image memory bind
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37434>
2026-03-02 23:16:11 +00:00
irql-notlessorequal
da9e9329ec hasvk: Remove no longer valid assert
VK_KHR_maintenance6 allows creating uncompressed views of compressed images with multiple layers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37434>
2026-03-02 23:16:11 +00:00
irql-notlessorequal
879bbf4e37 hasvk: Allow NULL index buffers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37434>
2026-03-02 23:16:10 +00:00
Rob Clark
dcbb16a488 ir3: Initialize debug once
Reduce tsan spam.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40178>
2026-03-02 22:47:27 +00:00
Rob Clark
23d28e605e freedreno: Initialize debug once
Technically overwriting fd_mesa_debug with the same value should be
harmless.  But tsan doesn't know this.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40178>
2026-03-02 22:47:27 +00:00
Rob Clark
8bfe7b32c9 freedreno/drm: bo cache logging vs tsan
Make unlocked update of counters conditional on cache logging being
enabled, to reduce tsan noise.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40178>
2026-03-02 22:47:27 +00:00
Daivik Bhatia
bb02e4bc5c v3d/v3dv: drop manual log2_tile_width/height asserts.
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Move the log2_tile_width/height asserts to pack header functions.

Reviewed-by: Iago Toral Quiroga itoral@igalia.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40108>
2026-03-02 21:45:41 +00:00
Christian Gmeiner
4a5123241f panvk: Advertise VK_ARM_scheduling_controls on CSF
Expose the extension, feature bit, and properties for
VK_ARM_scheduling_controls on CSF architectures (>= v10).

The only supported scheduling control flag is
VK_PHYSICAL_DEVICE_SCHEDULING_CONTROLS_SHADER_CORE_COUNT_ARM, which
allows applications to limit the number of shader cores used by a
queue via VkDeviceQueueShaderCoreControlCreateInfoARM.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40063>
2026-03-02 20:22:07 +00:00
Christian Gmeiner
fff1410c8a panvk: Use per-queue shader core count for CSF group creation
Extract VkDeviceQueueShaderCoreControlCreateInfoARM from the queue
create info pNext chain and use shaderCoreCount to limit
max_compute_cores and max_fragment_cores in the panthor group create
ioctl. The core masks remain unchanged, letting the kernel pick which
cores to schedule on.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40063>
2026-03-02 20:22:07 +00:00
Dylan Baker
a8ba682919 anv: assert we haven't gone over the maximum number of push_buffers
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Coverity notes that we break out of the loop walking the analysis_ranges
early if n_push_ranges >= max_push_buffers, so it notes that
n_push_ranges could already be 3 or 4 (depending on whether we're doing
mesh), and that then if we need the padding we insert another, which
would write past the end of the array.

I don't think this is actually possible in practice, but we can add an
assert to both keep coverity happy and detect that this has actually
happened.

CID: 1681478
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40147>
2026-03-02 19:50:17 +00:00
Dylan Baker
d7f67171ef intel/tools: Don't allocate in noop_drm_shim until after error checking
This avoids the potential to have allocated memory that needs to be
freed, but currently isn't.

CID: 1681055
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40148>
2026-03-02 19:18:33 +00:00
Jesse Natalie
9e277ed2b6 d3d12: Fix importing external resources
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Fixes: 97061dd7 ("d3d12: Add support for Xbox GDK.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40152>
2026-03-02 17:54:49 +00:00
Georg Lehmann
7194dfcc2c nir/opt_algebraic: optimize b2i(a) * b to bcsel
Foz-DB Navi48:
Totals from 3180 (2.77% of 114655) affected shaders:
MaxWaves: 85526 -> 85446 (-0.09%)
Instrs: 2681446 -> 2678641 (-0.10%); split: -0.17%, +0.07%
CodeSize: 14295536 -> 14284628 (-0.08%); split: -0.13%, +0.05%
VGPRs: 174792 -> 174636 (-0.09%); split: -0.16%, +0.07%
SpillSGPRs: 306 -> 308 (+0.65%)
Latency: 14078973 -> 14070122 (-0.06%); split: -0.07%, +0.01%
InvThroughput: 2774242 -> 2764051 (-0.37%); split: -0.37%, +0.00%
VClause: 41744 -> 41734 (-0.02%); split: -0.10%, +0.07%
SClause: 58176 -> 58154 (-0.04%); split: -0.05%, +0.01%
Copies: 222967 -> 223108 (+0.06%); split: -0.14%, +0.20%
Branches: 57317 -> 57322 (+0.01%)
PreSGPRs: 140454 -> 140451 (-0.00%); split: -0.01%, +0.00%
PreVGPRs: 131649 -> 131540 (-0.08%); split: -0.09%, +0.01%
VALU: 1509318 -> 1505443 (-0.26%); split: -0.26%, +0.00%
SALU: 384419 -> 385838 (+0.37%); split: -0.01%, +0.38%
VOPD: 13272 -> 13286 (+0.11%); split: +0.14%, -0.03%

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40160>
2026-03-02 15:58:30 +00:00
Georg Lehmann
9f1a446107 ci: update expectations
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40138>
2026-03-02 15:24:36 +00:00
Georg Lehmann
3d304d5647 nir/opt_algebraic: remove is_used_once on outer instruction
This just prevents useful optimizations.
is_used_once only makes sense on inner instructions, to prevent
creating more new instructions than will be removed.

Foz-DB Navi48:
Totals from 16989 (14.82% of 114655) affected shaders:
MaxWaves: 434379 -> 434353 (-0.01%); split: +0.01%, -0.01%
Instrs: 29030794 -> 29022514 (-0.03%); split: -0.07%, +0.04%
CodeSize: 155293092 -> 155262816 (-0.02%); split: -0.05%, +0.03%
VGPRs: 1093980 -> 1094088 (+0.01%); split: -0.01%, +0.02%
SpillSGPRs: 9801 -> 9803 (+0.02%); split: -0.03%, +0.05%
Latency: 356327270 -> 356283384 (-0.01%); split: -0.03%, +0.02%
InvThroughput: 58239439 -> 58229374 (-0.02%); split: -0.03%, +0.01%
VClause: 451716 -> 451815 (+0.02%); split: -0.07%, +0.09%
SClause: 654614 -> 654556 (-0.01%); split: -0.03%, +0.03%
Copies: 1809805 -> 1809297 (-0.03%); split: -0.20%, +0.17%
Branches: 552382 -> 552384 (+0.00%); split: -0.00%, +0.00%
PreSGPRs: 947188 -> 947224 (+0.00%); split: -0.01%, +0.02%
PreVGPRs: 879583 -> 880173 (+0.07%); split: -0.01%, +0.08%
VALU: 16317859 -> 16309975 (-0.05%); split: -0.07%, +0.02%
SALU: 4256121 -> 4259315 (+0.08%); split: -0.05%, +0.12%
SMEM: 1067069 -> 1067070 (+0.00%)
VOPD: 440855 -> 440792 (-0.01%); split: +0.05%, -0.07%

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40138>
2026-03-02 15:24:36 +00:00
Georg Lehmann
41878e5714 nir_opt_algebraic: remove unneeded is_not_const
These were needed when we didn't constant fold inside nir_search,
to prevent infinite loops.
But now all they do is slow down pattern matching.

Foz-DB Navi48:
Totals from 107 (0.09% of 114655) affected shaders:
Instrs: 162439 -> 162481 (+0.03%); split: -0.01%, +0.03%
CodeSize: 943056 -> 942988 (-0.01%); split: -0.03%, +0.02%
Latency: 971667 -> 970865 (-0.08%); split: -0.09%, +0.00%
InvThroughput: 164452 -> 164521 (+0.04%); split: -0.02%, +0.07%
Copies: 7980 -> 7982 (+0.03%)
VALU: 103572 -> 103566 (-0.01%); split: -0.05%, +0.04%
SALU: 12825 -> 12878 (+0.41%)
VOPD: 5235 -> 5190 (-0.86%)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40138>
2026-03-02 15:24:36 +00:00
Georg Lehmann
374cbc17a4 nir_opt_algebraic: reassociate fadd into ffma where one factor is a constant
This restriction doesn't really make sense, probably an accident.

Foz-DB Navi48:
Totals from 2290 (2.00% of 114655) affected shaders:
MaxWaves: 57496 -> 57510 (+0.02%); split: +0.06%, -0.03%
Instrs: 2817419 -> 2816209 (-0.04%); split: -0.12%, +0.08%
CodeSize: 15218816 -> 15220576 (+0.01%); split: -0.09%, +0.10%
VGPRs: 147456 -> 147384 (-0.05%); split: -0.07%, +0.02%
Latency: 13757114 -> 13751833 (-0.04%); split: -0.13%, +0.09%
InvThroughput: 2463343 -> 2462482 (-0.03%); split: -0.07%, +0.04%
VClause: 40137 -> 40153 (+0.04%); split: -0.07%, +0.11%
SClause: 57351 -> 57385 (+0.06%); split: -0.12%, +0.18%
Copies: 135482 -> 136258 (+0.57%); split: -0.22%, +0.79%
Branches: 30886 -> 30894 (+0.03%)
PreSGPRs: 113470 -> 113462 (-0.01%); split: -0.03%, +0.02%
PreVGPRs: 117554 -> 117591 (+0.03%); split: -0.01%, +0.04%
VALU: 1682734 -> 1681557 (-0.07%); split: -0.10%, +0.03%
SALU: 390685 -> 391301 (+0.16%); split: -0.07%, +0.22%
VOPD: 6159 -> 6254 (+1.54%); split: +1.72%, -0.18%

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40138>
2026-03-02 15:24:36 +00:00
Georg Lehmann
b949122908 nir/opt_algebraic: remove loops for b2f/b2i equality handling
The feq/fneu patterns already existed, and there is no reason to use bit size based
loops here.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40138>
2026-03-02 15:24:36 +00:00
Georg Lehmann
83091276f8 nir_opt_algebraic: remove more specific cmp+bcsel opts
Only some minimal difference from pattern ordering:

Foz-DB Navi48:
Totals from 3 (0.00% of 114655) affected shaders:
Instrs: 4556 -> 4533 (-0.50%)
CodeSize: 23716 -> 23608 (-0.46%)
Latency: 27424 -> 26336 (-3.97%)
InvThroughput: 4674 -> 4672 (-0.04%)
SClause: 107 -> 105 (-1.87%)
Copies: 351 -> 346 (-1.42%)
Branches: 130 -> 126 (-3.08%)
VALU: 2598 -> 2595 (-0.12%)
SALU: 561 -> 555 (-1.07%)
SMEM: 169 -> 167 (-1.18%)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40138>
2026-03-02 15:24:36 +00:00
Georg Lehmann
4190241795 nir/opt_algebraic: optimize all comparisons of b2f/b2i with constants
Foz-DB Navi48:
Totals from 857 (0.75% of 114655) affected shaders:
Instrs: 1136993 -> 1132422 (-0.40%); split: -0.48%, +0.08%
CodeSize: 6096636 -> 6070832 (-0.42%); split: -0.48%, +0.06%
VGPRs: 49668 -> 49620 (-0.10%)
Latency: 24014661 -> 24044601 (+0.12%); split: -0.04%, +0.16%
InvThroughput: 4182482 -> 4183708 (+0.03%); split: -0.12%, +0.15%
VClause: 17698 -> 17695 (-0.02%)
SClause: 25214 -> 25213 (-0.00%)
Copies: 81474 -> 81396 (-0.10%); split: -0.79%, +0.69%
Branches: 24722 -> 24650 (-0.29%); split: -0.36%, +0.07%
PreSGPRs: 43338 -> 43291 (-0.11%); split: -0.22%, +0.11%
VALU: 652975 -> 649760 (-0.49%); split: -0.50%, +0.00%
SALU: 153961 -> 153797 (-0.11%); split: -0.72%, +0.61%
VOPD: 10650 -> 10684 (+0.32%); split: +0.38%, -0.07%

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40138>
2026-03-02 15:24:36 +00:00
Georg Lehmann
ef6f5377da nir/opt_algebraic: remove fcmp+fneg patterns that are cleaned up earlier
No Foz-DB changes, as expected.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40138>
2026-03-02 15:24:36 +00:00
Georg Lehmann
a5334ec239 nir/opt_algebraic: generalize late fcmp(fneg(a), const) patterns
No reason just to do this for 1.0.

Foz-DB Navi48:
Totals from 44 (0.04% of 114655) affected shaders:
CodeSize: 111620 -> 111476 (-0.13%)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40138>
2026-03-02 15:24:35 +00:00
Icenowy Zheng
992cbe6778 pvr: suppress VkDescriptorSetLayoutBindingFlagsCreateInfo ignored warn
This structure is handled instead of ignored, so the warning shouldn't
be printed.

Supress the warning when this structure is found.

Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40164>
2026-03-02 15:06:38 +00:00
Samuel Pitoiset
27b6ad994a radv: fix computing pitch/slice_pitch for compressed block formats
Also there is no need to multiply for dividing later.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Samuel Pitoiset
a4d0249a57 ac/sdma: rework and fix metadata for SDMA7
It depends whether the src or dst are compressed or not.

This fixes a bunch of VKCTS failures on RADV/GFX12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Samuel Pitoiset
67c985d754 radv: mark linear images for SDMA as potentially compressed on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Samuel Pitoiset
e6e305988c ac,radv,radeonsi: merge tiled/linear surfaces into one struct
This will be used to rework/fix metadata config on SDMA7.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Samuel Pitoiset
f351a3582a ac/parse_ib: fix parsing some packets on SDMA7
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Samuel Pitoiset
1a695d50b2 radv: tidy up determining 3D alignment for SDMA
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Samuel Pitoiset
afc261d43a radv: remove redundant radv_sdma_surf::micro_tile_mode
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Samuel Pitoiset
cc21e61e43 radv: fix copying images with different swizzle modes on SDMA7
Swizzle modes must match on SDMA7 (GFX12), and the micro tile mode
doesn't exist.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Samuel Pitoiset
cba085cbe5 ac/sdma: fix pitch assertion for SDMA7
Pitch is 16-bit on SDMA7.

This fixes a couple of VKCTS tests when the transfer granularity is
forced to be 1,1,1.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Rhys Perry
17b18496f6 aco: perform dce for blocks skipped for process_block()
We might need to DCE users of dead instructions removed by
process_block().

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 9e8ba10447 ("aco/vn: remove dead instructions early")
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40091>
2026-03-02 13:38:16 +00:00
Erik Faye-Lund
608d65db5b gallium/va: set up symlinks in build-dir
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Without this libva won't be able to find the driver without
LIBVA_DRIVER_NAME trickery, because the driver has a generic name.
But in the DRI case, even LIBVA_DRIVER_NAME won't do, because the driver
name needs to end with "_drv_video.so", which it doesn't.

So let's instead set up symlinks in the build-dir, like DRIL does.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40136>
2026-03-02 13:05:41 +00:00
Erik Faye-Lund
7e4744909b gallium/dri: set LIBVA_DRIVERS_PATH in devenv
We're setting this in the non-DRI codepath, but this was missed when we
started embedding the VA driver into libgallium. This means we no longer
were able to use VA-API from meson devenv, like we could before.

Fixes: 212d57f7e6 ("targets/va: Build va driver into libgallium when building with dri")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40136>
2026-03-02 13:05:41 +00:00
Alyssa Rosenzweig
ef2a95a40a brw: move brw_can_coherent_fb_fetch to a C header
this isn't C++ brw code, it's just a devinfo query.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40143>
2026-03-02 12:44:42 +00:00
Alyssa Rosenzweig
d6d1dc5822 brw: move brw_nir_pack_vs_input to brw_nir.c
It's just a pass like the others.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40143>
2026-03-02 12:44:42 +00:00
Patrick Lerda
dad942b468 r600: fix cs atomic operations when the shader is called multiple times
This change is useful when the compute shader is called multiple
times with the atomic operations enabled. It fixes some data
coherency issues. This is done by moving
evergreen_emit_atomic_buffer_setup() after r600_flush_emit().

This change is also a partial fix for compute_shader.pipeline-compute-chain.
In this specific case, it makes the memory barrier working.

This change was tested on cayman and barts; it makes these tests
fully deterministic:
khr-gl4[2-6]/shader_atomic_counters/advanced-usage-many-dispatches: fail pass
khr-gles31/core/shader_atomic_counters/advanced-usage-many-dispatches: fail pass
deqp-gles31/functional/synchronization/inter_call/without_memory_barrier/atomic_counter_dispatch_.*_calls_.*_invocations: fail pass

Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40037>
2026-03-02 12:29:30 +00:00
Pavel Ondračka
87a881558f r300: copy target when merging alpha output instruction
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
The alpha instruction always wrote to the same rendertarget as the rgb and the
original target was ignored (surprisingly the HW docs explicitly allows rgb and
alpha to write to different targets). This makes tesseract rendering a bit
better, but there are still some remaining issues.

Fixes: 1c2c4ddbd1 ("r300g: copy the compiler from r300c")
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40128>
2026-03-02 11:13:52 +00:00
Leon Perianu
7e3aa7e627 pvr: enable VK_KHR_maintenance4
This commit adds support for VK_KHR_maintenance4 extension by
implementing the required function.

Makes the following tests to pass/be supported:
dEQP-VK.api.info.get_physical_device_properties2.features.maintenance4_features
dEQP-VK.api.info.vulkan1p3_limits_validation.khr_maintenance4
dEQP-VK.api.device_init.create_device_unsupported_features.maintenance4_features
dEQP-VK.memory.requirements.create_info.buffer.regular
dEQP-VK.memory.requirements.create_info.image.regular_tiling_linear
dEQP-VK.memory.requirements.create_info.image.regular_tiling_optimal
dEQP-VK.memory.requirements.create_info.image.transient_tiling_linear
dEQP-VK.memory.requirements.create_info.image.transient_tiling_optimal

Signed-off-by: Leon Perianu <leon.perianu@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39776>
2026-03-02 10:55:45 +00:00
Simon Perretta
14651e82f8 pvr: downgrade vs out/fs in mismatch assertion to a warning
With VK_KHR_maintenance4, the interface matching rules are relaxed to
allow emitted vs outputs > used fs inputs; unused I/O is typically
discarded during linking, but there are some cases with more complex
types that are currently missed, such as in
dEQP-VK.pipeline.monolithic.interface_matching.vector_length.out_ivec4_in_ivec3_member_of_array_of_structures_in_block_vert_out_frag_in

This change downgrades the assertion to a warning until the linker is
amended to handle these cases.

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39776>
2026-03-02 10:55:45 +00:00