Commit graph

177497 commits

Author SHA1 Message Date
Lionel Landwerlin
a5f2c8c845 anv: create individual logical engines on i915 when possible
This enables us to create more logical engines than HW engines are
available. This also brings the uAPI usage closer to what is happening
on Xe.

Rework: (Sagar)
- Correct exec_flag at the time of submission
- Handle device status check
- Set queue parameters

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
a5e4be45c0 intel: Pass virtual memory address space ID while creating context
In future patches, we will be creating a separate companion RCS engine
and each engine is created with it's own address space, and we really
don't want. CCS and RCS engine writes should be visible to each other in
order to get the wait/signal mechanism working.

v2:
- Move drm_i915_gem_context_create_ext_setparam out of if block (Lionel)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
b73960fc40 intel: Add helper to create/destroy i915 VM
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
13b3d7f741 anv: Handle companion RCS in end/destory/reset code path
If we have valid companion RCS command buffer, we should
end/destroy/reset in the same fashion as of main command buffer.

v2:
- Add lock around anv_cmd_buffer_destroy (Sagar)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:06 +00:00
Sagar Ghuge
801523f03d anv: Split out End/Destroy/Reset cmd buffer code into helper
Since we are going to have companion RCS command buffer, we need to
end/destroy/reset companion RCS command buffer similar to main (CCS/BCS)
command buffer.

It's better to split out common code into helper function so that we can
use it later in this series.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:05 +00:00
Sagar Ghuge
edcde0679c anv: Add helper to create companion RCS command buffer
This helper takes the main command buffer as input and then create a
companion RCS command buffer.

v2:
- Rename anv_get_render_queue_index helper to
  anv_get_first_render_queue_index (Jose)
- Rename RCS command buffer to companion RCS command buffer (Lionel)
- Add early return in anv_get_first_render_queue_index (Lionel)
- Add lock around the function (Jose)
- Move companion rcs command pool creation in device create (Sagar)
- Reset companion RCS cmd buffer (Sagar)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661>
2023-09-07 06:39:05 +00:00
Iago Toral Quiroga
31eaeb8274 v3dv: handle pPlaneLayouts in VkImageDrmFormatModifierExplicitCreateInfoEXT
We have been ignoring these completely until now. V3D isn't very flexible
regarding image layouts anyway, so for the most part we require that
whatever the user puts here matches exactly what the driver would compute
while setting up the slices. The only exceptions are plane offsets which
and array strides.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9742
Tested-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25074>
2023-09-07 06:22:36 +00:00
Iago Toral Quiroga
717fbda536 v3dv: be more precise in vkGetImageSubresourceLayout
Only return non-zero values for arrayPitch and depthPitch if
they make sense for the image type.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25074>
2023-09-07 06:22:36 +00:00
Piotr Kocia
8019a1b929 glsl: ir_function_param_visitor::visit_enter always true condition
The condition

!param->type->is_vector() || !param->type->is_scalar()

alawys evaluates to true:

* type is not scalar or vector -> true
* type is vector, i.e. num_components > 1 -> num_components == 1 is
  false and !is_scalar() == true
* type is scalar, i.e. num_components == 1 -> num_components > 1 is
  false and !is_vector() == true

There is no comment explaining why such code has been written, therefore
this seems to be a mistake.

To maintain consistency with the surrounding code,
glsl_type_is_scalar_or_vector has been used instead of
replacing || with &&.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24914>
2023-09-07 15:00:26 +10:00
Timothy Arceri
5d203c4ae0 glsl_to_nir: add more unhandled function types
These are unhandled but were working ok because a mistake fixed
in the following patch caused all functions to be skipped.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24914>
2023-09-07 14:08:02 +10:00
Timothy Arceri
67d1c36bb4 glsl: fix out params in glsl to nir
We must use a temp var for out params and later copy the out values
to the correct parameter otherwise we can end up overwriting
global variables prematurely.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24914>
2023-09-07 14:03:21 +10:00
Mike Blumenkrantz
51ad269198 aux/tc: handle stride mismatch during rp-optimized subdata
to avoid splitting renderpasses, this subdata optimization handles the usual
driver dance of staging buffer -> gpu copy

if the pbo stride doesn't match the image format's stride, however, then
a direct copy will yield broken pixels and the image will misrender. to avoid this,
detect stride mismatch and translate the single subdata call into a sequence
of non-overlapping subdata calls that the driver can magically figure out
while continuing to not split renderpasses

fixes #9589

cc: mesa-stable

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24849>
2023-09-07 01:37:22 +00:00
Eric Engestrom
3ecc5f0180 docs: add one more 23.1.x release
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25090>
2023-09-07 00:28:49 +00:00
Eric Engestrom
a6b8bfabeb docs: update calendar for 23.1.7
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25090>
2023-09-07 00:28:49 +00:00
Eric Engestrom
67f97816b9 docs: add sha256sum for 23.1.7
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25090>
2023-09-07 00:28:49 +00:00
Eric Engestrom
bd58c84b03 docs: add release notes for 23.1.7
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25090>
2023-09-07 00:28:49 +00:00
Dave Airlie
12967c8dcb rusticl: don't store ptrs to nir_variables across opt passes.
If we use NIR_DEBUG=serialize all these ptrs will be left hanging,
just store the var locations and look them up after opt passes.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25072>
2023-09-06 21:58:17 +00:00
Sil Vilerino
f857c9a96f d3d12: Extend video screen AV1 encode tile support checking
Add fallback case to take into account driver reported tile restrictions if
default hardcoded tile configurations are not supported by driver

Reviewed-by: Tanner Van De Walle <tvandewalle@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25070>
2023-09-06 21:30:02 +00:00
Sil Vilerino
967133cc91 util/vl_vlc: Use UINT64_MAX instead of ~0UL with MSVC compiler
vl_vlc_removebits fails on MSVC where ~0UL is taken as 32 bits.
Use the UINT64_MAX constant instead in that case.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25059>
2023-09-06 20:47:20 +00:00
Lionel Landwerlin
23071b9adc docs: update Anv documentation about dynamic state emission
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
ceb1c6033b anv: split BLEND_STATE packing from BLEND_STATE_POINTERS emit
This way when blorp changes the 3DSTATE_BLEND_STATE_POINTERS, we can
just reemit the prior Vulkan state without repacking any of the values
in the BLEND_STATE structure.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
2b5f9cc30a anv: remove unused state emission
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
50f6903bd9 anv: add new low level emission & dirty state tracking
A single Vulkan state can map to multiple fields in different GPU
instructions. This change introduces the bottom half of a simplified
emission mechanism where we do the following :
          Vulkan runtime state
                   |
                   V
        Intermediate driver state
                   |
                   V
         Instruction programming

This way we can detect that the intermediate state didn't change and
avoid HW instruction emission.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
8d66ff01b1 vulkan/runtime: add helper to name dirty states
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
44656f98d5 anv: split pipeline programming into instructions
The goal of this change it to move away from a single batch buffer
containing all kind of pipeline instructions to a list of instructions
we can emit separately.

We will later implement pipeline diffing and finer state tracking that
will allow fewer instructions to be emitted.

This changes the following things :

   * instead of having a batch & partially packed instructions, move
     everything into the batch

   * add a set of pointer in the batch that allows us to point to each
     instruction (almost... we group some like URB instructions,
     etc...).

At pipeline emission time, we just go through all of those pointers
and emit the instruction into the batch. No additional packing is
involved.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
758540d741 anv: add a flag tracking occlusion query count change
We'll use this later to know when to reemit
3DSTATE_STREAMOUT::ForceRendering

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
0ce772bd19 anv: split 3DSTATE_VFG emission
Leave the static part in genX_pipeline.c and only repack the dynamic
part in genX_gfx_state.c

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
1e081bd680 anv: split 3DSTATE_TE packing between static & dynamic parts
We can reduce the amount of packing we do by only packing the dynamic
part.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
19c3f3ede4 anv: categorize partial/final pipeline instruction
The old gfx8 field doesn't apply anymore.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:02 +00:00
Lionel Landwerlin
b1614c4e22 anv: rename files to represent their usage
gfx8_cmd_buffer.c does not apply to gfx8 anymore for instance, it can
also be included in all builds.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:01 +00:00
Lionel Landwerlin
a1f7e7d93e anv: move all dynamic state emission to cmd_buffer_flush_dynamic_state
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:01 +00:00
Lionel Landwerlin
047c0ba44b intel/decoder: implement accumulated prints
Useful when you want to compare 2 batches with different ordering in
instruction emission. Also when the driver tries to avoid re-emitting
state.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:01 +00:00
Lionel Landwerlin
2c3a51573a intel/anv: batch stats util
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:01 +00:00
Lionel Landwerlin
1fdc089e9c anv: change anv_batch_emit_merge to also do packing
Instead of having that function do only merging of 2 sets of dwords,
it can also do the packing of the new dynamic values. This saves us a
bunch of local structures to declare and calling the packing functions
ourselves.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:01 +00:00
Lionel Landwerlin
5c287385c2 anv: remove ReorderMode from pipeline 3DSTATE_GS emission
This bit is set in the dynamic state emission. This is currently not
breaking anything because LEADING=0.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 71ebd9b9d7 ("anv,hasvk: respect provoking vertex setting on geometry shaders")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
2023-09-06 20:07:01 +00:00
Lionel Landwerlin
adfa4f0453 blorp: remove unused variable
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24719>
2023-09-06 19:34:28 +00:00
Lionel Landwerlin
9231f24be1 hasvk: add state cache invalidation back before fast clears
Prior to 87149cc545, blorp added a state cache invalidation prior to
fast clears. This got dropped on Hasvk.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 87149cc545 ("blorp: update and move fast clear PIPE_CONTROLs to drivers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24719>
2023-09-06 19:34:28 +00:00
Faith Ekstrand
97c9e01517 nouveau/mme: SPDX everything
For all the Fermi stuff, I've credited Mary because she wrote it before
joining Collabora.  For everything else, credit Collabora.

Acked-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25085>
2023-09-06 17:05:58 +00:00
Faith Ekstrand
919a717ba4 nouveau/nil: SPDX everything
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25085>
2023-09-06 17:05:58 +00:00
Faith Ekstrand
963d658f09 nvk: SPDX everything
I chose to use "Collabora Ldt. and Red Hat Inc." as the author line.  I
could have gone through and manually checked every single file but I
think it's better to spread the blame around.  No one should actually
trust those lines anyway.  That's what git blame is for.

Acked-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25085>
2023-09-06 17:05:58 +00:00
Faith Ekstrand
9aa18e45d9 nvk: Add include guards to nvk_bo_sync.h
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25085>
2023-09-06 17:05:58 +00:00
Faith Ekstrand
1249937b5d nvk: Clean up includes
Drop a bunch of totally unnecessary stuff from xf86drm.h from
nvk_private.h and limit it to vk_util and vk_log.  In particular, we
drop nvk_entrypoints.h which is auto-generated, allowing NVK headers to
be included in other parts of the tree.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25085>
2023-09-06 17:05:58 +00:00
Gert Wollny
318b838990 r600/sfn: Simplify dependency chain for index loads on EG
Address loads that just load the index register don't need to chain
up like loads if the address register that are used for indirect
register loads. With the latter it is important that the load and the
address register use are in the same clause. For index register loads
this is scheduled accordingly.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24638>
2023-09-06 15:14:19 +00:00
Gert Wollny
e9f60482fb r600/sfn: factor out resource as extra class
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24638>
2023-09-06 15:14:19 +00:00
Gert Wollny
0dea86e886 r600/sfn: drop unused ControlFlowInstr type enum
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24638>
2023-09-06 15:14:19 +00:00
Gert Wollny
16bef14dd4 r600/sfn: Make use of four clause local registers
The hardware is actually configures like this, but for fma64
we have to sacrifice a "normal" register to allocate z and w
channels, even though the result written there is not used.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24638>
2023-09-06 15:14:19 +00:00
Lionel Landwerlin
c9739e8912 intel/fs: limit register flag interaction of FIND_*LIVE_CHANNEL
Those instructions do not access the flag registers on Gfx8+. Removing
the interaction enables CSE to remove more of those instructions.

Results are a bit mixed (DG2 vulkan fossils):

  ACO:
  Totals from 127 (5.97% of 2128) affected shaders:
  Instrs: 139966 -> 138972 (-0.71%); split: -0.85%, +0.14%
  Cycles: 1685747 -> 1667480 (-1.08%); split: -2.35%, +1.26%
  Max live registers: 10582 -> 10544 (-0.36%)
  Max dispatch width: 1048 -> 1040 (-0.76%)

  Cyberpunk 2077:
  Totals from 2879 (27.95% of 10301) affected shaders:
  Instrs: 4264789 -> 4225666 (-0.92%); split: -1.01%, +0.09%
  Cycles: 72380209 -> 71619521 (-1.05%); split: -1.63%, +0.58%
  Subgroup size: 30624 -> 30632 (+0.03%)
  Spill count: 98 -> 101 (+3.06%)
  Fill count: 90 -> 93 (+3.33%)
  Scratch Memory Size: 8192 -> 9216 (+12.50%)
  Max live registers: 217807 -> 217098 (-0.33%); split: -0.59%, +0.26%
  Max dispatch width: 23792 -> 24112 (+1.34%)

  Gaining 40 SIMD16 shaders

  Rise Of The Tomb Raider:
  Totals from 622 (5.06% of 12289) affected shaders:
  Instrs: 437380 -> 434760 (-0.60%); split: -0.72%, +0.12%
  Cycles: 261843085 -> 261580703 (-0.10%); split: -0.73%, +0.63%
  Max live registers: 27731 -> 27766 (+0.13%); split: -1.01%, +1.14%
  Max dispatch width: 5832 -> 5432 (-6.86%); split: +0.27%, -7.13%

  Loosing 26 SIMD32 shaders

  Strange Brigade:
  Totals from 1298 (31.48% of 4123) affected shaders:
  Instrs: 1504408 -> 1487968 (-1.09%); split: -1.17%, +0.08%
  Cycles: 20735976 -> 20443216 (-1.41%); split: -1.60%, +0.19%
  Max live registers: 89911 -> 89957 (+0.05%)

DG2 shader-db run:

  total instructions in shared programs: 23130895 -> 23130036 (<.01%)
  instructions in affected programs: 260956 -> 260097 (-0.33%)
  helped: 234
  HURT: 101
  helped stats (abs) min: 1 max: 54 x̄: 6.36 x̃: 4
  helped stats (rel) min: 0.05% max: 8.16% x̄: 2.01% x̃: 1.90%
  HURT stats (abs)   min: 1 max: 37 x̄: 6.23 x̃: 3
  HURT stats (rel)   min: 0.02% max: 5.67% x̄: 0.89% x̃: 0.55%
  95% mean confidence interval for instructions value: -3.62 -1.51
  95% mean confidence interval for instructions %-change: -1.33% -0.94%
  Instructions are helped.

  total loops in shared programs: 6071 -> 6071 (0.00%)
  loops in affected programs: 0 -> 0
  helped: 0
  HURT: 0

  total cycles in shared programs: 898610645 -> 898557166 (<.01%)
  cycles in affected programs: 18308201 -> 18254722 (-0.29%)
  helped: 315
  HURT: 48
  helped stats (abs) min: 1 max: 19312 x̄: 404.23 x̃: 128
  helped stats (rel) min: 0.02% max: 28.98% x̄: 3.92% x̃: 2.65%
  HURT stats (abs)   min: 2 max: 14478 x̄: 1538.60 x̃: 409
  HURT stats (rel)   min: <.01% max: 23.24% x̄: 3.34% x̃: 0.41%
  95% mean confidence interval for cycles value: -333.68 39.03
  95% mean confidence interval for cycles %-change: -3.51% -2.41%
  Inconclusive result (value mean confidence interval includes 0).

  total spills in shared programs: 5964 -> 5964 (0.00%)
  spills in affected programs: 0 -> 0
  helped: 0
  HURT: 0

  total fills in shared programs: 6909 -> 6909 (0.00%)
  fills in affected programs: 0 -> 0
  helped: 0
  HURT: 0

  total sends in shared programs: 1040266 -> 1040266 (0.00%)
  sends in affected programs: 0 -> 0
  helped: 0
  HURT: 0

  LOST:   3
  GAINED: 1

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24553>
2023-09-06 14:47:40 +00:00
Matt Coster
421d8f1479 pvr: Cleanup comments in pvr_physical_device_get_supported_*()
pvr_physical_device_get_supported_extensions() contained unneeded
/* clang-format off */ guards.

The section comments in pvr_physical_device_get_supported_features()
also now match the pattern in pvr_physical_device_get_properties().

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Vlad Schiller <vlad-radu.schiller@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25033>
2023-09-06 13:24:17 +00:00
Vignesh Raman
4f199175c4 ci: enforce -Wimplicit-const-int-float-conversion for clang
All -Wimplicit-const-int-float-conversion warnings are fixed and ci
can drop -Wno-error=implicit-const-int-float-conversion.

Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com>
Acked-by: Helen Koike <helen.koike@collabora.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24362>
2023-09-06 12:38:09 +00:00
Vignesh Raman
81a28fb3e2 Do explicit cast to suppress clang warnings
Do explicit cast to suppress the below clang warnings,
../src/mesa/main/get.c:86:31: error: implicit conversion from 'int' to 'float' changes value from 2147483647 to 2147483648 [-Werror,-Wimplicit-const-int-float-conversion]
   return ( ((F) * 65536.0f > INT_MAX) ? INT_MAX :

../src/mesa/main/texparam.c:967:27: error: implicit conversion from 'int' to 'float' changes value from 2147483647 to 2147483648 [-Werror,-Wimplicit-const-int-float-conversion]
                ((param > INT_MAX) ? INT_MAX : (GLint) (param + 0.5)) :

../src/mesa/main/texparam.c:2609:65: error: implicit conversion from 'int' to 'float' changes value from 2147483647 to 2147483648 [-Werror,-Wimplicit-const-int-float-conversion]
         *params = LCLAMPF(obj->Sampler.Attrib.MinLod, INT_MIN, INT_MAX);

../src/mesa/main/texparam.c:2624:65: error: implicit conversion from 'int' to 'float' changes value from 2147483647 to 2147483648 [-Werror,-Wimplicit-const-int-float-conversion]
         *params = LCLAMPF(obj->Sampler.Attrib.MaxLod, INT_MIN, INT_MAX);

../src/mesa/main/texparam.c:2648:72: error: implicit conversion from 'int' to 'float' changes value from 2147483647 to 2147483648 [-Werror,-Wimplicit-const-int-float-conversion]
         *params = LCLAMPF(obj->Sampler.Attrib.MaxAnisotropy, INT_MIN, INT_MAX);

../src/mesa/main/texparam.c:2693:66: error: implicit conversion from 'int' to 'float' changes value from 2147483647 to 2147483648 [-Werror,-Wimplicit-const-int-float-conversion]
         *params = LCLAMPF(obj->Sampler.Attrib.LodBias, INT_MIN, INT_MAX);

../src/gallium/drivers/freedreno/a3xx/fd3_emit.c:731:43: error: implicit conversion from 'unsigned int' to 'float' changes value from 4294967295 to 4294967296 [-Werror,-Wimplicit-const-int-float-conversion]
         OUT_RING(ring, (uint32_t)(zmin * 0xffffffff));

../src/gallium/drivers/freedreno/a3xx/fd3_emit.c:732:43: error: implicit conversion from 'unsigned int' to 'float' changes value from 4294967295 to 4294967296 [-Werror,-Wimplicit-const-int-float-conversion]
         OUT_RING(ring, (uint32_t)(zmax * 0xffffffff));

../src/nouveau/codegen/nv50_ir_peephole.cpp:1647:30: error: implicit conversion from 'unsigned int' to 'float' changes value from 4294967295 to 4294967296 [-Werror,-Wimplicit-const-int-float-conversion]
      CASE(TYPE_U32, u32, 0, UINT32_MAX, 0, INT32_MAX, 0, UINT32_MAX);

../src/nouveau/codegen/nv50_ir_peephole.cpp:1648:38: error: implicit conversion from 'int' to 'float' changes value from 2147483647 to 2147483648 [-Werror,-Wimplicit-const-int-float-conversion]
      CASE(TYPE_S32, s32, INT32_MIN, INT32_MAX, INT32_MIN, INT32_MAX, 0, INT32_MAX);

../src/gallium/drivers/radeonsi/si_nir_lower_vs_inputs.c:400:51: error: implicit conversion from 'unsigned long long' to 'double' changes value from 18446744073709551615 to 18446744073709551616 [-Werror,-Wimplicit-const-int-float-conversion]
         loads[chan] = nir_fmul_imm(b, tmp, 1.0 / BITFIELD64_MASK(bits));

../src/gallium/drivers/radeonsi/si_nir_lower_vs_inputs.c:408:43: error: implicit conversion from 'unsigned long long' to 'double' changes value from 18446744073709551615 to 18446744073709551616 [-Werror,-Wimplicit-const-int-float-conversion]
         tmp = nir_fmul_imm(b, tmp, 1.0 / BITFIELD64_MASK(bits - 1));

Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com>
Acked-by: Helen Koike <helen.koike@collabora.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24362>
2023-09-06 12:38:09 +00:00