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Author SHA1 Message Date
Samuel Pitoiset
a4933d2d7f radv: force indirect descriptor sets for non-monolithic shaders 
When VS and TCS are compiled separately on GFX9+, we can't know how
many descriptor sets are used for both stages and the function
arguments must match.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24697>
 2023-08-25 07:22:03 +00:00
Samuel Pitoiset
e5d30462c9 radv: do not inline push constants for non-monolithic shaders 
It's hard to implement this because the function arguments must match
when eg. VS or TCS are compiled separately on GFX9+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24697>
 2023-08-25 07:22:03 +00:00
Samuel Pitoiset
34ddde6d63 radv: use info->uses_view_index directly when declaring shader arguments 
No need for a separate variable.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24697>
 2023-08-25 07:22:03 +00:00
Samuel Pitoiset
467bf47281 radv: add radv_shader_info::is_monolithic 
This will be used to implement shader object on GFX9+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24697>
 2023-08-25 07:22:03 +00:00
Benjamin Cheng
dd20ec5655 radv/video: send h264 scaling list in raster order 
ITU spec defines the H264 ScalingList{4x4,8x8} in zig-zag order, but
AMD HW wants raster order.

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24572>
 2023-08-25 03:08:13 +00:00
Benjamin Cheng
d578e4416a radv/video: use vk_video_derive_h264_scaling_list 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24572>
 2023-08-25 03:08:13 +00:00
Alyssa Rosenzweig
465b138f01 treewide: Use nir_shader_intrinsic_pass sometimes 
This converts a lot of trivial passes. Nice boilerplate deletion. Via Coccinelle
patch (with a small manual fix-up for panfrost where coccinelle got confused by
genxml + ninja clang-format squashed in, and for Zink because my semantic patch
was slightly buggy).

    @def@
    typedef bool;
    typedef nir_builder;
    typedef nir_instr;
    typedef nir_def;
    identifier fn, instr, intr, x, builder, data;
    @@

    static fn(nir_builder* builder,
    -nir_instr *instr,
    +nir_intrinsic_instr *intr,
    ...)
    {
    (
    -   if (instr->type != nir_instr_type_intrinsic)
    -      return false;
    -   nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
    |
    -   nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
    -   if (instr->type != nir_instr_type_intrinsic)
    -      return false;
    )

    <...
    (
    -instr->x
    +intr->instr.x
    |
    -instr
    +&intr->instr
    )
    ...>

    }

    @pass depends on def@
    identifier def.fn;
    expression shader, progress;
    @@

    (
    -nir_shader_instructions_pass(shader, fn,
    +nir_shader_intrinsics_pass(shader, fn,
    ...)
    |
    -NIR_PASS_V(shader, nir_shader_instructions_pass, fn,
    +NIR_PASS_V(shader, nir_shader_intrinsics_pass, fn,
    ...)
    |
    -NIR_PASS(progress, shader, nir_shader_instructions_pass, fn,
    +NIR_PASS(progress, shader, nir_shader_intrinsics_pass, fn,
    ...)
    )

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24852>
 2023-08-24 15:48:02 +00:00
Samuel Pitoiset
112b393766 radv: stop declaring unused SGPR arguments for PS epilogs 
ACO no longer requires these arguments.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24838>
 2023-08-24 07:21:58 +00:00
Samuel Pitoiset
0004d903d4 radv: fix the per-patch data offset when TES isn't linked with TCS 
When TCS and TES aren't linked together and TCS exports unused outputs,
the per-patch data offset needs to be adjusted. This is similar to the
LS-HS vertex stride when VS and TCS aren't linked together.

This fixes a bunch of failures by forcing the driver to use TCS epilogs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24776>
 2023-08-24 06:03:12 +00:00
Samuel Pitoiset
aef257fd15 radv: advertise NV_device_generated_commands_compute 
This extension introduces a token for implementing DGC compute, it's
only intended to be used by vkd3d-proton.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
 2023-08-23 06:05:39 +00:00
Samuel Pitoiset
1a90b7a5da radv: allow DGC on the compute queue 
DGC cmdbuf on ACE are executed as IB1 without chaining because IB2
isn't supported on ACE.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
 2023-08-23 06:05:39 +00:00
Samuel Pitoiset
559da06755 radv: implement NV_device_generated_commands_compute 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
 2023-08-23 06:05:39 +00:00
Samuel Pitoiset
a57fe712f7 radv: prepare radv_prepare_dgc() for DGC compute 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
 2023-08-23 06:05:39 +00:00
Samuel Pitoiset
aa0ca1e1db radv: prepare radv_get_sequence_size() for DGC compute 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
 2023-08-23 06:05:39 +00:00
Samuel Pitoiset
bb82a3402a radv: track the pipeline bind point for indirect commands layout 
This will be used to implement DGC compute.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
 2023-08-23 06:05:39 +00:00
Konstantin Seurer
7aee3ba36d radv: Stop updating the stack_size in insert_rt_case 
There are two paths that call insert_rt_case:
- Traversal shader: The stack size is ignored.
- Monolithic raygen shader: The stack sizes of the inlined shaders are
                            accounted for in compute_rt_stack_size.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
 2023-08-22 15:46:29 +00:00
Konstantin Seurer
ec708c26ef radv/rt: Split stage initialization and hashing 
The dependency chain is: init stages -> compute pipeline key -> hash
stages.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
 2023-08-22 15:46:29 +00:00
Konstantin Seurer
f3e2900c59 radv/rt: Insert rt_return_amd before lowering shader calls 
Also skips running nir_lower_shader_calls for the traversal shader. This
will be used to skip the pass and the rt_return_amd insertion for
monolithic raygen shaders.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
 2023-08-22 15:46:29 +00:00
Konstantin Seurer
774421f11e radv/rt: Add and use radv_build_traversal 
Moves most of the build code to a helper which will be useful for adding
inline traversal.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
 2023-08-22 15:46:29 +00:00
Konstantin Seurer
2d7965dbff radv/rt: Do not apply stack_ptr for non-recursive stages 
stack_ptr is set to 0.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
 2023-08-22 15:46:29 +00:00
Konstantin Seurer
d174a71db8 radv/rt: Remove some dead code 
- call_idx_base was used for resume shaders in the shader call loop
- hit attribs are lowered elsewhere
- stack_size is set in radv_pipeline_rt.c

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
 2023-08-22 15:46:29 +00:00
Georg Lehmann
9cf6984200 nir: unify lower_find_msb with has_{find_msb_rev,uclz} 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24662>
 2023-08-22 12:08:37 +00:00
Georg Lehmann
2ac7e6614a nir: unify lower_bitfield_extract with has_bfe 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24662>
 2023-08-22 12:08:37 +00:00
Georg Lehmann
34c3f81614 nir: unify lower_bitfield_insert with has_{bfm,bfi,bitfield_select} 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24662>
 2023-08-22 12:08:37 +00:00
Friedrich Vock
bfb55d0266 ac/sqtt,radv/sqtt: Add and use marker for separate RT compilation 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
 2023-08-22 11:33:11 +00:00
Friedrich Vock
3d3d5c4bc3 radv/sqtt: Handle separately-compiled RT pipelines 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
 2023-08-22 11:33:11 +00:00
Friedrich Vock
1cd9525b18 radv/sqtt: Write LDS size metadata in code objects 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
 2023-08-22 11:33:11 +00:00
Friedrich Vock
7809fb9e49 radv/sqtt: Unregister records based on hash 
RT pipelines have multiple hashes used in records, so don't always use
the pipeline hash.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
 2023-08-22 11:33:11 +00:00
Friedrich Vock
3ed4cca883 radv/sqtt: Move record filling to helper function 
RT shaders construct records differently, but this piece of code is
common to all types of pipelines.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
 2023-08-22 11:33:11 +00:00
Friedrich Vock
b4a704b42a ac/rgp: Add metadata for separate-compiled RT stages 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
 2023-08-22 11:33:11 +00:00
Friedrich Vock
0c4e92bf3e ac/rgp: Write lds_size metadata 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
 2023-08-22 11:33:11 +00:00
Friedrich Vock
be0e3e8e09 ac/sqtt,radv: Split internal and API hash in PSO correlations 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
 2023-08-22 11:33:11 +00:00
Samuel Pitoiset
a29e2c6fbc aco: implement create_tcs_jump_to_epilog() 
This implements jumping from the main TCS to the epilog.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
 2023-08-22 06:10:32 +00:00
Samuel Pitoiset
131c3aa3dc radv: add tcs_out_patch_fits_subgroup to radv_tcs_epilog_key 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
 2023-08-22 06:10:32 +00:00
Samuel Pitoiset
65191bb351 radv: declare shader arguments for TCS epilogs 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
 2023-08-22 06:10:32 +00:00
Samuel Pitoiset
d0808b22cb radv: stop declaring the scratch offset argument for TCS epilogs 
ACO skip it for epilogs now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
 2023-08-22 06:10:32 +00:00
Samuel Pitoiset
6ad8abf7aa radv: use the maximum possible workgroup size for TCS epilogs 
It's similar to when the patch control points value is dynamic.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
 2023-08-22 06:10:32 +00:00
Tatsuyuki Ishi
6c5512568b radv/amdgpu: Do not pass in a BO handle when clearing PRT VA region. 
This field is invalid to access for virtual BOs.

Fixes: a931d5a4a4 ("radv/winsys: clear the PRT VA range when destroying a virtual BO")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24805>
 2023-08-21 17:24:35 +00:00
Konstantin Seurer
2943bc34e9 radv: Remove leaf_args::dst_offset 
We can use first_id instead.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24756>
 2023-08-21 12:45:06 +00:00
Konstantin Seurer
90a24c7cb3 radv: Add internal_nodes_offset to scratch_layout 
It shouldn't be a part of bvh_state.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24756>
 2023-08-21 12:45:06 +00:00
Samuel Pitoiset
b8b42be555 radv/amdgpu: add support for submitting external IBs with the chained path 
External IBs are currently only used for DGC. With the chained path,
these IBs will only be used to workaround missing IB2 packet on the
compute queue, which is rare enough to care about chaining inside CS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24207>
 2023-08-21 10:52:13 +00:00
Samuel Pitoiset
33f584f033 radv/amdgpu: allow to execute external IBs on the compute queue 
IB2 isn't supported on ACE, so external IBs should be submitted as IB1.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24207>
 2023-08-21 10:52:13 +00:00
Samuel Pitoiset
e3fae01730 Revert "radv/amdgpu: skip adding per VM BOs for sparse during CS BO list build" 
This reverts commit 51caece74c.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24774>
 2023-08-21 09:42:51 +00:00
Samuel Pitoiset
f67eb9ce07 Revert "radv/amdgpu: workaround a kernel bug when replacing sparse mappings" 
This workaround was added temporarily but it can actually cause
stuttering in some games like Forza Horizon 5.

The kernel fix
(https://lists.freedesktop.org/archives/amd-gfx/2023-June/094648.html)
landed in some stable kernels (5.15.121+, 6.1.40+ and 6.4.5+). Sadly,
older stable kernels don't have it, so you might experiment random GPU
hangs in games that use sparse mapping. Please ensure your kernel is
up-to-date for the best experience.

This reverts commit 9b00867327.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9443
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24774>
 2023-08-21 09:42:51 +00:00
Marek Olšák
905a00f10a ac/surface: add radeon_surf::u::gfx9::uses_custom_pitch 
so that we don't try to guess when the pitch is overridden

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
 2023-08-19 19:36:56 +00:00
Marek Olšák
5d19a0a19b Revert "ac: don't call ac_query_pci_bus_info from ac_query_gpu_info" 
This reverts commit a48642400b.

Instead, add a new parameter require_pci_bus_info to control the behavior.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
 2023-08-19 19:36:55 +00:00
Samuel Pitoiset
b78ea2a38f radv: stop copying if VS or TES uses the InvocationID built-in 
It's only allowed in TCS or GS which means the src shader stage
value is always FALSE.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24691>
 2023-08-18 09:31:23 +00:00
Samuel Pitoiset
d547c996ae radv: simplify declaring VS specific input SGPRs 
stage/previous_stage are actually useless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24691>
 2023-08-18 09:31:23 +00:00
Samuel Pitoiset
525143d01a radv: remove unused param from radv_pipeline_init_multisample_state() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24691>
 2023-08-18 09:31:23 +00:00
Samuel Pitoiset
1cf840fb3e radv: remove radv_cmd_buffer::cached_vertex_formats 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24770>
 2023-08-18 10:23:45 +02:00