As with the memory modifiers, put the . on the modifier rather than
having to do it as part of the print itself. Also, add printing of
accumulators but only if it's not a trivial accumulation.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26246>
The NIR lowering just clamps to [-1, 1] which should turn into two IMnMx
as opposed to the 4 instructions we're emitting now. We can maybe do
better than the NIR lowering for 64-bit but that seems unnecessary.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26246>
Fix comments for the BPC5 and BPC4A entries, so that they mention proper
bit width corresponding to this enum value.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26471>
Multiplanar YUV textures require two surface descriptors, and the
base address calculation should be moved inside the for loop,
otherwise we always take the base address of the first plane.
Fixes: 144f9324a3 ("panfrost: prepare v9+ to support YUV sampling")
Cc: stable
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26425>
We had the unfortunate finding on a recent platform to learn that the
bindless sampler heap is not functioning as expected.
Nowhere in the documentation is the size of the heap written down. So
most people assumed that's the max number that we can program (4Gb).
The reality is that it's only 64Mb.
Though it is appearing like it's working properly for the whole 4Gb
range for most apps, this is only because the HW bounds checking
applied is broken. Instead of clamping anything beyong 64Mb, it's only
clamping the last 4Kb of each 64Mb region.
So this heap is useless for us to make a 4Gb region of both sampler &
surface states...
This change essentially turns off the bindless sampler heap on DG2+.
The only location where we can put SAMPLER_STATE elements is the
dynamic state heap. Unfortunately we cannot align the dynamic state
heap with the bindless surface state heap. So the solution is to
allocate sampler & surface states separately, each from the own heap
in the descriptor pool.
We now have to provide 2 sets of offsets for surfaces & samplers.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25897>
According to PRMs, to use self-modifying code correctly we have to
disable preparser before jumping to the generated commands, and re-enable
it with a first command in that buffer.
Old implementation did it wrong: for both inplace and inring generation
it disabled preparser before running the generation shader, had it
disabled during generation, and re-enabled it just before jumping to
the generated commands.
This usually didn't cause any trouble, because the generation shader and
generated draws are in different BOs, and the jump distance is greater than
the command FIFO depth. But we allocate them from the same pool,
so there are rare cases where the end of the BO with generation commands,
and the beginning of the BO with generated draws are adjacent. In such
cases, the wrong commands might be fetched.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10162
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26427>
bos allocated into IRIS_HEAP_DEVICE_LOCAL_PREFERRED can always be
mmaped because it is also backed to smem which is not the case for
IRIS_HEAP_DEVICE_LOCAL.
This fixes issues with small PCIe bar systems.
Fixes: 21170a58d8 ("iris: Split system memory heap into cached-coherent and uncached heaps")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26455>
