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nak: Implement 64-bit ineg

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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26246>
This commit is contained in:
Faith Ekstrand 2023-12-04 11:45:43 -06:00 • committed by Marge Bot
parent 7db3cc7502
commit a52e46406b
3 changed files with 28 additions and 6 deletions
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2
src/nouveau/compiler/nak.rs
View file

@ -128,7 +128,7 @@ fn nir_options(_dev: &nv_device_info) -> nir_shader_compiler_options {
op.lower_usub_sat = true; // TODO
op.lower_iadd_sat = true; // TODO
op.use_interpolated_input_intrinsics = true;
op.lower_int64_options = !nir_lower_iadd64;
op.lower_int64_options = !(nir_lower_iadd64 | nir_lower_ineg64);
op.lower_ldexp = true;
op.lower_fmod = true;
op.lower_ffract = true;

6
src/nouveau/compiler/nak_encode_sm70.rs
View file

@ -31,17 +31,15 @@ enum ALUSrc {
fn src_mod_has_abs(src_mod: SrcMod) -> bool {
match src_mod {
SrcMod::None | SrcMod::FNeg | SrcMod::INeg => false,
SrcMod::None | SrcMod::FNeg | SrcMod::INeg | SrcMod::BNot => false,
SrcMod::FAbs | SrcMod::FNegAbs => true,
_ => panic!("Not an ALU source modifier"),
}
}
fn src_mod_has_neg(src_mod: SrcMod) -> bool {
match src_mod {
SrcMod::None | SrcMod::FAbs => false,
SrcMod::FNeg | SrcMod::FNegAbs | SrcMod::INeg => true,
_ => panic!("Not an ALU source modifier"),
SrcMod::FNeg | SrcMod::FNegAbs | SrcMod::INeg | SrcMod::BNot => true,
}
}

26
src/nouveau/compiler/nak_from_nir.rs
View file

@ -881,7 +881,31 @@ impl<'a> ShaderFromNir<'a> {
});
dst[1].into()
}
nir_op_ineg => b.ineg(srcs[0]),
nir_op_ineg => {
if alu.def.bit_size == 64 {
let x = srcs[0].as_ssa().unwrap();
let sum = b.alloc_ssa(RegFile::GPR, 2);
let carry = b.alloc_ssa(RegFile::Pred, 1);
b.push_op(OpIAdd3X {
dst: sum[0].into(),
overflow: [carry.into(), Dst::None],
high: false,
srcs: [0.into(), Src::from(x[0]).ineg(), 0.into()],
carry: [SrcRef::False.into(), SrcRef::False.into()],
});
b.push_op(OpIAdd3X {
dst: sum[1].into(),
overflow: [Dst::None, Dst::None],
high: true,
srcs: [0.into(), Src::from(x[1]).bnot(), 0.into()],
carry: [carry.into(), SrcRef::False.into()],
});
sum
} else {
assert!(alu.def.bit_size() == 32);
b.ineg(srcs[0])
}
}
nir_op_inot => {
let lop = LogicOp::new_lut(&|x, _, _| !x);
if alu.def.bit_size() == 1 {