Commit graph

45887 commits

Author SHA1 Message Date
Icecream95
a1bf4be844 panfrost: Add a function to determine if a resource is 2D
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7086>
2021-01-20 23:43:39 +00:00
Rob Clark
77398a9e41 radeonsi: Use util_writes_stencil() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8598>
2021-01-20 23:15:47 +00:00
Rob Clark
04f8aa7c1e r300: Use util_writes_depth_stencil() helper
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8598>
2021-01-20 23:15:47 +00:00
Rob Clark
c01aac141a freedreno/a6xx: Don't early-z if there are stencil writes
Fixes a similar stencil related misrendering in a couple "RV AppStudios"
titles.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8598>
2021-01-20 23:15:47 +00:00
Rob Clark
7277342b5e gallium/util: Add helpers to determine if z/s is written
For drivers that must control various 'early-z'-like state, it is easy
enough to get this wrong.  So add helpers so we don't have to duplicate
the logic in each driver.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8598>
2021-01-20 23:15:47 +00:00
Marek Olšák
bc0508ad38 radeonsi: allow instance_count == 0 on chips that handle it correctly
Let's remove this overhead.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
2021-01-20 21:53:13 +00:00
Marek Olšák
76d6351dab radeonsi: don't validate inlinable uniforms at draw time
Let's trust the state tracker that it sets inlinable uniforms only
when shaders can use them.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
2021-01-20 21:53:13 +00:00
Marek Olšák
185a2472a4 radeonsi: move variables closer to their use in most draw state functions
for lower register pressure, though I haven't measured this.

si_draw_vbo will be handled in a future commit.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
2021-01-20 21:53:13 +00:00
Marek Olšák
ae5df516f1 radeonsi: clear dirty_atoms and dirty_states only if we entered the emit loop
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
2021-01-20 21:53:13 +00:00
Marek Olšák
2206840f6c radeonsi: enable the GS tri strip adj workaround with primitive_restart
If a primitive restart index occurs after an even number of triangles,
the workaround works.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
2021-01-20 21:53:13 +00:00
Marek Olšák
888a45a362 radeonsi: evaluate si_get_vs in si_draw_vbo at compile time
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
2021-01-20 21:53:13 +00:00
Marek Olšák
c5d3341b6e radeonsi: inline the last use of si_get_vs_state
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
2021-01-20 21:53:13 +00:00
Marek Olšák
5f7715083b radeonsi: evaluate sh_base in si_emit_vs_state at compile time
This computes the value at compile time because si_get_user_data_base is
always inlined.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
2021-01-20 21:53:13 +00:00
Marek Olšák
e8ccb6f0f3 radeonsi: add si_get_user_data_base selecting user data registers
This will be used in templated si_draw_vbo in place of sh_base.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
2021-01-20 21:53:13 +00:00
Marek Olšák
88a02d80de radeonsi: don't set context_roll for non-gfx9 in templated functions
It's not needed by other chips.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
2021-01-20 21:53:13 +00:00
Marek Olšák
581a96bc44 radeonsi: don't pass pipe_draw_info into si_emit_draw_registers
Only two fields are used. It's probably better this way.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
2021-01-20 21:53:13 +00:00
Marek Olšák
ac2b4aa08f radeonsi: unify uploaders on APUs too
const_uploader and stream_uploader point to the same uploader.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
2021-01-20 21:53:13 +00:00
Eric Anholt
f79f382c81 nir_to_tgsi: Store directly to TGSI outputs when possible.
Saves emitting a MOV at the end of the program to store the output.

softpipe glmark2 -b buffer +9.73451% +/- 3.17924% (n=6)
softpipe glmark2 -b build +5.57621% +/- 1.35074% (n=9)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8023>
2021-01-20 19:48:59 +00:00
Rohan Garg
d245d7b6b8 virgl: Cache depth and stencil buffers
Expand the list of bind flags to cache depth and stencil
buffers.

Extensive testing shows the following performance improvements:

Game           |    % difference in FPS
Plague Inc     |             7
Portal 2       |             21
Overcooked 2   |             1.2
Hollow Knight  |            -1.1
Civilization V |             3.8

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8560>
2021-01-20 17:09:25 +00:00
Mike Blumenkrantz
924d1ba9eb zink: enable WSI-faking for RADV too
temporary until we get real WSI support

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8284>
2021-01-20 16:31:47 +00:00
Mike Blumenkrantz
356a381600 zink: add VK_KHR_driver_properties
yet another extension that breaks naming conventions for structs/enums,
even if it does so in a very sensible way

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8284>
2021-01-20 16:31:47 +00:00
Gert Wollny
3b27243b01 r600: Enable sb also for NIR
Currently, r600/nir doens't have a proper scheduler or optimizer backend,
to be able to make use of this code path without performance regressions,
we enable the sb optimizer also for NIR.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>
2021-01-20 12:12:07 +00:00
Gert Wollny
e20a83eb86 r600/sb: fall back to un-optimized byte code when ra_init fails
Some emulated fp64 piglit create code that seems to make the register
allocation with sb worse than the original shader created from NIR, so
fall back to using the un-optimized shader.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>
2021-01-20 12:12:07 +00:00
Gert Wollny
c1785c55f7 r600/sb: fix boundary assert for mem-instruction decoding
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>
2021-01-20 12:12:07 +00:00
Gert Wollny
14fe19e797 r600/sfn: Keep array registers alive for the whole shader
This is needed when using sb as a post-optimizer.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>
2021-01-20 12:12:07 +00:00
Gert Wollny
9fa48c0207 r600/sfn: update shader array info
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>
2021-01-20 12:12:07 +00:00
Gert Wollny
7717c1090a r600/nir: pass array info to r600_shader for sb
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>
2021-01-20 12:12:07 +00:00
Gert Wollny
ff382c6634 r600/sb: Add support for INTERP_X and INTERP_Z ops
v2: Fix parsing the 2-slot instructions

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>
2021-01-20 12:12:07 +00:00
Gert Wollny
f57ae1e69c r600: Add flags to INTERP_X and INTERP_Z two-slot ops
v2: use the gap in the enum bit field to add the 2-slot bit

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>
2021-01-20 12:12:07 +00:00
Gert Wollny
198c3acacf r600/sfn: fix use of b32all/and
Fixes: f79b7fcf7c
       r600/sfn: use 32 bit bools

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>
2021-01-20 12:12:07 +00:00
Gert Wollny
4f88668f4a r600/nir: clone shader before first query to shader key
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>
2021-01-20 12:12:07 +00:00
Juan A. Suarez Romero
6d587f754c v3d: use a compatible supported format for TFU-based blit
When trying to blit using the TFU, as we are doing an exact copy with no
conversions, we can choose a supported format that is compatible with the
underlying format's texel size.

This allows to use the TFU to blit formats that are not supported, like
r8ui or r16ui.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8495>
2021-01-20 08:58:55 +00:00
Vinson Lee
dd72019d03 r600/sfn: Remove StoreMerger unused member b.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8540>
2021-01-19 15:06:25 -08:00
cheyang
3e13c1f8df frontend/dri: fix doesn't support RGBA ordering still expose RGBA in config
Signed-off-by: cheyang <cheyang@bytedance.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8553>
2021-01-19 17:10:47 +00:00
Mike Blumenkrantz
5ebfb9cd60 zink: process ubos with location values set as long as they're actually ubos
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8514>
2021-01-19 14:14:59 +00:00
Mike Blumenkrantz
9eec52c67e zink: tweak xfb slot mapping in ntv
ARB_enhanced_layouts allows specifying overlapping variable locations
for xfb outputs, so we need to explode the arrays here to a full 128
components so we can do per-component mapping

sometimes this fails though, as in the case where xfb is just selecting
a single component from a vec but still considering the whole slot, and
so for those cases we just decrement our array index until we get to the
base, which will be within 3 components

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8515>
2021-01-19 14:06:31 +00:00
Pierre-Eric Pelloux-Prayer
41d22eb68e radeonsi: inhibit clockgating when using SQTT
Ported from PAL.

Fixes: 07c1504d1b ("radeonsi: implement SQTT support")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8480>
2021-01-19 09:52:08 +01:00
Vinson Lee
3e6b37a954 nv50/ir: Initialize DataArray members in constructor.
Fix defects reported by Coverity Scan.

uninit_member: Non-static class member array is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member arrayIdx is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member baseAddr is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member arrayLen is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member baseSym is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member vecDim is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member eltSize is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member file is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member regOnly is not initialized in this constructor nor in any functions that it calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7764>
2021-01-18 18:12:22 -08:00
Icecream95
7258b4b48d panfrost: Set TLS for compute jobs
Fixes CL programs using scratch storage, such as the Piglit test
i32-stack-array.cl.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18 20:49:45 +00:00
Icecream95
24867386ee panfrost: Add a sysval for local_work_dim
Fixes Piglit test get-work-dim.cl.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18 20:49:45 +00:00
Icecream95
f5a35918db panfrost: Add a sysval for local_group_size
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18 20:49:45 +00:00
Icecream95
7c2308769b panfrost: Use the correct NIR options for OpenCL on Bifrost
This is needed so that 64-bit operations are lowered properly.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18 20:49:45 +00:00
Icecream95
56f753f8e2 panfrost: Set bifrost_props for compute shaders
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
2021-01-18 20:49:45 +00:00
Ilia Mirkin
087ef91c85 nvc0: index_bias is now only set for indexed draws
Fixes: cbdc00ac3a ("nouveau: fix handling draw info")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8539>
2021-01-18 17:51:58 +00:00
Ilia Mirkin
111c0733ea cso: set index_bounds_valid = true for arrays draws
The min/max indices are valid. Set the bit to true to indicate that.

Fixes glClear (+ clear_with_quads) on nouveau.

Fixes: 72ff53098c (gallium: add pipe_draw_info::index_bounds_valid)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reported-by: Simon Ser <contact@emersion.fr>
Tested-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8546>
2021-01-18 17:33:52 +00:00
Erik Faye-Lund
333730405d zink: handle NULL views in zink_set_sampler_views
Passing NULL for the views parameter should be the same as passing an
array of NULL, according to the documentation. So let's respect that
detail.

This fixes a crash when using GALLIUM_HUD.

Fixes: 8d46e35d16 ("zink: introduce opengl over vulkan")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8564>
2021-01-18 17:06:12 +00:00
Marek Olšák
b06f3c52bf radeonsi: trim the size of si_vgt_param_key and si_vgt_stages_key
These are the minimum sizes we can use.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
f1e34f125d radeonsi: don't use si_get_vs_state in most places
It's incorrect because si_get_vs_state returns gs_copy_shader for legacy
GS. It was harmless, but let's use si_get_vs, which is simpler.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
4088b6f293 radeonsi: rearrange condition for streamout workaround on gfx7 and gfx8
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00
Marek Olšák
eb22bd2072 radeonsi: get out of si_emit_vs_state early for blit vertex shaders
They don't use current_vs_state.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>
2021-01-18 01:17:19 +00:00