freedreno/a6xx: Don't early-z if there are stencil writes

Fixes a similar stencil related misrendering in a couple "RV AppStudios"
titles.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8598>
This commit is contained in:
Rob Clark 2021-01-20 10:44:20 -08:00 committed by Marge Bot
parent 7277342b5e
commit c01aac141a
3 changed files with 4 additions and 1 deletions

View file

@ -593,7 +593,7 @@ compute_ztest_mode(struct fd6_emit *emit, bool lrz_valid)
fs->writes_stencilref) {
return A6XX_LATE_Z;
} else if ((fs->has_kill || zsa->alpha_test) &&
(zsa->base.depth_writemask || !pfb->zsbuf)) {
(zsa->writes_zs || !pfb->zsbuf)) {
/* Slightly odd, but seems like the hw wants us to select
* LATE_Z mode if there is no depth buffer + discard. Either
* that, or when occlusion query is enabled. See:

View file

@ -102,6 +102,8 @@ fd6_zsa_state_create(struct pipe_context *pctx,
so->base = *cso;
so->writes_zs = util_writes_depth_stencil(cso);
so->rb_depth_cntl |=
A6XX_RB_DEPTH_CNTL_ZFUNC(cso->depth_func); /* maps 1:1 */

View file

@ -49,6 +49,7 @@ struct fd6_zsa_stateobj {
uint32_t rb_stencilwrmask;
struct fd6_lrz_state lrz;
bool writes_zs; /* writes depth and/or stencil */
bool invalidate_lrz;
bool alpha_test;