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Author SHA1 Message Date
Marek Olšák
7de43c4fb8 ac: add helper ac_get_ip_type_string to remove duplication 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28607>
 2024-04-12 22:22:04 -04:00
Marek Olšák
8597870dcb ac/llvm: simplify the optimization barrier and apply it to the whole vector 
Use the same code as the pointer type. It works with all types and works
with any vector, but we need to handle i1 and v3i16 as special cases,
otherwise LLVM fails when it sees them. The previous code only extracted
the first component, which is not what we want.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28607>
 2024-04-12 22:22:04 -04:00
Marek Olšák
c7e30cdbbb ac/llvm: remove unused fields of ac_shader_abi 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28607>
 2024-04-12 22:22:04 -04:00
Marek Olšák
105e22f6fd ac/llvm: remove handling of input and output loads/stores that are lowered 
There is a lot that we still use.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28607>
 2024-04-12 22:22:04 -04:00
Marek Olšák
ce7ca0d80b ac/llvm: allow image loads to return less than 4 components, trim DMASK 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28607>
 2024-04-12 22:22:04 -04:00
Marek Olšák
c91b56c271 ac/llvm: add support for 16-bit coordinates (A16) for image (non-sampler) opcodes 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28607>
 2024-04-12 22:22:03 -04:00
Marek Olšák
c9ea9e96a7 ac/llvm: simplify extracting an element in get_image_coords 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28607>
 2024-04-12 22:20:14 -04:00
Marek Olšák
f49cfa9a1c ac/nir: allow 16-bit results for resinfo 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28607>
 2024-04-12 22:20:14 -04:00
Marek Olšák
03d241b256 ac/surface: add radeon_surf::thick_tiling 
It's not worth writing a compute shader for copying 3D textures yet.
I have a sophisticated compute shader that will do it properly.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28607>
 2024-04-12 22:20:14 -04:00
Samuel Pitoiset
c82b8a8153 radv: stop ignoring shader stages that don't need to be imported with GPL 
The Vulkan specification has been updated since I wrote this and it's
invalid now.

This marks some tests as expected failures because they are invalid
now and they will be removed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28692>
 2024-04-12 06:24:43 +00:00
Rhys Perry
c2a467dd4b aco: remove occupancy check in dealloc_vgprs() 
This didn't consider that there might be different programs using the same
SIMD.

fossil-db (navi31):
Totals from 68129 (85.81% of 79395) affected shaders:
Instrs: 23230924 -> 23388315 (+0.68%)
CodeSize: 120636544 -> 121272888 (+0.53%)
Latency: 115645106 -> 115683965 (+0.03%)
InvThroughput: 18804076 -> 18806912 (+0.02%); split: -0.00%, +0.02%
Branches: 404644 -> 407945 (+0.82%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28633>
 2024-04-11 18:30:47 +00:00
Rhys Perry
9775318aa9 aco: don't include the clause in VMEM_CLAUSE_MAX_GRAB_DIST 
By excluding the clause from this check, we only count the number of
instructions that we're actually moving the store across.

fossil-db (navi31):
Totals from 4409 (5.55% of 79395) affected shaders:
MaxWaves: 120234 -> 119738 (-0.41%)
Instrs: 3184513 -> 3184702 (+0.01%); split: -0.09%, +0.09%
CodeSize: 15942424 -> 15943276 (+0.01%); split: -0.07%, +0.07%
VGPRs: 248448 -> 255816 (+2.97%); split: -0.04%, +3.00%
Latency: 18841156 -> 18829451 (-0.06%); split: -0.08%, +0.02%
InvThroughput: 2549229 -> 2552042 (+0.11%); split: -0.02%, +0.13%
VClause: 67760 -> 64138 (-5.35%); split: -5.40%, +0.06%
SClause: 82921 -> 82922 (+0.00%)
Copies: 270026 -> 273399 (+1.25%); split: -0.14%, +1.39%
VALU: 1793374 -> 1796743 (+0.19%); split: -0.02%, +0.21%
VOPD: 798 -> 802 (+0.50%); split: +0.63%, -0.13%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28633>
 2024-04-11 18:30:47 +00:00
Vignesh Raman
446672f9b1 ci: Implement support for replaying ANGLE restricted traces 
ANGLE traces must be compiled together with binaries into binary format.
Introduce them for AMD Raven device, replaying on Vulkan (radv).

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24270>
 2024-04-11 12:13:34 +00:00
Georg Lehmann
5e6e3c7f89 nir: rename to nir_opt_16bit_tex_image 
Not sure what I was thinking when I wrote this pass (probably not much),
but opt makes more sense and matches other nir passes.
Fold is usually used for constants, and this pass handles more than those.

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28662>
 2024-04-11 06:10:33 +00:00
Dave Airlie
16682b6054 radv/video: don't advertise timestamp bits for decode/encode 
At this point I'm not sure if the queues can support timestamps.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25900>
 2024-04-11 13:40:04 +10:00
Dave Airlie
ee64a385b6 radv/video: handle encode control parameters better. 
The spec clarifies different operations for the reset flags,
just clean it up to follow it better.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25900>
 2024-04-11 13:40:04 +10:00
Dave Airlie
05cd42417f radv/video: enable video encoding behind perftest flag 
This probes the vcn firmware version to make sure it can support
the encode extensions properly, then uses the perf test flag if so.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25900>
 2024-04-11 13:40:02 +10:00
Dave Airlie
967e4e09de radv/video: add h265 encode support 
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25900>
 2024-04-11 13:40:02 +10:00
Dave Airlie
54d499818c radv/video: add initial support for encoding with h264. 
This adds the encoding infrastructure along with support for h264.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25900>
 2024-04-11 13:28:32 +10:00
Dave Airlie
800c03ffbd radv/video: add parameter patching calls. 
This is just infrastucture for encoding to plug into to patch
session parameters at create time.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25900>
 2024-04-11 12:57:13 +10:00
Dave Airlie
1d74661dfd radv: add encoder queue support pieces and encoder queries. 
This is just checks for events and avoiding an assert in the winsys,
and adds support for the encoder queries.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25900>
 2024-04-11 12:57:05 +10:00
Dave Airlie
f6c27bea26 radv: add direct cs emit for a dword. 
This lets you write a dword at a certain location, this is needed
for the encode queues.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25900>
 2024-04-11 12:48:29 +10:00
Dave Airlie
1ce215c5a3 radv/video: export unified queue header/tail functions. 
These will be used for encode as well.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25900>
 2024-04-11 12:48:26 +10:00
Timur Kristóf
cfb8f3c1a5 radv: Clean up gathering linked I/O info. 
The code is more concise now without these helpers.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28488>
 2024-04-11 00:44:45 +00:00
Timur Kristóf
0e481a4adc radv: Always use fixed I/O locations for TCS outputs in VRAM. 
The goal of this patch is to make the TCS->TES shader I/O
independent of assigned I/O driver locations.

Always using the unlinked approach means a larger stride when
calculating some memory addresses, but otherwise should have no
perf impact whatsoever, because this only affects how TCS
outputs are stored to VRAM, and doesn't affect how they are
stored in LDS.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28488>
 2024-04-11 00:44:45 +00:00
Timur Kristóf
892ebf2040 radv: Add radv_gather_unlinked_io_mask to shader info header. 
We will call this from another file.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28488>
 2024-04-11 00:44:45 +00:00
Timur Kristóf
e8ddf1a064 radv: Remove dead code for creating per-patch IO mask. 
Not relevant or necessary anymore.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28488>
 2024-04-11 00:44:45 +00:00
Timur Kristóf
66f4dd292c radv: Keep track of TCS outputs that need LDS. 
Instead of reserving LDS space for all TCS outputs, we will now
only reserve it for TCS outputs which really need it, ie. those
which are read by the TCS.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28488>
 2024-04-11 00:44:45 +00:00
Samuel Pitoiset
9840607f4b radv: rework and add a helper for hashing a compute pipeline 
It should be similar to the previous hashing method but it allows us
to get a hash directly from a pCreateInfo for future work.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28651>
 2024-04-10 20:05:22 +00:00
Samuel Pitoiset
05cd85afc6 radv: add a helper for hashing pipelines 
Similar between graphics/compute/raytracing pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28651>
 2024-04-10 20:05:22 +00:00
Samuel Pitoiset
c6cb3b3b93 radv/rt: remove dead code about intersection shaders in radv_pipeline_get_shader_key() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28651>
 2024-04-10 20:05:22 +00:00
Georg Lehmann
1f4662cc4e radv: move alu 
The stats are decent now that aco has an ILP scheduler

Foz-DB Navi31:
Totals from 73549 (92.59% of 79439) affected shaders:
MaxWaves: 2226952 -> 2229352 (+0.11%); split: +0.21%, -0.10%
Instrs: 44690384 -> 44905884 (+0.48%); split: -0.10%, +0.58%
CodeSize: 232666088 -> 233474808 (+0.35%); split: -0.10%, +0.45%
VGPRs: 2998036 -> 2986936 (-0.37%); split: -0.58%, +0.21%
SpillSGPRs: 7176 -> 7170 (-0.08%); split: -0.53%, +0.45%
SpillVGPRs: 1124 -> 1068 (-4.98%); split: -5.07%, +0.09%
Scratch: 6981632 -> 6977792 (-0.06%)
Latency: 297998345 -> 298541597 (+0.18%); split: -0.35%, +0.53%
InvThroughput: 49162321 -> 49039572 (-0.25%); split: -0.46%, +0.21%
VClause: 881737 -> 884147 (+0.27%); split: -0.35%, +0.62%
SClause: 1371928 -> 1373973 (+0.15%); split: -0.78%, +0.92%
Copies: 2920492 -> 2927281 (+0.23%); split: -0.84%, +1.08%
Branches: 890209 -> 890121 (-0.01%); split: -0.03%, +0.02%
PreSGPRs: 2376670 -> 2377251 (+0.02%); split: -0.25%, +0.28%
PreVGPRs: 2229634 -> 2208966 (-0.93%); split: -1.04%, +0.11%
VALU: 25124040 -> 25127521 (+0.01%); split: -0.07%, +0.08%
SALU: 4343167 -> 4361062 (+0.41%); split: -0.23%, +0.65%
VMEM: 1582363 -> 1582245 (-0.01%); split: -0.01%, +0.00%
VOPD: 8709 -> 8708 (-0.01%); split: +2.35%, -2.37%

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27032>
 2024-04-10 17:05:59 +00:00
Georg Lehmann
d9a8ab0e01 radv: sink alu 
The stats are decent now that aco has an ILP scheduler.

Foz-DB Navi31:
Totals from 50743 (63.88% of 79439) affected shaders:
MaxWaves: 1504722 -> 1506408 (+0.11%); split: +0.12%, -0.01%
Instrs: 37550246 -> 37543687 (-0.02%); split: -0.12%, +0.10%
CodeSize: 194277496 -> 194253004 (-0.01%); split: -0.11%, +0.10%
VGPRs: 2266056 -> 2254320 (-0.52%); split: -0.57%, +0.06%
SpillSGPRs: 7893 -> 6861 (-13.07%); split: -14.03%, +0.95%
SpillVGPRs: 1359 -> 1124 (-17.29%)
Scratch: 7006720 -> 6981632 (-0.36%)
Latency: 268082325 -> 267597538 (-0.18%); split: -0.57%, +0.39%
InvThroughput: 43592221 -> 43287284 (-0.70%); split: -1.14%, +0.44%
VClause: 759701 -> 761164 (+0.19%); split: -0.24%, +0.43%
SClause: 1133209 -> 1138406 (+0.46%); split: -0.32%, +0.78%
Copies: 2639405 -> 2632081 (-0.28%); split: -0.81%, +0.53%
Branches: 830411 -> 831358 (+0.11%); split: -0.02%, +0.13%
PreSGPRs: 1802510 -> 1798852 (-0.20%); split: -0.57%, +0.36%
PreVGPRs: 1755801 -> 1747642 (-0.46%); split: -0.51%, +0.04%
VALU: 20974500 -> 20967009 (-0.04%); split: -0.08%, +0.04%
SALU: 3901240 -> 3900098 (-0.03%); split: -0.23%, +0.20%
VMEM: 1397890 -> 1397486 (-0.03%)
VOPD: 4837 -> 4902 (+1.34%); split: +2.03%, -0.68%

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27032>
 2024-04-10 17:05:58 +00:00
Samuel Pitoiset
8d5072bb7f radv: fix missing unbind report when a buffer is destroyed 
There should be a matching unbound operation with
VK_EXT_device_address_binding_report.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28659>
 2024-04-10 11:23:40 +00:00
Samuel Pitoiset
50060072a7 radv: fix missing unbind report when an image is destroyed 
There should be a matching unbound operation with
VK_EXT_device_address_binding_report.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28659>
 2024-04-10 11:23:40 +00:00
Samuel Pitoiset
ec55364f9b radv: add a helper to set image bindings 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28659>
 2024-04-10 11:23:40 +00:00
Samuel Pitoiset
91c48d8f43 radv/rmv: fix image binds logging for disjoint images 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28659>
 2024-04-10 11:23:40 +00:00
Samuel Pitoiset
04c9369c55 radv: fix addr binding report for disjoint image binds 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28659>
 2024-04-10 11:23:40 +00:00
Samuel Pitoiset
ea84b50e4e radv: fix missing addr binding report for WSI image binds 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28659>
 2024-04-10 11:23:40 +00:00
Samuel Pitoiset
8626844a00 radv/rmv: fix missing image bind logging for WSI images 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28659>
 2024-04-10 11:23:40 +00:00
Konstantin Seurer
03483ecb11 radv: Destroy leaf_updateable_pipeline 
The pipeline was never destroyed. Fixes an assert in ac_sqtt_finish.

Fixes: 217072d ("radv/rt: Force active leaves for every updateable accel struct")
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28557>
 2024-04-10 08:23:14 +00:00
Georg Lehmann
702f40f415 aco: add ra test for hi v_interp_p2_f16 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28435>
 2024-04-10 07:49:27 +00:00
Georg Lehmann
e2cb9c57a2 aco: use v_interp_p2_f16 opsel 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28435>
 2024-04-10 07:49:27 +00:00
Georg Lehmann
d15ca421c4 aco/gfx9: all non legacy opsel instructions only write 16bits 
This affects 16bit VOP3 instructions that were new on gfx9, like max3.

No Foz-DB changes on vega10.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28435>
 2024-04-10 07:49:27 +00:00
Georg Lehmann
18706947e8 aco/tests: add assembler tests for interp high_16bits 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28435>
 2024-04-10 07:49:27 +00:00
Georg Lehmann
4b5016a537 aco: support high_16bits FS IO 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28435>
 2024-04-10 07:49:27 +00:00
Georg Lehmann
af199c6949 aco: swap opsel and wait_exp for vinterp 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28435>
 2024-04-10 07:49:26 +00:00
Georg Lehmann
81a334a594 aco/assembler: add vintrp high_16bit support 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28435>
 2024-04-10 07:49:26 +00:00
Georg Lehmann
893ee883fe aco: use v1 definition for v_interp_p1lv_f16 
The result of the first interpolation step is always fp32.

Fixes: 1647e098e9 ("aco: implement 16-bit interp")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28435>
 2024-04-10 07:49:26 +00:00
Samuel Pitoiset
2526d1020b radv/rt: stop passing pCreateInfo to radv_ray_tracing_pipeline_cache_search() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28645>
 2024-04-10 06:38:38 +00:00