Commit graph

5199 commits

Author SHA1 Message Date
Georg Lehmann
9bca149353 radv: Use nir_fold_16bit_image_load_store_conversions.
Totals from 10 (0.01% of 134913) affected shaders:
CodeSize: 53316 -> 53168 (-0.28%)
Instrs: 9219 -> 9117 (-1.11%)
Latency: 41744 -> 41595 (-0.36%)
InvThroughput: 16616 -> 16412 (-1.23%)

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15179>
2022-05-04 09:58:03 +00:00
Samuel Pitoiset
3829981eb7 radv: use 3D views for 3D internal operations on GFX6-8
Instead of binding 2D images views and relying on BASE_ARRAY.
This cleanups the internal driver operations for 3D.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16272>
2022-05-03 08:10:10 +02:00
Rhys Perry
8a525c0fa5 radv: consider radix sort shaders to be internal/meta
Cleans up RADV_DEBUG=shaders

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16198>
2022-05-02 10:19:23 +00:00
Konstantin Seurer
53fe6f1084 radv: Use the entire morton code as sort key
Fixes: be57b08 <"radv: Build accaleration structures using LBVH">
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16264>
2022-04-30 22:11:06 +00:00
Konstantin Seurer
6ba55b4033 radv/radix_sort: Make variable names consistent
We usually use pdevice for "physical device" and not "device pointer".

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16259>
2022-04-30 16:05:42 +02:00
Konstantin Seurer
f1eb1bd10a radv/radix_sort: Add missing entry points
Fixes: 5d9ef0e ("radv: Add the fuchsia radix sort")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16259>
2022-04-30 16:04:22 +02:00
Samuel Pitoiset
cdd201010d radv: fix the number of generated primitive queries with NGG GS vs legacy
With NGG GS, the hardware can't know the number of generated primitives
and we have to increment it manually from the shader using a plain GDS
atomic operation.

Though this had a serious problem (see this old TODO) if the bound
pipeline was using legacy GS because the query implementation was
relying on NGG GS. Another situation is if we had one draw with NGG GS,
followed by one draw with legacy (or the opposite) the query result
would have been broken.

The solution is to allocate two 64-bit values for storing the begin/end
values if the query pool is supposed to need GDS and accumulate the
result with the number of generated primitives generated by the hw.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15892>
2022-04-29 11:46:19 +00:00
Emma Anholt
536c8ee96d nir/lower_tex: Make the adding a 0 LOD to nir_op_tex in the VS optional.
This controls the whole lowering of "make tex ops with implicit
derivatives on non-implicit-derivative stages be tex ops with an explicit
lod of 0 instead", but it's really hard to describe that in a git commit
summary.

All existing callers get it added except:
- nir_to_tgsi which didn't want it.
- nouveau, which didn't want it (fixes regressions in shadowcube and
  shadow2darray with NIR, since the shading languages don't expose txl of
  those sampler types and thus it's not supported in HW)
- optional lowering passes in mesa/st (lower_rect, YUV lowering, etc)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16156>
2022-04-28 21:26:08 +00:00
Samuel Pitoiset
92e5eee39e radv: use correct push constants range for internal operations
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16131>
2022-04-27 15:08:59 +00:00
Samuel Pitoiset
e6bcdc763c radv: enable radv_disable_sinking_load_input_fs for Grid Autosport
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4228
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16165>
2022-04-27 13:00:38 +02:00
Samuel Pitoiset
1dbfd2be4b radv: allow to disable sinking of load inputs for FS via drirc
To workaround game bugs where partial derivatives are used in
non-uniform control flow. A proper solution needs to be implemented,
but as a quick fix disabling nir_opt_sink() works.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16165>
2022-04-27 13:00:36 +02:00
Samuel Pitoiset
f525706e77 radv: fix handling divisor == 0 with dynamic vertex input state
When the divisor is 0, the compiler should generate a different VS
prolog instead of re-using a previous prolog that uses nontrivial
divisors. This is because divisor == 0 and divisor > 1 should use
a different path to guarantee that the index is correctly computed.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16009>
2022-04-27 06:43:36 +00:00
Konstantin Seurer
aeeb0b4deb radv: Copy shader modules to avoid use after free
The vkd3d-proton ray tracing tests delete shader modules after creating
pipeline libraries from them. This resulted in a use after free when
creating ray tracing pipelines.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16027>
2022-04-26 18:20:11 +00:00
Rhys Perry
f97d82c52b radv: fix clearing of TRUNC_COORD with tg4 and immutable samplers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 15640e58d9 ("radv,aco: lower texture descriptor loads in NIR")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16148>
2022-04-26 10:36:23 +00:00
Samuel Pitoiset
148dba95b8 radv: add an SQTT workaround for chips with disabled RBs
Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16133>
2022-04-25 22:58:20 +00:00
Konstantin Seurer
4080f18163 radv: Fix lowering ignore_ray_intersection
Fixes dEQP-VK.ray_tracing_pipeline.misc.report_intersection_result

Fixes: c3d82a9 ("radv: Add pass to lower anyhit shader into an intersection shader.")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16056>
2022-04-25 12:16:46 +00:00
Samuel Pitoiset
51ea72e621 radv: remove redundant VK_PIPELINE_STAGE_2_TRANSFER_BIT for CP DMA idle
They are equivalent.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15943>
2022-04-25 10:40:59 +00:00
Samuel Pitoiset
591e3296cd radv: clarify why STAGE_2_CLEAR_BIT needs to wait for CP DMA to be idle
To clarify that other clear operations like vkCmdFillBuffer() are
implicitly synchronized. So, STAGE_2_CLEAR_BIT is only needed for
vkCmdUpdateBuffer() in some rare cases (GFX10+ dGPUs with GTT BOs).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15943>
2022-04-25 10:40:59 +00:00
Konstantin Seurer
e4a6f09d12 radv: Clean up the accel-struct build shaders
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
2022-04-24 16:03:32 +02:00
Konstantin Seurer
be57b085be radv: Build accaleration structures using LBVH
This sorts the leaf nodes along a morton curve before
creating the internal nodes. For reference:
https://developer.nvidia.com/blog/thinking-parallel-part-iii-tree-construction-gpu/

Ray query cts:
Test run totals:
  Passed:        22418/23426 (95.7%)
  Failed:        0/23426 (0.0%)
  Not supported: 1008/23426 (4.3%)
  Warnings:      0/23426 (0.0%)
  Waived:        0/23426 (0.0%)

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
2022-04-24 16:03:32 +02:00
Konstantin Seurer
5d9ef0efb5 radv: Add the fuchsia radix sort
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
2022-04-24 16:03:32 +02:00
Konstantin Seurer
9c020b525b radv: Format radv_acceleration_structure.c
This is the result of running clang-format on the entire file.
Although this is not related to this MR, I decided to include
the formatting changes so I do not have to deal with them if
I work on this file in the future.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
2022-04-24 16:03:32 +02:00
Konstantin Seurer
49383fe39e radv: Make fill_buffer_shader non-static
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
2022-04-24 16:03:32 +02:00
Konstantin Seurer
2a004866fb radv: Use VAs in radv_meta_buffer.c
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
2022-04-24 16:03:32 +02:00
Marek Olšák
c888e77dfc ac/llvm: remove inst_offset parameter from ac_build_buffer_load
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
2022-04-23 01:45:17 +00:00
Marek Olšák
f68aeaa2c2 ac/llvm: remove inst_offset parameter from ac_build_buffer_store_dword
There was a bug that inst_offset was added to soffset in one codepath and
to voffset in all other codepaths. The correct behavior is to add it
to voffset.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
2022-04-23 01:45:17 +00:00
Marek Olšák
8abb612cba ac/llvm: remove immoffset parameter from ac_build_tbuffer_load
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
2022-04-23 01:45:17 +00:00
Samuel Pitoiset
5121e6dd7e radv: only apply enable_mrt_output_nan_fixup for 32-bit float MRTs
This is incorrect for 32-bit integer MRTs which are clamped to the
maximum value of the format, and returning 0 can break some shaders.

This fixes a rendering issue with RAGE2.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4329
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16080>
2022-04-22 06:49:46 +00:00
Mike Blumenkrantz
27a43b531b nir/fold_16bit_sampler_conversions: add a mask for supported sampler dims
AMD might not support cubes, but that doesn't mean cubes can't be used
on other drivers

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15852>
2022-04-20 12:12:36 +00:00
Konstantin Seurer
324b2ae5f2 radv: Enable rt primitive culling for spirv2nir
Fixes: c8fe408fcc ("radv: Advertise ray primitive culling")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16028>
2022-04-20 11:38:52 +00:00
Konstantin Seurer
b3896fa8c7 radv: Do not discard hits with t=tmax
Fixes dEQP-VK.ray_tracing_pipeline.inside_aabbs.chit.ray_end_tmax_zero.*

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16034>
2022-04-20 10:46:29 +00:00
Yonggang Luo
4ead2f6579 win32: Fixes 32 bits visual studio module definition files by add script gen_vs_module_defs.py
Getting opengl32*.def consistence with Windows SDK.
Getting osmesa.mingw.def's gl* functions consistence with Windows SDK.
stw_* functions are cdecl, not stdcall, so there is no need mangling the symbol.
Fixes egl.def for x86
d3d10sw: Move the place of d3d10_sw.def to d3d10_sw.def.in
Fixes vulkan_lvp.def for x86
Fixes #5552
Remove stdcall-fixup

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14041>
2022-04-19 19:38:47 +00:00
Samuel Pitoiset
90db834603 radv: do not support UNIFORM_TEXEL_BUFFER with SRGB
Looks like it can't be supported. Also disabled by PRO/AMDVLK.

Fixes new CTS dEQP-VK.texture.texel_buffer.uniform.srgb.*.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16010>
2022-04-19 06:35:50 +00:00
Samuel Pitoiset
443034c1ec radv: initialize the vertex input interface state in only one place
Instead of copying states from these structures at many different
places, do it only once. Will help VK_EXT_graphics_pipeline_library.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15967>
2022-04-19 06:15:52 +00:00
Samuel Pitoiset
ea6eaa4c19 radv: use the hardware primitive topology everywhere
Instead of mixing the VK type vs HW type everywhere.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15967>
2022-04-19 06:15:52 +00:00
Samuel Pitoiset
984b6c037c radv: mark all active stages earlier in the pipeline creation path
Few pCreateInfo structs have to be ignored based on the active stages
and this will be used to make a union of stages from graphics libraries.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15967>
2022-04-19 06:15:52 +00:00
Konstantin Seurer
b761b51451 radv: Fix ray queries with !15854
Fixes: b62e90a ("radv: use nir_op_imm helpers")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16004>
2022-04-18 16:37:54 +00:00
Samuel Pitoiset
ed7d831525 radv: fix initializing pipeline_key::topology for GFX9 and older
This is used to determine the geometry shader info on GFX9, and it
looks like it was broken for topologies that use adjacency.

This is also used to remove PSIZ from shaders that don't need it.

Found by inspection.

fossils-db (Polaris10):
Totals from 140 (0.10% of 135960) affected shaders:
SGPRs: 10448 -> 9696 (-7.20%)
VGPRs: 4376 -> 4264 (-2.56%)
CodeSize: 164316 -> 161028 (-2.00%)
Instrs: 26449 -> 25767 (-2.58%)
Latency: 184448 -> 180468 (-2.16%)
InvThroughput: 80772 -> 79092 (-2.08%)
VClause: 337 -> 328 (-2.67%); split: -2.97%, +0.30%
SClause: 859 -> 813 (-5.36%); split: -5.70%, +0.35%
Copies: 1027 -> 790 (-23.08%)
PreSGPRs: 2751 -> 2331 (-15.27%)
PreVGPRs: 3887 -> 3836 (-1.31%)

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15948>
2022-04-18 06:42:39 +00:00
Rhys Perry
75e68f44af radv: always use nir_lower_io_lower_64bit_to_32
Our I/O lowering doesn't handle 64-bit TCS stores and TES loads which use
several slots. Because of the large stride between slots, we have to split
the load so that there's a single load_buffer_amd/store_buffer_amd
intrinsic for each slot.

Our I/O lowering also sometimes creates nir_op_pack_64_2x32 after
nir_lower_alu_to_scalar.

Fixes KHR-GL45.gpu_shader_fp64.fp64.varyings with Zink
(https://gitlab.freedesktop.org/mesa/mesa/-/issues/6276)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15863>
2022-04-16 11:19:11 +00:00
Rhys Perry
ce6867e672 radv: use inot(a) instead of ine(a, true)/ieq(a, false)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>
2022-04-15 23:56:11 +00:00
Rhys Perry
b62e90ad43 radv: use nir_op_imm helpers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>
2022-04-15 23:56:11 +00:00
Rhys Perry
df994ecc8f radv: use radv_meta_build_nir_vs_generate_vertices() more
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>
2022-04-15 23:56:11 +00:00
Rhys Perry
8e0e98a9af radv: initialize meta shader options earlier
We might need this for NIR builders.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>
2022-04-15 23:56:11 +00:00
Rhys Perry
53e8d6618f radv: remove unnecessary align_mul/offset initialization
Since af51efe195, these builders fill these in with scalar alignment if
not provided.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>
2022-04-15 23:56:11 +00:00
Samuel Pitoiset
f049b1c085 radv: add support for VkShaderModuleCreateInfo as pNext
With VK_EXT_graphics_pipeline_library, modules can be passed via the
pNext of VkpipelineShaderStageCreateInfo.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15926>
2022-04-15 06:08:34 +00:00
Samuel Pitoiset
c43573ba93 radv: add support for independent descriptor set layouts
With VK_EXT_graphics_pipeline_library, pipeline layouts created with
VK_PIPELINE_LAYOUT_CREATE_INDEPENDENT_SETS_BIT_EXT might contain NULL
descriptor sets.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15926>
2022-04-15 06:08:34 +00:00
Samuel Pitoiset
2591a52560 radv: fix enabling adjust_frag_coord_z and apply per-pipeline
Fossilize always enables all supported extensions, that means that
adjust_frag_coord_z would always be enabled on RDNA2, even if the
application doesn't enable it. The pipeline key would then be different
and precompilation wouldn't work. Move this per-pipeline since we can
know if VRS will be used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15444>
2022-04-15 05:49:54 +00:00
Samuel Pitoiset
c7eaf03068 radv: use shader_info::system_values_read
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15343>
2022-04-14 14:13:07 +00:00
Samuel Pitoiset
3cc21a42fe radv: use shader_info::outputs_written/per_primitive_outputs for VS outputs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15343>
2022-04-14 14:13:07 +00:00
Samuel Pitoiset
feaaf4ac7a radv: use shader_info::inputs_read/outputs_written for FS IO
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15343>
2022-04-14 14:13:07 +00:00