Commit graph

63774 commits

Author SHA1 Message Date
Iago Toral Quiroga
0b84fa2c52 mesa: Enable simultaneous queries on different streams.
It should be possible to query the number of primitives written to each
individual stream by a geometry shader in a single draw call. For that
we need to have up to MAX_VERTEX_STREAM separate query objects.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-30 08:08:50 +02:00
Iago Toral Quiroga
3178d2474a i965: Implement GL_PRIMITIVES_GENERATED with non-zero streams.
So far we have been using CL_INVOCATION_COUNT to resolve this query but this
is no good with streams, as only stream 0 reaches the clipping stage. Instead
we will use SO_PRIM_STORAGE_NEEDED which can keep track of the primitives sent
to each individual stream.

Since SO_PRIM_STORAGE_NEEDED is related to the SOL stage and according to
ARB_transform_feedback3 we need to be able to query primitives generated in
each stream whether transform feedback is active or not what we do is to
enable the SOL unit even if transform feedback is not active but disable all
output buffers in that case. This effectively disables transform feedback
but permits activation of statistics enabling SO_PRIM_STORAGE_NEEDED even
when transform feedback is not active.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2014-06-30 08:08:50 +02:00
Iago Toral Quiroga
a374685f09 i965: Implement GL_TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN with non-zero streams.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2014-06-30 08:08:50 +02:00
Iago Toral Quiroga
ecd9960430 mesa: Include stream information in indexed queries.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-30 08:08:50 +02:00
Samuel Iglesias Gonsalvez
0e58a3ef2a glsl: include streamId when reading/printing ir_variable IR.
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-30 08:08:50 +02:00
Iago Toral Quiroga
a16043ba57 glsl: include streamId when reading/printing emit-vertex and end-primitive IR.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-30 08:08:50 +02:00
Iago Toral Quiroga
5d562588a5 i965/gs: Set control data bits for vertices emitted in stream mode.
In stream mode we have to set control data bits with the StreamID
information for every vertex.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2014-06-30 08:08:50 +02:00
Iago Toral Quiroga
7589683c97 glsl: Validate vertex emission in geometry shaders.
Check if non-zero streams are used. Fail to link if emitting to unsupported
streams or emitting to non-zero streams with output type other than GL_POINTS.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2014-06-30 08:08:50 +02:00
Iago Toral Quiroga
e877aadde0 glsl: Add support for EmitStreamVertex() and EndStreamPrimitive().
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2014-06-30 08:08:50 +02:00
Iago Toral Quiroga
4b3fc21032 glsl: Modify ir_end_primitive to have a stream.
This will be necessary to implement EndStreamPrimitive().
EndPrimitive() will produce an ir_end_primitive with the default stream 0.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2014-06-30 08:08:50 +02:00
Iago Toral Quiroga
8639effefe glsl: Modify ir_emit_vertex to have a stream.
This will be necessary to implement EmitStreamVertex().
EmitVertex() will produce an ir_emit_vertex with the default stream 0.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2014-06-30 08:08:50 +02:00
Iago Toral Quiroga
9650293b51 i965/gs: Set number of control data bits for stream mode.
If the geometry shader is indeed using streams then we need 2 control data
bits per vertex for the StreamID. If the shader is not using streams then
we don't need control data bits.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-30 08:08:50 +02:00
Iago Toral Quiroga
6d3632c9c9 glsl: Store info about geometry shaders that emit vertices to non-zero streams.
On Intel hardware when a geometry shader outputs GL_POINTS primitives we
only need to emit vertex control bits if it emits vertices to non-zero
streams, so use a flag to track this.

This flag will be set to TRUE when a geometry shader calls EmitStreamVertex()
or EndStreamPrimitive() with a non-zero stream parameter in a later patch.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-30 08:08:50 +02:00
Iago Toral Quiroga
598c2e2c83 glsl: Only geometry shader outputs can be associated with non-zero streams.
This should be ensured by the parser, so assert on that.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-30 08:08:50 +02:00
Iago Toral Quiroga
e2dd717616 glsl: Two varyings can't write to the same buffer from different streams.
If this is detected, fail to link.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-30 08:08:50 +02:00
Iago Toral Quiroga
1e1f071d25 glsl: Add methods to retrive a varying's name and streamId.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-30 08:08:49 +02:00
Iago Toral Quiroga
02fd80e160 glsl: Fail to link if inter-stage input/outputs are not assigned to stream 0
Outputs that are linked to inputs in the next stage must be output to stream 0,
otherwise we should fail to link.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-30 08:08:49 +02:00
Iago Toral Quiroga
b908e85ed3 glsl: Assign GLSL StreamIds to transform feedback outputs.
Inter-shader outputs must be on stream 0, which is the default.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2014-06-30 08:08:49 +02:00
Iago Toral Quiroga
37d795317e i965: Enable transform feedback for streams > 0
Configure hardware to read vertex data for all streams and have all streams
write their varyings to the corresponsing output buffers.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-30 08:08:49 +02:00
Iago Toral Quiroga
f20c723039 mesa: add StreamId information to transform feedback outputs.
For now initialized to the default stream 0.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-30 08:08:49 +02:00
Samuel Iglesias Gonsalvez
a7e6ec6898 glsl: Add parsing support for multi-stream output in geometry shaders.
This implements parsing requirements for multi-stream support in
geometry shaders as defined in ARB_gpu_shader5.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-06-30 08:08:49 +02:00
Emil Velikov
15b5e663b0 st/omx: strcpy the string into the allocated buffer
This fixes commit a001ca98e15(st/omx: keep the name,
(name|role)_specific strings dynamically allocated) in which we
dynamically allocated the buffers for name and (name|role)_specific
yet forgot to copy the encoder strings into them.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80614
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-06-28 15:24:45 +01:00
Ilia Mirkin
f230015206 mesa: expose ARB_seamless_cubemap_per_texture when supported
All of the bits appear to already be in place to support this in the
sampler (which the original AMD version didn't allow).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-06-28 00:51:43 -04:00
Emil Velikov
a001ca98e1 st/omx: keep the name, (name|role)_specific strings dynamically allocated
... as it's caller (the external program omxregister-bellagio) is the one
who frees all of the allocated memory.

Reported-by: Pedretti Fabio <pedretti.fabio@gmail.com>
Tested-by: Fabio Pedretti <pedretti.fabio@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-06-27 19:13:31 +01:00
Chris Forbes
ed66312426 docs: Update the status of a few things in GL3.txt
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
2014-06-27 22:13:21 +12:00
Axel Davy
c58486516f nv50: fix dri3 prime buffer creation
This is the same fix than
"nvc0: fix dri3 prime buffer creation"

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-06-27 13:38:20 +10:00
Dave Airlie
13eddf3bf2 nvc0: fix dri3 prime buffer creation
We need to place shared buffers into GART.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-06-27 13:38:14 +10:00
Axel Davy
df282ce1bf gallium/dri2: implement blitImage
V3: call flush_resource before flush
V4: Add new flags

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-06-27 11:39:34 +10:00
Axel Davy
8a66a5de83 dri/image: add blitImage to the specification
It allows to blit two __DRIimages.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-06-27 11:39:34 +10:00
Axel Davy
27c686309e gallium: Add __DRIimageDriverExtension support to gallium
__DRIimageDriverExtension is used by GLX DRI3 and Wayland.

This patch is a rewrite of
http://lists.freedesktop.org/archives/mesa-dev/2014-May/060318.html
and
http://lists.freedesktop.org/archives/mesa-dev/2014-May/060317.html

Previous patches were:
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Keith Packard <keithp@keithp.com>

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-06-27 11:39:34 +10:00
Axel Davy
e40cf256f4 dri3: use invalidate.
This doesn't change anything to the intel DRI3 implementation,
but enables the gallium implementation to use dri2.stamp instead
of relying on the stamp shared with the st backend.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-06-27 11:39:34 +10:00
Dave Airlie
e4419913bf dri3: fix image extension checking.
Move the image extension setup in with all the others in
bind_extensions, and improve the check to both version
and function pointer.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-06-27 11:39:34 +10:00
Jasper St. Pierre
b4dcf87f34 glxext: Send the Drawable's ID in the GLX_BufferSwapComplete event
While the official INTEL_swap_event specification says that the drawable
field should contain the GLXDrawable, not the Drawable, the existing
DRI2 code in dri2.c that translates from DRI2_BufferSwapComplete sends out
GLX_BufferSwapComplete with the Drawable's ID, so existing codebases
like Clutter/Cogl rely on getting the Drawable.

Match DRI2's error here and stuff the event with the X Drawable, not
the GLX drawable.

This fixes apps seeing wrong drawables through an indirect GLX context
or with DRI3, which uses the GLX_BufferSwapComplete event directly on
the wire instead of translates Present in mesa.

At the same time, also modify the structure for the event to make sure
that clients don't make the same mistake. This is not an API or ABI
break, as GLXDrawable and Drawable are both typedefs for XID.

Signed-off-by: Jasper St. Pierre <jstpierre@mecheye.net>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-06-27 09:44:56 +10:00
Kenneth Graunke
8cf289c3ef i965: Enable compressed multisample support (CMS) on Broadwell.
Everything is in place and appears to be working.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2014-06-26 11:50:35 -07:00
Kenneth Graunke
db184d43b0 i965: Add 2x MSAA support to the MCS allocation function.
2x MSAA also uses 8 bits, just like 4x.  More bits are unused.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2014-06-26 11:50:34 -07:00
Kenneth Graunke
a248b2a4eb i965: Hook up the MCS buffers in SURFACE_STATE on Broadwell.
MCS buffers are never allocated on Broadwell, so this does nothing for
now, but puts the infrastructure in place for when they do exist.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2014-06-26 11:50:34 -07:00
Kenneth Graunke
e10311be9f i965: Drop SINT workaround for CMS layout on Broadwell.
According to the documentation, we don't need this SINT workaround on
Broadwell.  (Or at least, it doesn't mention that we need it.)

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2014-06-26 11:50:34 -07:00
Kenneth Graunke
fd77187689 i965: Add plumbing for Broadwell's auxiliary surface support.
Broadwell generalizes the MCS fields to allow for multiple kinds of
auxiliary surfaces.  This patch adds the plumbing to set those values,
but doesn't yet hook any up.

v2: (by Jordan Justen) Use mt for qpitch; pitch is tiles - 1.
v3: Don't forget to subtract 1 from aux_mt->pitch.
v4: Drop unnecessary aux_mt->offset (caught by Jordan Justen).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2014-06-26 11:50:34 -07:00
Jordan Justen
a46cb6a971 i965: Add auxiliary surface field #defines for Broadwell.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2014-06-26 11:50:34 -07:00
Kenneth Graunke
7c2946fc23 i965: Disassemble all of DP write message control bits on Gen6.
Prior to the new brw_inst API, the brw_instruction structure split off
bits 4 and 5 of msg_control for specific fields, and we failed to
disassemble them.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-06-26 11:46:26 -07:00
Matt Turner
40a9754953 i965: Pass brw to brw_try_compact_instruction().
Signed-off-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-06-26 11:46:25 -07:00
Matt Turner
fa1a3b2e3c i965: Add is_cherryview flag to brw_context.
Signed-off-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-06-26 11:46:24 -07:00
Matt Turner
a25401bc9a i965: Add CSEL opcode definition for Gen8.
Signed-off-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-06-26 11:46:23 -07:00
Matt Turner
e1b477238d i965: Document which instructions are generation specific.
Signed-off-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-06-26 11:46:21 -07:00
Matt Turner
a382b4cb7a i965: Don't set UIP for ENDIF/WHILE.
They don't have a UIP. We used UIP in an array dereference, which never
caused problems on Gen < 8, since UIP was a small integer (number of
instructions). On Gen 8 UIP is in bytes, so it's large enough that it
caused us to read out of bounds of the array.

Signed-off-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-06-26 11:46:19 -07:00
Matt Turner
92233aee47 i965: Replace struct brw_compact_instruction with brw_compact_inst.
Signed-off-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-06-26 11:46:17 -07:00
Matt Turner
eaf78e56af i965: Convert brw_eu_compact.c to the new brw_compact_inst API.
Signed-off-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-06-26 11:46:16 -07:00
Matt Turner
395c759712 i965: Introduce a new brw_compact_inst API.
For now nothing uses this, but we can incrementally convert.

Signed-off-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-06-26 11:46:14 -07:00
Matt Turner
7c79608b5b i965: Replace 'struct brw_instruction' with 'brw_inst'.
Use this an an opportunity to clean up the formatting of some old code
(brw_ADD, for instance).

Signed-off-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-06-26 11:46:12 -07:00
Matt Turner
290daad497 i965: Throw out guts of struct brw_instruction.
Signed-off-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-06-26 11:46:11 -07:00