If the stencil clear value was larger than the maximum supported by the hardware
(255) then it would end up corrupting other fields in TA_STATE_ISPA. The Vulkan
1.0.266 spec says for VkClearDepthStencilValue:
"stencil is the clear value for the stencil aspect of the depth/stencil
attachment. It is a 32-bit integer value which is converted to the
attachment’s format by taking the appropriate number of LSBs."
As such, mask the clear value when packing TA_STATE_ISPA.
Fixes a number of GLES tests, including:
dEQP-GLES2.functional.depth_stencil_clear.*stencil_scissored*
dEQP-GLES2.functional.fragment_ops.stencil.*
dEQP-GLES3.functional.depth_stencil_clear.*stencil_scissored*
dEQP-GLES3.functional.fragment_ops.stencil.*
Fixes: 821c6b9342 ("pvr: Implement depth/stencil/depth+stencil attachment...")
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
Speculative fix following similar fixes to pvr_srv_rgx_kick_render2() and
pvr_srv_rgx_submit_transfer2().
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
The caller of pvr_srv_rgx_submit_transfer2() handles VK_NOT_READY, but
pvr_srv_rgx_submit_transfer2() would never return this error as it was missing
handling for retry errors returned by the
PVR_SRV_BRIDGE_RGXTQ_RGXSUBMITTRANSFER2 bridge call. This resulted in
pvr_srv_rgx_submit_transfer2() returning VK_ERROR_OUT_OF_DEVICE_MEMORY, which
was treated as a device lost error by callers further up the stack.
Fixes a hang seen with a release/debugoptimized build when running
KHR-GLES3.copy_tex_image_conversions.required.cubemap_negy_cubemap_negy as part
of a batch of tests.
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
If within a render pass, only insert a mid fragment barrier if needed for
stencil load/store.
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
Take the source and destination address alignment into account when selecting
the pixel format / texel width. This avoids the transfer job code having to
handle an unaligned copy and, as a result, trying to encode a value that is too
large for the maxclip_x field in PBESTATE_REG_WORD1.
Fixes the following test cases:
dEQP-GLES2.functional.vertex_arrays.single_attribute.offset.buffer_4_32_fixed2_vec2_dynamic_draw_quads_256
dEQP-GLES2.functional.vertex_arrays.single_attribute.offset.buffer_4_8_fixed2_vec2_dynamic_draw_quads_256
Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
Resolves the following valgrind issue when running GLES CTS:
==8318== Conditional jump or move depends on uninitialised value(s)
==8318== at 0x72AE91C: vk_format_to_pipe_format (vk_format.c:263)
==8318== by 0x7051EE7: vk_format_description (vk_format.h:176)
==8318== by 0x7052CFB: pvr_get_format_swizzle (pvr_formats.c:701)
==8318== by 0x708CC2F: pvr_init_tex_info (pvr_query_compute.c:454)
==8318== by 0x708D887: pvr_add_query_program (pvr_query_compute.c:663)
==8318== by 0x708B9BB: pvr_CmdCopyQueryPoolResults (pvr_query.c:535)
==8318== by 0x607E68F: copy_pool_results_to_buffer (zink_query.c:782)
==8318== by 0x607EB37: update_qbo (zink_query.c:853)
==8318== by 0x607FA17: zink_get_query_result (zink_query.c:1145)
==8318== by 0x5E82987: tc_get_query_result (u_threaded_context.c:1283)
==8318== by 0x59A7543: get_query_result (queryobj.c:297)
==8318== by 0x59A78A7: _mesa_check_query (queryobj.c:388)
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
The fractional part of the z position will only be used with linear or bi-linear
filtering. Otherwise it is safe to discard the original fractional value and
reset it to 0.5.
Fixes: 480bdff4b5 ("pvr: Add support to process transfer and blit cmds")
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
When importing the same dma-buf multiple times, the kernel will return us the
same GEM handle each time. This means that if we close the GEM handle for one BO
we'll end up making the handle invalid for all BOs. The driver wasn't taking
this into account and was therefore creating a new BO each time a dma-buf was
imported, meaning we could end up with multiple BOs with the same GEM
handle. Fix this by creating a single BO per GEM handle and taking an additional
reference on a BO when the kernel returns an existing GEM handle.
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
When calculating the size of an image, the driver was always factoring in space
for a full mip chain. However, this isn't necessary when mipLevels is 1 and this
resulted in applications needing to allocate more memory for these images than
is strictly necessary. Fix this by calculating the size of additional mip levels
(those greater than mipLevels) when more than 1 mip level has been requested.
Fixes: 2a3aa6da50 ("pvr: Fix cubemap layer stride")
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
The local_size and global_size arguments have been reordered to make them more
consistent.
Signed-off-by: Vlad Schiller <vlad-radu.schiller@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
Base level offseting only needs to be applied when creating non-compressed view
of a compressed image. Additionally the logic when patching offset, did not fix
up the rest of image state.
Seen in:
dEQP-VK.pipeline.monolithic.image_view.view_type.2d.format.r32_uint.subresource_range.lod_base_mip_level_array_layer_last
Signed-off-by: SoroushIMG <soroush.kashani@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
The use of list_move_to() meant that the first transfer sub-command wasn't being
correctly placed before the target graphics sub-command.
Fixes: d1b17a5edc ("pvr: Implement ZLS subtile alignment")
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
pvr_cmd_buffer_end_sub_cmd() sets the current sub-command to NULL. This was
causing list_move_to(), which is called immediately after this, to access a NULL
pointer. Fix this by storing the current sub command before calling
pve_cmd_buffer_end_sub_cmd() so that this can be used instead when modifying the
list.
Fixes: d1b17a5edc ("pvr: Implement ZLS subtile alignment")
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
Waits were not previously being created for job dependencies in
pvr_driver_queue_submit() because the pvr_stage_mask() was being called in place
of pvr_stage_mask_dst(), and the former does not handle the top-of-pipe bit.
Signed-off-by: Donald Robson <donald.robson@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
This prevents the creation of unused syncobjs in the kernel by not processing
waits when there aren't any waits given in the submit info.
Signed-off-by: Donald Robson <donald.robson@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
The descriptor set code will undergo a rework fairly soon so instead of trying
to fixup `per_stage_descriptor_masks` and deal with possible side effects of
that, for now let's always regenerate all descriptor program data sections no
matter the stage mask.
Fixes the following:
dEQP-VK.pipeline.monolithic.dynamic_offset.graphics
.{multi,single_}set.{storage,uniform}_buffer.numcmdbuffers_1
.sameorder.numdescriptorsetbindings_2.numdynamicbindings_1
.numnondynamicbindings_0
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
In `pvr_create_renderpass_hwsetup()` we use the size of the pbe accum format to
setup a mask for the valid parts of the output regs.
For formats such as `E5B9G9R9_UFLOAT_PACK32` which aren't supported as colour
attachments, `vkCreateRenderPass()` can still be called so to avoid undefined
behavior we use `0` as the bitsize.
Fixes `Unknown pbe accum format. Implementation error` for:
dEQP-VK.api.granularity.in_render_pass.e5b9g9r9_ufloat_pack32
dEQP-VK.api.granularity.multi.e5b9g9r9_ufloat_pack32
dEQP-VK.api.granularity.random.e5b9g9r9_ufloat_pack32
dEQP-VK.api.granularity.random.r32g32b32_uint
dEQP-VK.api.granularity.random.r32g32b32a32_sint
dEQP-VK.api.granularity.single.e5b9g9r9_ufloat_pack32
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
The accumulation format must be used here, not the final PBE emitted format.
Signed-off-by: SoroushIMG <soroush.kashani@imgtec.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31679>
The TEXC(GRDESC) instruction returns the LOD for a given texture
coordinates. Use it to implement nir_texop_lod.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31742>
The TEX_GRADIENT instruction returns the LOD for a given texture
coordinates. Use it to implement nir_texop_lod.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31742>
Define the TEX_GRADIENT instruction in valhall/ISA.xml, and add the
necessary bits to the compiler to expose it.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31742>
These bits are reserved in the spec. Even if setting them is harmless,
we'd rather keep them zero just in case.
Suggested-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31742>
The LOD bias in encoded in a signed 8.8 fixed point, meaning the valid
range is [-128,+127.966] not [-255,+255]. Since .maxSamplerLodBias
encodes an absolute value not a range, we make it [-127.996,+127,996].
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31742>
In rare cases, it could happen that during post-RA validation,
live-var-analysis sets needs_vcc = false after if was true
before register allocation.
Fixes: bb5eace0dc ('aco/live_var_analysis: check for isPrecolored flag rather than isFixed')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31791>
