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pvr: Implement depth/stencil/depth+stencil attachment clear.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com> Reviewed-by: Frank Binns <frank.binns@imgtec.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>
This commit is contained in:
Karmjit Mahil
Marge Bot
parent
5611dedd78
commit
821c6b9342
5 changed files with 421 additions and 9 deletions
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@ -25,6 +25,7 @@
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#include <stdint.h>
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#include <vulkan/vulkan.h>
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#include "pvr_clear.h"
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#include "pvr_csb.h"
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#include "pvr_private.h"
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#include "util/list.h"
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@ -141,13 +142,414 @@ void pvr_CmdCopyBuffer2KHR(VkCommandBuffer commandBuffer,
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pvr_cmd_buffer_add_transfer_cmd(cmd_buffer, transfer_cmd);
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}
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/**
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* \brief Returns the maximum number of layers to clear starting from base_layer
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* that contain or match the target rectangle.
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*
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* \param[in] target_rect The region which the clear should contain or
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* match.
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* \param[in] base_layer The layer index to start at.
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* \param[in] clear_rect_count Amount of clear_rects
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* \param[in] clear_rects Array of clear rects.
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*
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* \return Max number of layers that cover or match the target region.
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*/
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static uint32_t
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pvr_get_max_layers_covering_target(VkRect2D target_rect,
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uint32_t base_layer,
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uint32_t clear_rect_count,
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const VkClearRect *clear_rects)
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{
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const int32_t target_x0 = target_rect.offset.x;
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const int32_t target_x1 = target_x0 + (int32_t)target_rect.extent.width;
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const int32_t target_y0 = target_rect.offset.y;
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const int32_t target_y1 = target_y0 + (int32_t)target_rect.extent.height;
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uint32_t layer_count = 0;
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assert((int64_t)target_x0 + (int64_t)target_rect.extent.width <= INT32_MAX);
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assert((int64_t)target_y0 + (int64_t)target_rect.extent.height <= INT32_MAX);
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for (uint32_t i = 0; i < clear_rect_count; i++) {
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const VkClearRect *clear_rect = &clear_rects[i];
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const uint32_t max_layer =
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clear_rect->baseArrayLayer + clear_rect->layerCount;
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bool target_is_covered;
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int32_t x0, x1;
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int32_t y0, y1;
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if (clear_rect->baseArrayLayer == 0)
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continue;
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assert((uint64_t)clear_rect->baseArrayLayer + clear_rect->layerCount <=
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UINT32_MAX);
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/* Check for layer intersection. */
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if (clear_rect->baseArrayLayer > base_layer || max_layer <= base_layer)
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continue;
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x0 = clear_rect->rect.offset.x;
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x1 = x0 + (int32_t)clear_rect->rect.extent.width;
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y0 = clear_rect->rect.offset.y;
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y1 = y0 + (int32_t)clear_rect->rect.extent.height;
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assert((int64_t)x0 + (int64_t)clear_rect->rect.extent.width <= INT32_MAX);
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assert((int64_t)y0 + (int64_t)clear_rect->rect.extent.height <=
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INT32_MAX);
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target_is_covered = x0 <= target_x0 && x1 >= target_x1;
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target_is_covered &= y0 <= target_y0 && y1 >= target_y1;
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if (target_is_covered)
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layer_count = MAX2(layer_count, max_layer - base_layer);
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}
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return layer_count;
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}
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/* Return true if vertex shader is required to output render target id to pick
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* the texture array layer.
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*/
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static inline bool
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pvr_clear_needs_rt_id_output(struct pvr_device_info *dev_info,
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uint32_t rect_count,
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const VkClearRect *rects)
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{
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if (!PVR_HAS_FEATURE(dev_info, gs_rta_support))
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return false;
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for (uint32_t i = 0; i < rect_count; i++) {
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if (rects[i].baseArrayLayer != 0 || rects[i].layerCount > 1)
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return true;
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}
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return false;
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}
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static inline uint32_t
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pvr_clear_template_idx_from_aspect(VkImageAspectFlags aspect)
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{
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switch (aspect) {
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case VK_IMAGE_ASPECT_COLOR_BIT:
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/* From the Vulkan 1.3.229 spec VUID-VkClearAttachment-aspectMask-00019:
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*
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* "If aspectMask includes VK_IMAGE_ASPECT_COLOR_BIT, it must not
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* include VK_IMAGE_ASPECT_DEPTH_BIT or VK_IMAGE_ASPECT_STENCIL_BIT"
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*
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*/
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return PVR_STATIC_CLEAR_COLOR_BIT;
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case VK_IMAGE_ASPECT_DEPTH_BIT:
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return PVR_STATIC_CLEAR_DEPTH_BIT;
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case VK_IMAGE_ASPECT_STENCIL_BIT:
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return PVR_STATIC_CLEAR_STENCIL_BIT;
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case VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT:
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return PVR_STATIC_CLEAR_DEPTH_BIT | PVR_STATIC_CLEAR_STENCIL_BIT;
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default:
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unreachable("Invalid aspect mask for clear.");
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return 0;
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}
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}
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static void pvr_clear_attachments(struct pvr_cmd_buffer *cmd_buffer,
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uint32_t attachment_count,
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const VkClearAttachment *attachments,
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uint32_t rect_count,
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const VkClearRect *rects)
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{
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const struct pvr_render_pass *pass = cmd_buffer->state.render_pass_info.pass;
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struct pvr_render_pass_info *pass_info = &cmd_buffer->state.render_pass_info;
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const struct pvr_renderpass_hwsetup_subpass *hw_pass =
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pvr_get_hw_subpass(pass, pass_info->subpass_idx);
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struct pvr_sub_cmd_gfx *sub_cmd = &cmd_buffer->state.current_sub_cmd->gfx;
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struct pvr_device_info *dev_info = &cmd_buffer->device->pdevice->dev_info;
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bool z_replicate = hw_pass->z_replicate != -1;
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uint32_t vs_output_size_in_bytes;
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bool vs_has_rt_id_output;
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/* TODO: This function can be optimized so that most of the device memory
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* gets allocated together in one go and then filled as needed. There might
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* also be opportunities to reuse pds code and data segments.
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*/
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assert(cmd_buffer->state.current_sub_cmd->type == PVR_SUB_CMD_TYPE_GRAPHICS);
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pvr_reset_graphics_dirty_state(cmd_buffer, false);
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/* We'll be emitting to the control stream. */
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sub_cmd->empty_cmd = false;
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vs_has_rt_id_output =
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pvr_clear_needs_rt_id_output(dev_info, rect_count, rects);
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/* 4 because we're expecting the USC to output X, Y, Z, and W. */
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vs_output_size_in_bytes = 4 * sizeof(uint32_t);
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if (vs_has_rt_id_output)
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vs_output_size_in_bytes += sizeof(uint32_t);
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for (uint32_t i = 0; i < attachment_count; i++) {
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const VkClearAttachment *attachment = &attachments[i];
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struct pvr_pds_vertex_shader_program pds_program;
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struct pvr_pds_upload pds_program_upload = { 0 };
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uint64_t current_base_array_layer = ~0;
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VkResult result;
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float depth;
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if (attachment->aspectMask == VK_IMAGE_ASPECT_COLOR_BIT) {
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pvr_finishme("Implement clear for color attachment.");
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} else if (z_replicate &&
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attachment->aspectMask & VK_IMAGE_ASPECT_DEPTH_BIT) {
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pvr_finishme("Implement clear for depth/depth+stencil attachment on "
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"z_replicate.");
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} else {
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struct pvr_static_clear_ppp_template template;
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uint32_t template_idx;
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struct pvr_bo *pvr_bo;
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template_idx =
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pvr_clear_template_idx_from_aspect(attachment->aspectMask);
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template =
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cmd_buffer->device->static_clear_state.ppp_templates[template_idx];
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if (attachment->aspectMask & VK_IMAGE_ASPECT_STENCIL_BIT) {
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template.config.ispa.sref =
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attachment->clearValue.depthStencil.stencil;
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}
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if (vs_has_rt_id_output) {
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template.config.output_sel.rhw_pres = true;
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template.config.output_sel.render_tgt_pres = true;
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template.config.output_sel.vtxsize = 4 + 1;
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}
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result = pvr_emit_ppp_from_template(&sub_cmd->control_stream,
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&template,
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&pvr_bo);
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if (result != VK_SUCCESS) {
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cmd_buffer->state.status = result;
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return;
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}
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list_add(&pvr_bo->link, &cmd_buffer->bo_list);
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}
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if (attachment->aspectMask & VK_IMAGE_ASPECT_DEPTH_BIT)
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depth = attachment->clearValue.depthStencil.depth;
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else
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depth = 1.0f;
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if (vs_has_rt_id_output) {
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const struct pvr_device_static_clear_state *dev_clear_state =
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&cmd_buffer->device->static_clear_state;
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const struct pvr_bo *multi_layer_vert_bo =
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dev_clear_state->usc_multi_layer_vertex_shader_bo;
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/* We can't use the device's passthrough pds program since it doesn't
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* have iterate_instance_id enabled. We'll be uploading code sections
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* per each clear rect.
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*/
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/* TODO: See if we can allocate all the code section memory in one go.
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* We'd need to make sure that changing instance_id_modifier doesn't
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* change the code section size.
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* Also check if we can reuse the same code segment for each rect.
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* Seems like the instance_id_modifier is written into the data section
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* and used by the pds ADD instruction that way instead of it being
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* embedded into the code section.
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*/
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pvr_pds_clear_rta_vertex_shader_program_init_base(&pds_program,
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multi_layer_vert_bo);
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} else {
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/* We can reuse the device's code section but we'll need to upload data
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* sections so initialize the program.
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*/
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pvr_pds_clear_vertex_shader_program_init_base(
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&pds_program,
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cmd_buffer->device->static_clear_state.usc_vertex_shader_bo);
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pds_program_upload.code_offset =
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cmd_buffer->device->static_clear_state.pds.code_offset;
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/* TODO: The code size doesn't get used by pvr_clear_vdm_state() maybe
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* let's change its interface to make that clear and not set this?
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*/
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pds_program_upload.code_size =
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cmd_buffer->device->static_clear_state.pds.code_size;
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}
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for (uint32_t j = 0; j < rect_count; j++) {
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struct pvr_pds_upload pds_program_data_upload;
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const VkClearRect *clear_rect = &rects[j];
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struct pvr_bo *vertices_bo;
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uint32_t *vdm_cs_buffer;
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VkResult result;
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if (!PVR_HAS_FEATURE(dev_info, gs_rta_support) &&
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(clear_rect->baseArrayLayer != 0 || clear_rect->layerCount > 1)) {
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pvr_finishme("Add deferred RTA clear.");
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if (clear_rect->baseArrayLayer != 0)
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continue;
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}
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/* TODO: Allocate all the buffers in one go before the loop, and add
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* support to multi-alloc bo.
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*/
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result = pvr_clear_vertices_upload(cmd_buffer->device,
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&clear_rect->rect,
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depth,
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&vertices_bo);
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if (result != VK_SUCCESS) {
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cmd_buffer->state.status = result;
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return;
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}
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list_add(&vertices_bo->link, &cmd_buffer->bo_list);
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if (vs_has_rt_id_output) {
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if (current_base_array_layer != clear_rect->baseArrayLayer) {
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const uint32_t base_array_layer = clear_rect->baseArrayLayer;
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struct pvr_pds_upload pds_program_code_upload;
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result =
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pvr_pds_clear_rta_vertex_shader_program_create_and_upload_code(
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&pds_program,
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cmd_buffer,
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base_array_layer,
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&pds_program_code_upload);
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if (result != VK_SUCCESS) {
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cmd_buffer->state.status = result;
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return;
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}
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pds_program_upload.code_offset =
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pds_program_code_upload.code_offset;
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/* TODO: The code size doesn't get used by pvr_clear_vdm_state()
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* maybe let's change its interface to make that clear and not
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* set this?
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*/
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pds_program_upload.code_size = pds_program_code_upload.code_size;
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current_base_array_layer = base_array_layer;
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}
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result =
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pvr_pds_clear_rta_vertex_shader_program_create_and_upload_data(
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&pds_program,
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cmd_buffer,
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vertices_bo,
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&pds_program_data_upload);
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if (result != VK_SUCCESS)
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return;
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} else {
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result = pvr_pds_clear_vertex_shader_program_create_and_upload_data(
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&pds_program,
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cmd_buffer,
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vertices_bo,
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&pds_program_data_upload);
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if (result != VK_SUCCESS)
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return;
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}
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pds_program_upload.data_offset = pds_program_data_upload.data_offset;
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pds_program_upload.data_size = pds_program_data_upload.data_size;
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vdm_cs_buffer = pvr_csb_alloc_dwords(&sub_cmd->control_stream,
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PVR_CLEAR_VDM_STATE_DWORD_COUNT);
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if (!vdm_cs_buffer) {
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result = vk_error(cmd_buffer, VK_ERROR_OUT_OF_HOST_MEMORY);
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cmd_buffer->state.status = result;
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return;
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}
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pvr_pack_clear_vdm_state(dev_info,
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&pds_program_upload,
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pds_program.temps_used,
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4,
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vs_output_size_in_bytes,
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clear_rect->layerCount,
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vdm_cs_buffer);
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}
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}
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}
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void pvr_CmdClearAttachments(VkCommandBuffer commandBuffer,
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uint32_t attachmentCount,
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const VkClearAttachment *pAttachments,
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uint32_t rectCount,
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const VkClearRect *pRects)
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{
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assert(!"Unimplemented");
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PVR_FROM_HANDLE(pvr_cmd_buffer, cmd_buffer, commandBuffer);
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struct pvr_cmd_buffer_state *state = &cmd_buffer->state;
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struct pvr_sub_cmd_gfx *sub_cmd = &state->current_sub_cmd->gfx;
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PVR_CHECK_COMMAND_BUFFER_BUILDING_STATE(cmd_buffer);
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assert(state->current_sub_cmd->type == PVR_SUB_CMD_TYPE_GRAPHICS);
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/* TODO: There are some optimizations that can be made here:
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* - For a full screen clear, update the clear values for the corresponding
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* attachment index.
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* - For a full screen color attachment clear, add its index to a load op
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* override to add it to the background shader. This will elide any load
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* op loads currently in the background shader as well as the usual
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* frag kick for geometry clear.
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*/
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/* If we have any depth/stencil clears, update the sub command depth/stencil
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* modification and usage flags.
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*/
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if (state->depth_format != VK_FORMAT_UNDEFINED) {
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uint32_t full_screen_clear_count;
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bool has_stencil_clear = false;
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bool has_depth_clear = false;
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for (uint32_t i = 0; i < attachmentCount; i++) {
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const VkImageAspectFlags aspect_mask = pAttachments[i].aspectMask;
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if (aspect_mask & VK_IMAGE_ASPECT_STENCIL_BIT)
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has_stencil_clear = true;
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if (aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT)
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has_depth_clear = true;
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if (has_stencil_clear && has_depth_clear)
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break;
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}
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sub_cmd->modifies_stencil |= has_stencil_clear;
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sub_cmd->modifies_depth |= has_depth_clear;
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/* We only care about clears that have a baseArrayLayer of 0 as any
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* attachment clears we move to the background shader must apply to all of
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* the attachment's sub resources.
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*/
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full_screen_clear_count =
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pvr_get_max_layers_covering_target(state->render_pass_info.render_area,
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0,
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rectCount,
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pRects);
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if (full_screen_clear_count > 0) {
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if (has_stencil_clear &&
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sub_cmd->stencil_usage == PVR_DEPTH_STENCIL_USAGE_UNDEFINED) {
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sub_cmd->stencil_usage = PVR_DEPTH_STENCIL_USAGE_NEVER;
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}
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if (has_depth_clear &&
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sub_cmd->depth_usage == PVR_DEPTH_STENCIL_USAGE_UNDEFINED) {
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sub_cmd->depth_usage = PVR_DEPTH_STENCIL_USAGE_NEVER;
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}
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}
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}
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pvr_clear_attachments(cmd_buffer,
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attachmentCount,
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pAttachments,
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rectCount,
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pRects);
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}
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void pvr_CmdResolveImage2KHR(VkCommandBuffer commandBuffer,
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@ -237,10 +237,10 @@ VkResult pvr_emit_ppp_from_template(
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* \param[out] pvr_bo_out BO upload object.
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* \return VK_SUCCESS if the upload succeeded.
|
||||
*/
|
||||
static VkResult pvr_clear_vertices_upload(struct pvr_device *device,
|
||||
const VkRect2D *rect,
|
||||
float depth,
|
||||
struct pvr_bo **const pvr_bo_out)
|
||||
VkResult pvr_clear_vertices_upload(struct pvr_device *device,
|
||||
const VkRect2D *rect,
|
||||
float depth,
|
||||
struct pvr_bo **const pvr_bo_out)
|
||||
{
|
||||
const float y1 = (float)(rect->offset.y + rect->extent.height);
|
||||
const float x1 = (float)(rect->offset.x + rect->extent.width);
|
||||
|
|
|
|||
|
|
@ -185,4 +185,9 @@ void pvr_pack_clear_vdm_state(
|
|||
uint32_t layer_count,
|
||||
uint32_t state_buffer[const static PVR_CLEAR_VDM_STATE_DWORD_COUNT]);
|
||||
|
||||
VkResult pvr_clear_vertices_upload(struct pvr_device *device,
|
||||
const VkRect2D *rect,
|
||||
float depth,
|
||||
struct pvr_bo **const pvr_bo_out);
|
||||
|
||||
#endif /* PVR_CLEAR_H */
|
||||
|
|
|
|||
|
|
@ -1636,9 +1636,8 @@ VkResult pvr_cmd_buffer_end_sub_cmd(struct pvr_cmd_buffer *cmd_buffer)
|
|||
return VK_SUCCESS;
|
||||
}
|
||||
|
||||
static void
|
||||
pvr_reset_graphics_dirty_state(struct pvr_cmd_buffer *const cmd_buffer,
|
||||
bool start_geom)
|
||||
void pvr_reset_graphics_dirty_state(struct pvr_cmd_buffer *const cmd_buffer,
|
||||
bool start_geom)
|
||||
{
|
||||
struct vk_dynamic_graphics_state *const dynamic_state =
|
||||
&cmd_buffer->vk.dynamic_graphics_state;
|
||||
|
|
@ -2165,7 +2164,7 @@ static VkResult pvr_init_render_targets(struct pvr_device *device,
|
|||
return VK_SUCCESS;
|
||||
}
|
||||
|
||||
static const struct pvr_renderpass_hwsetup_subpass *
|
||||
const struct pvr_renderpass_hwsetup_subpass *
|
||||
pvr_get_hw_subpass(const struct pvr_render_pass *pass, const uint32_t subpass)
|
||||
{
|
||||
const struct pvr_renderpass_hw_map *map =
|
||||
|
|
|
|||
|
|
@ -1586,6 +1586,12 @@ void pvr_device_destroy_compute_query_programs(struct pvr_device *device);
|
|||
VkResult pvr_add_query_program(struct pvr_cmd_buffer *cmd_buffer,
|
||||
const struct pvr_query_info *query_info);
|
||||
|
||||
void pvr_reset_graphics_dirty_state(struct pvr_cmd_buffer *const cmd_buffer,
|
||||
bool start_geom);
|
||||
|
||||
const struct pvr_renderpass_hwsetup_subpass *
|
||||
pvr_get_hw_subpass(const struct pvr_render_pass *pass, const uint32_t subpass);
|
||||
|
||||
#define PVR_FROM_HANDLE(__pvr_type, __name, __handle) \
|
||||
VK_FROM_HANDLE(__pvr_type, __name, __handle)
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue