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Author SHA1 Message Date
Alyssa Rosenzweig
a6ccbf48e9 pan/bi: Clarify the logic of bi_reconverge_branches 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
30f8fb82c9 pan/bi: Clean up and export bi_reconverge_branches 
Decides when we need "branch reconvergence" (canonical term), the
logical opposite of "back-to-back execution" (non-canonical term, this
is old code in Bifrost terms). So invert the return value, rename, and
export so we can use it when packing Valhall instructions.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
e3554a9a3a pan/bi: Add branch_offset immediate 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
4f359cae43 pan/bi: Garbage collect stuff in bi_layout.c 
Predates clause scheduling.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
73f8ef2961 pan/bi: Fix UBO push with nir_opt_shrink_vectors 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
16579ca4b7 pan/bi: Add constant folding unit test 
I just played with the implementation, let's ensure I didn't break it.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
87ebad74e5 pan/bi: Refactor constant folding for testability 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
972d517d41 pan/bi: Use bi_apply_swizzle in constant folding 
Much more legible now.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
ce8e269e60 pan/bi: Add helper to swizzle a constant 
Instead of open-coding special cases in multiple places, just keep a
canonical version that handles every case.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
b55fb073a4 pan/bi: Add strip_index helper 
Needed to correctly lower sources to moves, used in the FAU lowering.
Technically, the issue is already present on Bifrost, but it's hidden
because Bifrost packing doesn't validate the absense of unsupported
modifiers. Valhall packing adds more safety, which caught this issue.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
a5727909e1 pan/bi: Rename CLPER_V7 back to CLPER 
v6 is really the oddball here. CLPER on v9 supports a superset of v7.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
f9616b7463 pan/bi: Rename NOP.i32 to NOP 
Simpler and matches the syntax of Valhall I've picked out.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
245c0ec755 pan/bi: Fix typo in FAU enum 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
fccbf4985d pan/bi: Model Valhall special values as FAU 
Not sure if this is "really" FAU but it's convenient to treat it as
such.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
9324510173 pan/bi: Model RSCALE for Valhall 
Faster than FMA_RSCALE. We'll want to optimize this (e.g. for exp2).

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
62147d4126 pan/bi: Model *ADD_IMM instructions in IR 
Needed for Valhall.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
5b0d6672f0 pan/bi: Remove unused BIR_FAU_HI 
Redundant with offset.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
1cde245f76 pan/bi: Add discard flag to bi_index 
Needed to model Valhall instructions. Should also be useful to RA if we
ever get around to doing something SSA based.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
be95198de5 pan/bi: DCE after bifrost_nir_lower_algebraic_late 
Needed for sat_signed to fuse, since we run modifier prop before backend
DCE.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
e6fdbb85bc pan/bi: Constify BIR manipulation 
For use in Valhall packing.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
0149dee377 pan/bi: Remove redundant check in clamp fusing 
Already checked above.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
07b259defc pan/bi: Add instruction unit test macro 
Checks for instruction equality.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
6053741610 pan/bi: Add instruction equality helper 
Useful for unit testing.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
0394cc7c1d pan/bi: Add helpers for unit testing 
At some point I should stop reinventing GTest but, look, writing tests
at all is big for me, one thing at a time, ok? 😋

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
cdc79d2a03 pan/bi: Output binaries from standalone compiler 
Useful for shader replacement.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
8cbabbd532 pan/bi: Only call clause code on Bifrost 
Valhall will have its own simpler code path.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
dc569585a6 pan/bi: Add quirks for Mali G78 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
18dedd80db pan/bi: Do more mesa/st stuff in standalone compiler 
From freedreno.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
f01f5e7168 pan/bi: Zero initialize shader_info 
Fixes the following assert with the standalone compiler

bifrost_compiler: ../src/panfrost/bifrost/bi_opt_push_ubo.c:134: bi_opt_push_ubo: Assertion `ctx->info->push.count == 0' failed.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
027a8bf82c pan/bi: Parse file names in standalone compiler 
Would like to compile compute shaders too.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
e5b5132c63 pan/bi: Remove unused option 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Alyssa Rosenzweig
1b85dfb6a5 pan/bi: Remove unused pointer from bi_instr 
Yikes.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
 2021-07-28 00:26:06 +00:00
Mike Blumenkrantz
59951b6f24 zink: use dynamic line stipple 
save those pipeline bits!

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12011>
 2021-07-27 23:22:19 +00:00
Mike Blumenkrantz
b61c96b692 ci: add another zink job with timelines disabled 
this codepath needs to be maintained for *vague handwaving*

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12089>
 2021-07-27 23:09:47 +00:00
Mike Blumenkrantz
64785df389 zink: add env var to disable timelines 
for ci use only

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12089>
 2021-07-27 23:09:47 +00:00
Mike Blumenkrantz
627371fe01 zink: export PIPE_CAP_TGSI_BALLOT 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11990>
 2021-07-27 22:44:59 +00:00
Mike Blumenkrantz
410d4dc529 zink: remove VK_EXT_shader_subgroup_ballot from device info 
restrict this to 1.2 only

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11990>
 2021-07-27 22:44:59 +00:00
Mike Blumenkrantz
a05693d332 zink: implement compiler handling for subgroup ballot builtins/intrinsics 
these are all lowered and unremarkable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11990>
 2021-07-27 22:44:59 +00:00
Mike Blumenkrantz
252165d925 zink: lower subgroup ballot instructions 
this handles rewrites of ballot-related instructions/builtins to spirv
vec4 types from the native GLSL U64 type

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11990>
 2021-07-27 22:44:59 +00:00
Mike Blumenkrantz
4bd6a0299b zink: change descriptor flushing to assert 
there should never be flushing due to pool depletion; instead, trigger an
oom flush and stall to replenish the pool after the draw/compute

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12012>
 2021-07-27 22:34:21 +00:00
Philipp Zabel
8ba44103b3 etnaviv: fix gbm_bo_get_handle_for_plane for multiplanar images 
Implement resource_get_param for PIPE_RESOURCE_PARAM_NPLANES and fix
resource_get_handle to walk to the correct linked resource for
multiplanar images, allowing gbm_bo_get_handle_for_plane to be called
with plane > 0.

This fixes an assert that is triggered when a wayland client tries
to send weston an NV12 dmabuf, for example:

  weston: .../mesa/src/gbm/backends/dri/gbm_dri.c:752: gbm_dri_bo_get_handle_for_plane: Assertion `plane == 0' failed.

Fixes: 788f6dc857 ('Revert "gallium/dri: fix dri2_from_planar for multiplanar images"')
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12037>
 2021-07-27 23:13:57 +02:00
Rohan Garg
f1cd56cdc1 virgl: Enable caching for sampler views and render targets 
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11241>
 2021-07-27 20:34:38 +00:00
Rohan Garg
8cb795b477 Revert "Revert "virgl: Cache depth and stencil buffers"" 
This reverts commit a8e75bb73c.

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11241>
 2021-07-27 20:34:38 +00:00
Rohan Garg
a425c5df78 virgl: Add more meta data to cached resources 
By expanding the meta data about resources in the cache we can match more
resources such as 3D textures, samplers and render targets.

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11241>
 2021-07-27 20:34:38 +00:00
Alyssa Rosenzweig
8d104a387a pan/va: Integrate the tests into meson test 
This way we will get testing in CI. Invoke as

   meson test --suite=panfrost

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12025>
 2021-07-27 20:20:32 +00:00
Alyssa Rosenzweig
b2046750c4 pan/va: Add disassembler test harness 
Uses the same set of cases. This is a standalone C program because the
easy way of hooking into the disassembler from Python with subprocesses
was slow. This seems cleaner anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12025>
 2021-07-27 20:20:32 +00:00
Alyssa Rosenzweig
f917fb63e7 pan/va: Add assembler test harness 
Integration regression testing. Nothing fancy.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12025>
 2021-07-27 20:20:32 +00:00
Alyssa Rosenzweig
372879cf6c pan/va: Add negative test cases for the assembler 
These are lines of assembly that look valid but are not, and should
raise a parser error but not otherwise crash the assembler or produce
invalid code.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12025>
 2021-07-27 20:20:32 +00:00
Alyssa Rosenzweig
70430d322f pan/va: Add dis/assembler test cases 
These are valid pairs of hexdumped assembled instructions and the
corresponding disassembly, to be used to regression test both the
assembler and the disassembler.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12025>
 2021-07-27 20:20:32 +00:00
Alyssa Rosenzweig
688827f3c5 pan/va: Add disassembler generator 
When we bring up the Valhall compiler in Mesa, we will like to have a
disassembler in native code, so we shouldn't write our disassembler in
Python. Instead, we write a disassembler generator in Python with mako
templates, which will produce a va_disasm_instr entrypoint from the
architecture defined in ISA.xml and valhall.py.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12025>
 2021-07-27 20:20:32 +00:00