Commit graph

19189 commits

Author SHA1 Message Date
Samuel Pitoiset
9666bd1245 radv: remove unnecessary handling of SDMA in radv_cs_emit_write_event_eop()
This function is only called for GFX or ACE. SDMA uses are already
handled before.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38430>
2025-11-17 08:28:38 +01:00
Samuel Pitoiset
6413651bcf ac,radv,radeonsi: add ac_emit_sdma_copy_linear()
RadeonSI wasn't considering the undocumented HW limitation apparently.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38430>
2025-11-17 08:28:37 +01:00
Samuel Pitoiset
191bf7aba6 ac,radv: add ac_emit_sdma_constant_fill()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38430>
2025-11-17 08:25:32 +01:00
Julia Zhang
0007644913 amdgpu/virtio: unmap bo in destroy_host_blob
Some checks are pending
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Unmap bo in destroy_host_blob when hb->cpu_addr is not NULL.
This avoid memory leak caused by bo refcount is not 0 when
amdvgpu_bo_free is called.

Signed-off-by: Julia Zhang <Julia.Zhang@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38440>
2025-11-17 05:35:31 +00:00
Timur Kristóf
0d20bdbe2c ac: Improve description of some HW workarounds
Some checks are pending
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Also add references to their conterparts in old PAL code.
This makes it easier to remember whether we mitigated the
same issues as PAL did.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38304>
2025-11-15 14:25:07 +01:00
Timur Kristóf
cad4e7d2e7 radv, radeonsi: Move GFX6-7 CB clamp issue to ac_gpu_info
To improve consistency between the two drivers.
This excludes Hawaii from the workaround on RADV.

Also add the same to ac_null_device_create().

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38304>
2025-11-15 14:24:59 +01:00
Timur Kristóf
567e1b56ef ac/gpu_info: Disable sparse VM mappings pre-Polaris, for now
Disable sparse mappings on GFX7-8 due to GPU hangs in the VK CTS,
except Polaris where it happens to work "well enough" to pass
the VK CTS and run some games already.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38304>
2025-11-15 14:23:59 +01:00
Timur Kristóf
1c8881fc60 radv: Disable sparse mapping when unsupported by VM
Also disable the sparse binding queue and other related features.
Using sparse on GFX6-8 can cause GPU hangs at the moment.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38304>
2025-11-15 14:22:49 +01:00
Marek Olšák
e372365cf4 nir: rename nir_copy_prop -> nir_opt_copy_prop
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38411>
2025-11-15 02:16:38 +00:00
Marek Olšák
482fa6818e radv: set ZMM_TRI_EXTENT for conservative rasterization == overestimate
Ported from PAL and recommended by HW people for correctness.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38434>
2025-11-14 21:18:24 +00:00
Daniel Schürmann
36b0fdb7b7 radv: move nir_opt_copy_prop_vars out of optimization loop
The effect of this change alone is >4% faster compile times.

Totals from 356 (0.45% of 79839) affected shaders: (Navi48)

Instrs: 833062 -> 817649 (-1.85%); split: -1.97%, +0.12%
CodeSize: 4387976 -> 4312616 (-1.72%); split: -1.93%, +0.22%
SpillSGPRs: 430 -> 421 (-2.09%)
LDS: 877568 -> 880640 (+0.35%)
Latency: 8862905 -> 8861517 (-0.02%); split: -0.29%, +0.28%
InvThroughput: 1470875 -> 1471874 (+0.07%); split: -0.22%, +0.28%
VClause: 16744 -> 16452 (-1.74%); split: -1.82%, +0.07%
SClause: 17583 -> 17058 (-2.99%); split: -3.04%, +0.06%
Copies: 58959 -> 58701 (-0.44%); split: -0.57%, +0.14%
Branches: 20355 -> 20276 (-0.39%); split: -0.58%, +0.20%
PreSGPRs: 21477 -> 21280 (-0.92%); split: -0.93%, +0.01%
PreVGPRs: 20596 -> 20627 (+0.15%); split: -0.27%, +0.42%
VALU: 449148 -> 440751 (-1.87%); split: -1.92%, +0.05%
SALU: 126577 -> 123978 (-2.05%); split: -2.15%, +0.09%
VMEM: 33549 -> 33559 (+0.03%); split: -1.69%, +1.72%
SMEM: 31280 -> 30543 (-2.36%); split: -2.36%, +0.00%
VOPD: 254 -> 251 (-1.18%); split: +0.39%, -1.57%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38367>
2025-11-14 09:09:15 +00:00
Daniel Schürmann
7ff8cf3e7b radv: Only call nir_lower_alu_width once in radv_optimize_nir()
No fossils stats differences.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38367>
2025-11-14 09:09:15 +00:00
Daniel Schürmann
18b99338b7 radv: don't lower_vars_to_ssa during optimization loop
Totals from 138 (0.17% of 79839) affected shaders: (Navi48)

Instrs: 129058 -> 128913 (-0.11%); split: -0.20%, +0.09%
CodeSize: 683024 -> 682056 (-0.14%); split: -0.20%, +0.06%
Latency: 1080293 -> 1080517 (+0.02%); split: -0.02%, +0.04%
InvThroughput: 180598 -> 180622 (+0.01%)
SClause: 2292 -> 2294 (+0.09%); split: -0.13%, +0.22%
Copies: 8663 -> 8721 (+0.67%); split: -2.27%, +2.94%
PreSGPRs: 5980 -> 5953 (-0.45%)
VALU: 78673 -> 78686 (+0.02%); split: -0.01%, +0.02%
SALU: 13933 -> 13860 (-0.52%); split: -1.41%, +0.89%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38367>
2025-11-14 09:09:15 +00:00
Daniel Schürmann
d959e17d3d radv: call nir_opt_find_array_copies before first radv_optimize_nir()
Totals from 11 (0.01% of 79839) affected shaders: (Navi48)

Instrs: 6514 -> 5526 (-15.17%); split: -16.76%, +1.60%
CodeSize: 34700 -> 29336 (-15.46%); split: -17.30%, +1.84%
Latency: 12372 -> 11545 (-6.68%); split: -8.13%, +1.45%
InvThroughput: 2769 -> 2444 (-11.74%); split: -12.96%, +1.23%
Copies: 738 -> 649 (-12.06%)
Branches: 155 -> 111 (-28.39%)
PreVGPRs: 506 -> 471 (-6.92%); split: -7.71%, +0.79%
VALU: 3467 -> 2915 (-15.92%); split: -16.96%, +1.04%
SALU: 992 -> 839 (-15.42%); split: -16.03%, +0.60%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38367>
2025-11-14 09:09:14 +00:00
Daniel Schürmann
bf0e04a531 radv: Only call nir_opt_dead_write_vars once
Totals from 2 (0.00% of 79839) affected shaders: (Navi48)

Instrs: 5540 -> 5524 (-0.29%)
CodeSize: 27536 -> 27424 (-0.41%)
Latency: 37602 -> 37526 (-0.20%)
InvThroughput: 9401 -> 9382 (-0.20%)
Copies: 839 -> 845 (+0.72%); split: -0.12%, +0.83%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38367>
2025-11-14 09:09:14 +00:00
Daniel Schürmann
c3b72ea00c radv: Only call nir_opt_memcpy once
No fossil stats differences.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38367>
2025-11-14 09:09:14 +00:00
Samuel Pitoiset
e47a60255a radv: add a workaround for color<->stencil only copies on SDMA4-5
Some checks are pending
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For weird reasons, on SDMA4-5 color<->stencil only copies don't work
correctly. I compared NAVI21 (SDMA 5) vs NAVI31 (SDMA 6), everything
is bits-to-bits exact but the same test doesn't pass on NAVI21. So,
it's potentially a hardware bug on SDMA < 6.

Fixes dEQP-VK.api.ds_color_copy.*_tq on GFX9-GFX10.3.

Fixes: 0034f5a948 ("radv: allow ds<->color copies on compute/transfer queues")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38377>
2025-11-14 06:57:57 +00:00
Benjamin Cheng
8848495875 radv/video: Align each layer of encode DPB to 256
VCN requires the luma/chroma VAs to be 256 aligned. On VCN5, the
collocated buffer was not 256 aligned which can cause these VAs to be
unaligned.

This fixes VVL PositiveVideoEncodeH264.Basic on VCN5.

Fixes: 37e71a5cb2 ("radv/video: add support for AV1 encoding")
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38408>
2025-11-13 17:18:50 +00:00
Rhys Perry
00edddf542 ac/nir: add some tests for ac_nir_lower_mem_access_bit_sizes
These test that nothing crashes for any possible input. With print=true,
it can also be used to compare the behaviour of two different
ac_nir_lower_mem_access_bit_sizes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37995>
2025-11-13 15:23:20 +00:00
Benjamin Cheng
b4ae11ee42 ac,radeonsi/vcn,radv/video: Drop signature param
The signature is not very useful, and is unnecessary CPU overhead.

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38372>
2025-11-13 14:35:58 +00:00
Rhys Perry
6a5982cfe5 aco/scheduler: fix register demand check
Fixes deathloop/01f8d58bf245663b with gfx1201.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 668259ef0b ("aco/scheduler: move clauses through RAR dependencies")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38402>
2025-11-13 09:07:12 +00:00
Samuel Pitoiset
9141696d32 radv: fix gathering push constants from shaders with ESO
Some checks are pending
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Need to be 4-bytes aligned.

Fixes: aa44a5a4ae ("radv: gather push constant size from shaders for ESO")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14276
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38397>
2025-11-13 07:30:14 +00:00
Samuel Pitoiset
388875abe1 radv: bump maxRayDispatchInvocationCount to 2^30
It's the required limit by Vulkan.

Fixes dEQP-VK.ray_tracing_pipeline.limits.ray_tracing_props.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38405>
2025-11-13 07:10:39 +00:00
Yonggang Luo
ecb0ccf603 treewide: Replace calling to function ALIGN with align
This is done by grep ALIGN( to align(

docs,*.xml,blake3 is excluded

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38365>
2025-11-12 21:58:40 +00:00
Yonggang Luo
f8eafbe627 aco: Use align64 instead ALIGN for 64 bits input
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38365>
2025-11-12 21:58:38 +00:00
Konstantin Seurer
de32f9275f treewide: add & use parent instr helpers
We add a bunch of new helpers to avoid the need to touch >parent_instr,
including the full set of:

* nir_def_is_*
* nir_def_as_*_or_null
* nir_def_as_* [assumes the right instr type]
* nir_src_is_*
* nir_src_as_*
* nir_scalar_is_*
* nir_scalar_as_*

Plus nir_def_instr() where there's no more suitable helper.

Also an existing helper is renamed to unify all the names, while we're
churning the tree:

* nir_src_as_alu_instr -> nir_src_as_alu

..and then we port the tree to use the helpers as much as possible, using
nir_def_instr() where that does not work.

Acked-by: Marek Olšák <maraeo@gmail.com>

---

To eliminate nir_def::parent_instr we need to churn the tree anyway, so I'm
taking this opportunity to clean up a lot of NIR patterns.

Co-authored-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38313>
2025-11-12 21:22:13 +00:00
Samuel Pitoiset
6cf1f3b39a radv: fix supporting more tess parameters with TCS for ESO unlinked shaders
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
VGT_OUTPRIM_TYPE should be programmed correctly when PointMode is only
set in TCS with ESO.

Fixes dEQP-VK.shader_object.tessellation.hlsl.point_mode.

Fixes: c6d9b9b4e0 ("radv: support more tessellation parameters with TCS for ESO unlinked shaders"
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38376>
2025-11-12 16:21:17 +00:00
Timur Kristóf
7f5f8b3932 ac/nir/ngg: Use align() instead of ALIGN()
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38364>
2025-11-12 13:40:55 +00:00
Timur Kristóf
8f99d736d0 ac/nir/ngg: Fix scratch space for NGG GS streamout
For GS streamout, we need the following LDS scratch space:

- Repacking streamout vertices takes 1 dword per 4 waves per stream
  (max 16 bytes for Wave64, max 32 bytes for Wave32)
- 1 dword per stream for buffer info
  (16 bytes)
- 1 dword per buffer for buffer info
  (16 bytes)

Previously, the space used for buffer info aliased with the
space for repacking the output vertices in ngg_gs_finale(),
and there was no barrier in between, which caused a race
condition, resulting in random failure.

Fix this by allocating a few more LDS dwords so that aliasing
is not required, which also allows us to remove an extra
workgroup barrier.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12705
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38364>
2025-11-12 13:40:55 +00:00
Samuel Pitoiset
74a66d102f ac/parse_ib: decode SDMA_OPCODE_POLL_REGMEM
Some checks are pending
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macOS-CI / macOS-CI (xlib) (push) Waiting to run
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38366>
2025-11-12 08:52:17 +00:00
Samuel Pitoiset
75a1380355 radv: add RADV_DEBUG=dumpibs to dump command buffers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38366>
2025-11-12 08:52:17 +00:00
Samuel Pitoiset
842603dc4f radv/amdgpu: add a way to identify preamble/postamble when dumping CS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38366>
2025-11-12 08:52:17 +00:00
Autumn Ashton
2705d8bd8b radv/video: Implement VK_VALVE_video_encode_rgb_conversion
This is used by Steam Link VR (driver_vrlink) to avoid doing YUV conversion itself.

Signed-off-by: Autumn Ashton <misyl@froggi.es>
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37500>
2025-11-12 08:25:36 +00:00
Natalie Vock
73a31dafbc radv: Fix PSO history with RT pipelines
1. The prolog needs to have a null check. Libraries don't have prologs.
2. We only need to print the shaders actually included in this pipeline.
   Libraries were already printed separately.
3. The traversal shader was wrongly omitted from the output.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38355>
2025-11-12 08:00:54 +00:00
Samuel Pitoiset
0dba538643 radv/meta: fuse depth/stencil aspects copy with the GFX path
Depth/stencil copies on graphics are twice as fast now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38139>
2025-11-12 07:35:33 +00:00
Samuel Pitoiset
9d3dd174b8 radv/meta: rework radv_meta_nir_texel_fetch_build_func
This add a binding parameter that will be used for fused depth/stencil
copies.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38139>
2025-11-12 07:35:33 +00:00
Samuel Pitoiset
332f881375 radv/meta: simplify aspect/formats in radv_gfx_copy_image()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38139>
2025-11-12 07:35:32 +00:00
Samuel Pitoiset
cd59db45f9 radv/meta: simplify radv_gfx_copy_memory_to_image() even more
Selecting formats can be simplified.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38139>
2025-11-12 07:35:32 +00:00
Samuel Pitoiset
ed05c3fc31 radv/meta: remove multiple aspects in radv_gfx_copy_memory_to_image()
Only one aspect at any time is valid.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38139>
2025-11-12 07:35:31 +00:00
Samuel Pitoiset
a1884dc737 radv/meta: remove radv_meta_blit2d_rect
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38139>
2025-11-12 07:35:31 +00:00
Samuel Pitoiset
1319b2bef6 radv/meta: split radv_meta_blit2d() into two separate functions
It's more code but it's definitely easier to read and it will allow us
to do more cleanups/optimizations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38139>
2025-11-12 07:35:30 +00:00
Samuel Pitoiset
bb3f69fefe radv/meta: remove useless blit2d_src_temps
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38139>
2025-11-12 07:35:29 +00:00
Eric Engestrom
f30e5ff44b ci: uprev vkd3d
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
03cca4cd97...4acd227131

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38370>
2025-11-11 20:15:21 +00:00
Daniel Schürmann
5682e39e6b amd: enable load/store_shared2_amd for GFX6
Totals from 1509 (2.43% of 62200) affected shaders: (Pitcairn)

MaxWaves: 8078 -> 8057 (-0.26%); split: +0.09%, -0.35%
Instrs: 977182 -> 951746 (-2.60%); split: -2.62%, +0.02%
CodeSize: 4951468 -> 4758192 (-3.90%); split: -3.92%, +0.01%
SGPRs: 76704 -> 76696 (-0.01%)
VGPRs: 81092 -> 81068 (-0.03%); split: -0.34%, +0.31%
Latency: 11663237 -> 11526070 (-1.18%); split: -1.19%, +0.01%
InvThroughput: 6198904 -> 6114851 (-1.36%); split: -1.43%, +0.07%
VClause: 26656 -> 26655 (-0.00%); split: -0.05%, +0.05%
SClause: 22304 -> 22307 (+0.01%); split: -0.03%, +0.04%
Copies: 107503 -> 109564 (+1.92%); split: -0.23%, +2.15%
Branches: 22917 -> 22918 (+0.00%)
PreSGPRs: 42246 -> 42242 (-0.01%); split: -0.01%, +0.00%
PreVGPRs: 64561 -> 64761 (+0.31%); split: -0.01%, +0.32%
VALU: 600285 -> 601139 (+0.14%); split: -0.26%, +0.40%
SALU: 130622 -> 130851 (+0.18%); split: -0.16%, +0.33%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37682>
2025-11-11 17:12:17 +00:00
Samuel Pitoiset
0d9d45db4e radv: add vk_wsi_disable_unordered_submits and enable for GTK
GTK is missing a semaphore between QueueSubmit() and QueuePresent()
causing the WSI submit to be "unordered" and to immediately signal the
semaphores (because it's missing a wait semaphore in QueuePresent()).

The workaround is to disable unordered WSI submits until GTK fixes it
properly.

Cc: "25.3"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14087
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38351>
2025-11-11 12:13:41 +00:00
Daniel Schürmann
668259ef0b aco/scheduler: move clauses through RAR dependencies
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
For simplicity, we limit this feature to only one RAR-dependency per clause.
This allows to quickly correct the register demand changes that occur by
switching the kill flags.

Totals from 5861 (7.34% of 79839) affected shaders: (Navi48)
Instrs: 4891340 -> 4883789 (-0.15%); split: -0.21%, +0.06%
CodeSize: 25556612 -> 25527244 (-0.11%); split: -0.16%, +0.05%
VGPRs: 347044 -> 347140 (+0.03%); split: -0.13%, +0.16%
Latency: 32697095 -> 32642428 (-0.17%); split: -0.25%, +0.08%
InvThroughput: 4975909 -> 4975086 (-0.02%); split: -0.06%, +0.05%
VClause: 102152 -> 93852 (-8.13%); split: -8.22%, +0.10%
SClause: 101232 -> 101205 (-0.03%); split: -0.03%, +0.00%
Copies: 305189 -> 305651 (+0.15%); split: -0.56%, +0.71%
Branches: 87032 -> 87045 (+0.01%); split: -0.00%, +0.02%
VALU: 2776634 -> 2777097 (+0.02%); split: -0.06%, +0.08%
SALU: 662066 -> 660379 (-0.25%); split: -0.26%, +0.01%
VOPD: 4801 -> 4800 (-0.02%); split: +1.21%, -1.23%

Totals from 5680 (7.12% of 79825) affected shaders: (Vangogh)
MaxWaves: 111282 -> 111290 (+0.01%)
Instrs: 4955907 -> 4950709 (-0.10%); split: -0.15%, +0.04%
CodeSize: 26026264 -> 26014272 (-0.05%); split: -0.10%, +0.05%
VGPRs: 320784 -> 320776 (-0.00%); split: -0.03%, +0.03%
Latency: 35645457 -> 35584438 (-0.17%); split: -0.32%, +0.15%
InvThroughput: 8233912 -> 8236524 (+0.03%); split: -0.10%, +0.13%
VClause: 107017 -> 96804 (-9.54%); split: -9.69%, +0.15%
SClause: 98633 -> 98592 (-0.04%); split: -0.05%, +0.01%
Copies: 394041 -> 393584 (-0.12%); split: -0.52%, +0.40%
Branches: 120235 -> 120231 (-0.00%); split: -0.02%, +0.01%
VALU: 3183571 -> 3183114 (-0.01%); split: -0.06%, +0.05%
SALU: 735546 -> 734143 (-0.19%); split: -0.20%, +0.01%

Totals from 2507 (3.96% of 63370) affected shaders: (Vega10)

MaxWaves: 13643 -> 13637 (-0.04%)
Instrs: 1496453 -> 1496135 (-0.02%); split: -0.11%, +0.09%
CodeSize: 7777880 -> 7776608 (-0.02%); split: -0.09%, +0.07%
VGPRs: 134164 -> 134104 (-0.04%); split: -0.11%, +0.07%
Latency: 17465181 -> 17483075 (+0.10%); split: -0.36%, +0.47%
InvThroughput: 8830470 -> 8851751 (+0.24%); split: -0.09%, +0.33%
VClause: 42012 -> 38825 (-7.59%); split: -8.00%, +0.42%
SClause: 34586 -> 34549 (-0.11%); split: -0.12%, +0.01%
Copies: 137896 -> 137668 (-0.17%); split: -0.86%, +0.69%
VALU: 1092468 -> 1092240 (-0.02%); split: -0.11%, +0.09%
SALU: 132956 -> 132569 (-0.29%); split: -0.34%, +0.05%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38135>
2025-11-11 11:31:52 +00:00
Daniel Schürmann
65ba8a0e8b aco/scheduler: refactor downwards dependency check
We can also ignore killed operands when checking for RAR dependencies
as these cannot appear later anymore.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38135>
2025-11-11 11:31:52 +00:00
Daniel Schürmann
ce3cc03153 aco/scheduler: use hashmap for RAR_dependencies
Store information about the (relative) position of the RAR dependency.
This will allow to correct for register-demand changes when scheduling across.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38135>
2025-11-11 11:31:52 +00:00
Daniel Schürmann
6c0dd8164f aco/scheduler: remove MoveState::RAR_dependencies_clause
Since moving clauses as batch, this can easily be derived from RAR_dependencies.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38135>
2025-11-11 11:31:52 +00:00
Daniel Schürmann
5ef47ba231 aco/scheduler: assert that the register demand stays within pre-determined bounds
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38135>
2025-11-11 11:31:52 +00:00